PI74FCT2273CTL [ETC]
Octal D-Type Flip-Flop ; 八D型触发器\n
| 型号： | PI74FCT2273CTL |
| 厂家： | 
ETC |
| 描述： | Octal D-Type Flip-Flop
|
| 文件： | 总4页 (文件大小：239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI74FCT273T
(25Ω Series) PI74FCT2273T
Fast CMOS Octal D Flip-Flop
with Master Reset
Product Description
Product Features
PI74FCT273/2273TispincompatiblewithbipolarFAST
Series at a higher speed and lower power consumption
25Ω series resistor on all outputs (FCT2XXX only)
TTL input and output levels
Low ground bounce outputs
Extremely low static power
Hysteresis on all inputs
Pericom Semiconductors PI74FCT series of logic circuits are pro-
duced in the Companys advanced 0.6/0.8 micron CMOS
technology, achieving industry leading speed grades. All
PI74FCT2XXX devices have a built-in 25-ohm series resistor on
all outputs to reduce noise because of reflections, thus eliminating
the need for an external terminating resistor.
The PI74FCT273T and PI74FCT2273T is an 8-bit wide octal
designedwitheightedge-triggeredD-typeflip-flopswithindividual
D inputs and O outputs. The common buffered Clock (CP) and
Master Reset (MR) load and resets (clear) all flip-flops
simultaneously. The register is fully edge-triggered. The D input
state, one setup time before the LOW-to-HIGH clock transition, is
transferred to the corresponding flip-flop's O output. All outputs
will be forced LOW independently of Clock or Data inputs by a
LOW voltage level on the MR input.
Industrial operating temperature range: 40°C to +85°C
Packages available:
20-pin173milwideplasticTSSOP(L)
20-pin300milwideplasticDIP(P)
20-pin150milwideplasticQSOP(Q)
20-pin150milwideplasticTQSOP(R)
20-pin300milwideplasticSOIC(S)
Device models available upon request.
Logic Block Diagram
D0
D1
D2
D3
D4
D5
D6
D7
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
RD
RD
RD
RD
RD
RD
RD
RD
MR
O
0
O1
O2
O3
O4
O5
O
6
O7
Truth Table(1)
Product Pin Configuration
Product Pin Description
Inputs
Outputs
Pin Name
MR
Description
Mode
MR
CP
X
↑
DN
X
h
ON
L
Master Reset (Active LOW)
MR
O0
D0
D1
O1
O2
D2
D3
O3
1
2
3
4
5
6
7
8
9
10
20 Vcc
19 O7
18 D7
Reset (Clear)
Load "1"
Load "0"
L
H
H
CP
Clock Pulse Input
(Active Rising Edge)
20-PIN
L20
P20
Q20
R20
S20
H
D6
O6
O5
D5
D4
O4
CP
17
16
15
14
13
12
11
D0-D7
O0-O7
GND
VCC
Data Inputs
Data Outputs
Ground
↑
l
L
1. H = High Voltage Level
h = High Voltage Level one setup time
prior to the LOW-to-HIGH Clock
transition
Power
GND
L = Low Voltage Level
l = LOW Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
X = Dont Care
↑ = LOW-to-HIGH Clock Transition
PS2013A 03/09/96
1
PI74FCT273T
(25Ω Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
StressesgreaterthanthoselistedunderMAXIMUM
Storage Temperature ............................................................ 65°C to +150°C
Ambient Temperature with Power Applied ............................ -40°C to +85°C RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
Supply Voltage to Ground Potential (Inputs & Vcc Only) ..... 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) .. 0.5V to +7.0V
DC Input Voltage .................................................................... 0.5V to +7.0V
DC Output Current .............................................................................. 120 mA
Power Dissipation.....................................................................................0.5W
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 5.0V ± 5%)
Parameters Description
Test Conditions(1) Min. Typ(2) Max. Units
VOH
VOL
VOL
VIH
VIL
IIH
Output HIGH Voltage VCC = Min., VIN = VIH or VIL
Output LOW Current VCC = Min., VIN = VIH or VIL
Output LOW Current VCC = Min., VIN = VIH or VIL
IOH = 15.0mA
2.4
3.0
V
V
IOL = 64mA
0.3 0.55
0.3 0.50
IOL = 12mA (25Ω Series)
V
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
VCC = Max.
2.0
V
0.8
V
VIN = VCC
1
µA
µA
µA
µA
V
IIL
VCC = Max.
VIN = GND
VOUT = 2.7V
VOUT = 0.5V
1
IOZH
IOZL
VIK
IOFF
IOS
VCC = MAX.
1
1
Output Current
Clamp Diode Voltage VCC = Min., IIN = 18mA
Power Down Disable VCC = GND, VOUT = 4.5V
Short Circuit Current VCC = Max.(3), VOUT = GND
Input Hysteresis
0.7 1.2
100
µA
mA
mV
60 120
200
VH
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4)
Description
Test Conditions
VIN = 0V
Typ
6
Max.
10
Units
pF
CIN
Input Capacitance
Output Capacitance
COUT
VOUT = 0V
8
12
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
PS2013A 03/09/96
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PI74FCT273T
(25Ω Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Power Supply Characteristics
Parameters Description
Test Conditions(1)
Min. Typ(2) Max. Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VCC = Max.
VIN = GND or VCC
VIN = 3.4V(3)
VIN = VCC
0.1
500
µA
∆ICC
ICCD
Supply Current per
per Input @ TTL HIGH
0.5
2.0
mA
Supply Current per
Input per MHx(4)
VCC = Max., Outputs Open
MR = Vcc, One Input Toggling VIN = GND
0.15
0.25
mA/
MHz
50% Duty Cycle
IC
Total Power Supply
Current(6)
VCC = Max., Outputs Open
fCP = 10 MHZ, 50% Duty Cycle VIN = GND
MR = Vcc, 50% Duty Cycle VIN = 3.4V
One Bit toggling at fI = 5 MHZ VIN = GND
VCC = Max., Outputs Open
fCP = 10 MHZ, 50% Duty Cycle VIN = GND
VIN = VCC
1.5
2.0
3.5(5)
3.5(5)
mA
VIN = VCC
3.8
6.0
7.3(5)
MR = VCC, 50% Duty Cycle
Eight Bits toggling at
VIN = 3.4V
VIN = GND
16.3(5)
fI = 2.5 MHZ, 50% Duty Cycle
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
PS2013A 03/09/96
3
PI74FCT273T
(25Ω Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Switching Characteristics over Operating Range
273T/2273T
Com.
273AT/2273AT
Com.
273CT/2273CT
Com.
273DT
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
t
t
t
t
PLH
PHL
PHL
PLH
SU
Propagation Delay
C
R
L
L
= 50pF
= 500Ω
2.0
13.0
2.0
7.2
2.0
5.8
2.0
4.4
5.0
ns
CP to O
Propagation Delay
MR to O
N
2.0
3.0
2.0
7.0
7.0
13.0
2.0
2.0
1.5
6.0
6.0
7.2
2.0
2.0
1.5
6.0
6.0
6.1
2.0
2.0
1.5
3.0
3.0
ns
ns
ns
ns
ns
N
Setup Time, HIGH or LOW
Dn to CP
Hold Time, HIGH or LOW
Dn to CP
CP Pulse Width(3)
HIGH or LOW
MR Pulse Width(3)
LOW
t
H
tw
t
W
t
REM
Recovery Time MR to CP(3)
4.0
2.0
2.0
2.0
ns
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter guaranteed but not production tested.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS2013A 03/09/96
4
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