PI74FCT2823ATR [ETC]
9-Bit D-Type Flip-Flop ; 9位D型触发器\n
| 型号： | PI74FCT2823ATR |
| 厂家： | 
ETC |
| 描述： | 9-Bit D-Type Flip-Flop
|
| 文件： | 总7页 (文件大小：236K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI74FCT821T/823T/825T
(25Ω Series) PI74FCT2821T/2823T
Fast CMOS
Bus Interface Registers
ProductDescription
ProductFeatures
PI74FCT821T/823T/825T/2821T/2823Tispincompatiblewith
bipolar FAST Series at a higher speed and lower power
consumption
Pericom Semiconductors PI74FCT series of logic circuits are
produced using the Companys advanced 0.8 micron CMOS
technology, achieving industry leading speed grades. All
PI74FCT2XXXdeviceshaveabuilt-in25-ohmseriesresistoronall
outputs to reduce noise because of reflections, thus eliminating the
need for an external terminating resistor.
25Ω series resistor on all outputs (FCT2XXX only)
TTL input and output levels
Low ground bounce outputs
Extremelylowstaticpower
Hysteresis on all inputs
Industrial operating temperature range: 40°C to +85°C
Packagesavailable:
24-pin300milwideplasticDIP(P)
24-pin150milwideplasticQSOP(Q)
24-pin150milwideplasticTQSOP(R)
24-pin300milwideplasticSOIC(S)
Device models available upon request
ThePI74FCT821T/2821Tisa10-bitwideregisterdesignedwithten
D-type flip-flops with a buffered common clock and buffered
3-state outputs. The PI74FCT823/2823T is a 9-bit wide register
designed with Clock Enable and Clear. The PI74FCT825T is an
8-bit wide register with all PI74FCT823T controls plus multiple
enables.Whenoutputenable(OE)isLOW,theoutputsareenabled.
WhenOEisHIGH,theoutputsareinthehighimpedancestate.Input
data meeting the setup and hold time requirements of the D inputs
istransferredtotheYoutputsontheLOW-to-HIGHtransitionofthe
clock input.
Logic Block Diagram
D0
D1
D2
D3
D4
D5
DN-1
DN
EN
CLR
CL
CL
CL
CL
CL
CL
CL
CL
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
CP
CP
CP
CP
CP
CP
CP
CP
CP
OE
Y
0
Y1
Y2
Y3
Y4
Y5
YN-1
YN
OE1
OE2
OE3
PI74FCT825 Only
PS2023A 03/11/96
1
PI74FCT821T/823T/825T
(25ΩSeries)P174FCT2821T/2823T
Bus Interface Registers
PI74FCT821/2821T Product Pin Configuration
Product Pin Description
Pin Name
OE
Description
OE
Vcc
1
24
23
22
21
20
19
18
17
16
15
14
13
Output Enable Input (Active LOW)
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
0
1
2
3
4
5
6
7
8
9
2
CP
Clock Pulse for the register. Enters data on
LOW-to-HIGH transition
3
4
24-PIN
P24
Q24
R24
DN
Data Inputs
5
YN
3-State Outputs
6
7
CLR
Clear Input (Active LOW)
(823/825/2823 Only)
S24
8
9
EN
Clock Enable Input (Active LOW)
10
11
12
GND
VCC
Ground
Power
GND
CP
PI74FCT821/823/825/2821/2823T Truth Table(1)
PI74FCT823/2823T Product Pin Configuration
Inputs
Outputs Internal
Function CLR EN OE CP DN
YN
Z
QN
L
OE
1
0
1
2
3
4
5
6
7
8
Vcc
1
24
D
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
2
23
22
High-Z
Clear
Hold
H
H
L
L
L
X
X
H
H
L
L
L
L
H
H
H
L
↑
↑
L
H
X
X
X
X
L
D
3
Z
H
D
4
24-PIN 21
X
X
X
X
↑
Z
L
P24
Q24
R24
S24
D
5
20
L
L
L
D
6
19
D
7
18
H
H
H
H
H
H
H
L
Z
NC
NC
L
D
8
17
NC
Z
D
9
16
15
14
13
Load
H
H
L
D
10
11
12
↑
H
L
Z
H
CLR
EN
CP
GND
↑
L
L
L
↑
H
H
H
1. H = High Voltage Level
L = Low Voltage Level
X = Don't Care
PI74FCT825T Product Pin Configuration
Z = High Impedance
NC = No Change
↑ = LOW-to-HIGH transition
OE
OE
D
1
2
0
1
2
3
4
5
6
7
Vcc
OE
1
24
23
22
21
20
19
18
17
16
15
14
13
3
2
Y
Y
Y
Y
Y
Y
Y
Y
0
1
2
3
4
5
6
7
3
D
24-PIN
P24
Q24
R24
4
D
5
D
6
D
7
S24
D
8
D
9
D
10
11
12
CLR
EN
CP
GND
PS2023A 03/11/96
2
PI74FCT821T/823T/825T
(25ΩSeries)P174FCT2821T/2823T
Bus Interface Registers
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Storage Temperature ................................................................. 65°C to +150°C
Ambient Temperature with Power Applied ................................. -40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... 0.5V to +7.0V
DC Input Voltage ......................................................................... 0.5V to +7.0V
DC Output Current ................................................................................... 120 mA
Power Dissipation......................................................................................... 0.5W
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 5.0V ± 5%)
Parameters Description
Test Conditions(1) Min. Typ(2) Max. Units
VOH
VOL
VOL
VIH
VIL
IIH
Output HIGH Voltage VCC = Min., VIN = VIH or VIL
Output LOW Current VCC = Min., VIN = VIH or VIL
Output LOW Current VCC = Min., VIN = VIH or VIL
IOH = 15.0 mA
2.4
3.0
V
V
IOL = 48 mA
0.3 0.50
0.3 0.50
IOL = 12 mA (25Ω Series)
V
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
VCC = Max.
2.0
V
0.8
V
VIN = VCC
1
µA
µA
µA
µA
V
IIL
VCC = Max.
VIN = GND
VOUT = 2.7V
VOUT = 0.5V
1
IOZH
IOZL
VIK
IOFF
IOS
VCC = MAX.
1
1
Output Current
Clamp Diode Voltage VCC = Min., IIN = 18 mA
Power Down Disable VCC = GND, VOUT = 4.5V
Short Circuit Current VCC = Max.(3), VOUT = GND
Input Hysteresis
0.7 1.2
100
µA
mA
mV
60 120
200
VH
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4)
Description
Test Conditions
VIN = 0V
Typ
6
Max.
10
Units
pF
CIN
Input Capacitance
Output Capacitance
COUT
VOUT = 0V
8
12
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
PS2023A 03/11/96
3
PI74FCT821T/823T/825T
(25ΩSeries)P174FCT2821T/2823T
Bus Interface Registers
Power Supply Characteristics
Parameters Description
Test Conditions(1)
Min. Typ(2) Max. Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VCC = Max.
VCC = Max.,
VIN = GND
or VCC
0.1
500
µA
∆ICC
ICCD
Supply Current per
Input @ TTL HIGH
VIN = 3.4V(3)
0.5
2.0
mA
Supply Current per
Input per MHz(4)
VIN = VCC
VIN = GND
0.15
0.25
mA/
MHz
Outputs Open
OE = EN = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply
Current(6)
VCC = Max.,
VIN = VCC
VIN = GND
1.5
2.0
3.5(5)
5.5(5)
mA
Outputs Open
fCP = 10 MHZ
50% Duty Cycle
OE = EN = GND
fI = 5 MHZ
VIN = 3.4V
VIN = GND
One Bit Toggling
VCC = Max.,
Outputs Open
fCP = 10 MHZ
50% Duty Cycle
OE = EN = GND
Eight Bits Toggling
fI = 2.5 MHZ
VIN = VCC
VIN = GND
3.8
6.0
7.3(5)
VIN = 3.4V
VIN = GND
16.3(5)
50% Duty Cycle
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4 V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
PS2023A 03/11/96
4
PI74FCT821T/823T/825T
(25ΩSeries)P174FCT2821T/2823T
Bus Interface Registers
PI74FCT821/2821T Switching Characteristics over Operating Range
821AT/2821AT
Com.
821BT/2821BT
Com.
821CT/2821CT
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
t
t
PLH
PHL
PropagationDelay
C
R
C
R
C
R
L
L
L
L
L
L
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
= 50 pF
= 500Ω
1.5
10.0
1.5
7.5
1.5
6.0
ns
CP to Y
N
(OE = LOW)
1.5
4.0
2.0
4.0
2.0
1.5
6.0
7.0
6.0
1.5
1.5
1.5
1.5
20.0
1.5
3.0
1.5
3.0
0
15.0
1.5
3.0
1.5
3.0
0
12.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tSU
Setup Time HIGH or
LOW, D
Hold Time HIGH or
LOW, D to CP
N
to CP
tH
N
tSU
Setup Time HIGH or
LOW, EN to CP
Hold Time HIGH or
LOW, EN to CP
tH
t
PHL
PropagationDelay,
14.0
1.5
6.0
5.0
6.0
1.5
1.5
1.5
1.5
9.0
1.5
6.0
6.0
6.0
1.5
1.5
1.5
1.5
8.0
CLR to Y
N
tREM
Recovery Time,(3)
CLR to CP
tW
Clock Pulse Width(3)
HIGH or LOW
CLR Pulse Width(3)
LOW
tW
t
t
PZH
PZL
Output Enable Time
CL
RL
CL
RL
CL
RL
CL
RL
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
11.5
23.0
7.0
8.0
8.0
15.0
6.5
7.5
7.0
12.5
6.2
6.5
OE to Y
N
t
t
PHZ
PLZ
Output Disable Time(3)
OE to Y
N
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
PS2023A 03/11/96
5
PI74FCT821T/823T/825T
(25ΩSeries)P174FCT2821T/2823T
Bus Interface Registers
PI74FCT823/2823T Switching Characteristics over Operating Range
823AT/2823AT
Com.
823BT/2823BT
Com.
823CT/2823CT
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
t
t
PLH
PHL
PropagationDelay
C
R
C
R
C
R
L
L
L
L
L
L
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
= 50 pF
= 500Ω
1.5
10.0
1.5
7.5
1.5
6.0
ns
CP to Y
N
(OE = LOW)
1.5
4.0
2.0
4.0
2.0
1.5
6.0
7.0
6.0
1.5
1.5
1.5
1.5
20.0
1.5
3.0
1.5
3.0
0
15.0
1.5
3.0
1.5
3.0
0
12.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tSU
Setup Time HIGH or
LOW, D
Hold Time HIGH or
LOW, D to CP
N
to CP
tH
N
tSU
Setup Time HIGH or
LOW, EN to CP
Hold Time HIGH or
LOW, EN to CP
tH
t
PHL
PropagationDelay,
13.0
1.5
6.0
5.0
6.0
1.5
1.5
1.5
1.5
9.0
1.5
6.0
6.0
6.0
1.5
1.5
1.5
1.5
8.0
CLR to Y
N
tREM
Recovery Time,(3)
CLR to CP
tW
Clock Pulse Width (3)
HIGH or LOW
CLR Pulse Width (3)
LOW
tW
t
t
PZH
PZL
Output Enable Time
CL
RL
CL
RL
CL
RL
CL
RL
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
11.5
23.0
7.0
8.0
8.0
15.0
6.5
7.5
7.0
12.5
6.2
6.5
OE to Y
N
t
t
PHZ
PLZ
Output Disable Time(3)
OE to Y
N
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
PS2023A 03/11/96
6
PI74FCT821T/823T/825T
(25ΩSeries)P174FCT2821T/2823T
Bus Interface Registers
PI74FCT825T Switching Characteristics over Operating Range
825AT
Com.
825BT
Com.
825CT
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
t
t
PLH
PHL
PropagationDelay
C
R
C
R
C
R
L
L
L
L
L
L
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
= 50 pF
= 500Ω
1.5
10.0
1.5
7.5
1.5
6.0
ns
CP to Y
N
(OE = LOW)
1.5
4.0
2.0
4.0
2.0
1.5
6.0
7.0
6.0
1.5
1.5
1.5
1.5
20.0
1.5
3.0
1.5
3.0
0
15.0
1.5
3.0
1.5
3.0
0
12.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tSU
Setup Time HIGH or
LOW, D
Hold Time HIGH or
LOW, D to CP
N
to CP
tH
N
tSU
Setup Time HIGH or
LOW, EN to CP
Hold Time HIGH or
LOW, EN to CP
tH
t
PHL
PropagationDelay,
13.0
1.5
6.0
5.0
6.0
1.5
1.5
1.5
1.5
9.0
1.5
6.0
6.0
6.0
1.5
1.5
1.5
1.5
8.0
CLR to Y
N
tREM
Recovery Time,
CLR to CP
Clock Pulse Width
HIGH or LOW
CLR Pulse Width(3)
LOW
tW
tW
t
t
PZH
PZL
Output Enable Time
CL
RL
CL
RL
CL
RL
CL
RL
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
= 50 pF
= 500Ω
= 300 pF(3)
= 500Ω
11.5
23.0
7.0
8.0
8.0
15.0
6.5
7.5
7.0
12.5
6.2
6.5
OE to Y
N
t
t
PHZ
PLZ
Output Disable Time(3)
OE to Y
N
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS2023A 03/11/96
7
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