PS4532AEWP [ETC]
2-Channel Analog Multiplexer ; 2通道模拟多路复用器\n
| 型号： | PS4532AEWP |
| 厂家： | 
ETC |
| 描述： | 2-Channel Analog Multiplexer
|
| 文件： | 总15页 (文件大小：430K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
Latched Analog Multiplexers/Switches
Features
Description
• Low On-Resistance (60Ohm typ.) Minimizes Distortion
and Error Voltages
PS4530A/PS4531A/PS4532A are low voltage CMOS analog ICs
configured as an 8-channel multiplexer (mux) (PS4530A), two
4-channel muxes (PS4531A), and three single-pole/double-throw
switches (PS4532A). These devices are pin compatible with the
industry standard 74H4351/74HC4352/74HC4353. All devices have
two complementary switch-enable inputs and address latching.
• Single-Supply Operation (+2.0V to 12.0V)
• Dual-Supply Operation (± 2.0V to ± 6.0V)
• Improved Second Sources
for MAX4530A/MAX4531A/MAX4532A
The PS4530A/PS4531A/PS4532A operate from a single supply of
+2V to +12V, or from dual supplies of ±2V to ±6V. On-resistance
(65Ohm max.) is matched between switches to 2Ohm max. Each
switch can handle rail-to-rail analog signals. Off-leakage current is
• 35Ohm On-Resistance with ±5V supplies
• 65Ohm On-Resistance with ±5V supply
• TTL/CMOS Logic Compatible (w/ +5V or ±5V supplies)
• Fast Switching Speed, t and t
o
ON
OFF
only 1nAat TA = +25°C and 50nAat TA = +85 C.
= 150ns & 120ns at ±4.5V
All digital inputs have 0.8V and 2.4V logic thresholds, ensuring
both TTL-logic and CMOS-logic compatibility when using ±5V or
a single +5V supply.
• Break-Before-Make action eliminates momentary crosstalk
• Rail-to-Rail Analog Signal Range
• Low Power Consumption, <1µW
• Narrow SOIC and DIP Packages Minimize BoardArea
Applications
• Data Acquisition Systems
• Audio Switching and Routing
• Test Equipment
• PBX, PABX
• Telecommunication Systems
• Battery-Powered Systems
Functional Block Diagrams and Pin Configurations
Top View
PS4531A
Top View
PS4532A
Top View
PS4530A
V+
V+
20
19
V+
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
20
19
1
2
3
4
5
6
7
8
9
20
19
NO0B
NO1B
N.C.
NO1
NO2
N.C.
COM
NO7
NO5
EN1
NOB
NCB
NO1A
NO2
COMB
18 NO2A
18 NO4
17
18 COMC
N.C.
COMB
NO3B
NO2B
EN1
17
COMA NOA
17
16
15
14
13
12
NO0
NOC
NCC
ADDC
N.C.
16 NO0A COMA
16 NO6
15 NO3A
NCA
EN1
EN2
V–
15 ADDC
N.C.
14
N.C.
14
Logic
Logic
Logic
13
13
EN2
V–
EN2
V–
ADDB
ADDB
ADDB
ADDA
12
12
ADDA
ADDA
GND 10
GND 10
11 LE
GND 10
11 LE
11 LE
PS5431A
PS5430A
PS5432A
NARROW DIP/WIDE SO
NARROW DIP/WIDE SO
NARROW DIP/WIDE SO
PS8445A
06/20/00
1
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
TruthTable
ADDRESS BITS
ON SWITCHES
LE
EN2
EN1
ADDC*
ADDB
ADDA
PS4530
Last address
PS431
Last address
PS4532
Last address
0
X
X
1
0
0
X
1
X
X
X
X
X
X
X
X
X
All switches open
All switches open
All switches open
All switches open
All switches open
All switches open
X
COMA-NCA,
COMB-NCB,
COMC-NCC
COMA-NO0A,
COMB-NO0B
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
COM-NO0
COM-NO1
COM-NO2
COM-NO3
COM-NO4
COM-NO5
COM-NO6
COM-NO7
COMA-NOA,
COMB-NCB,
COMC-NCC
COMA-NO1A,
COMB-NO1B
COMA-NCA,
COMB-NOB,
COMC-NCC
COMA-NO2A,
COMB-NO2B
COMA-NOA,
COMB-NOB,
COMC-NCC
COMA-NO3A,
COMB-NO3B
COMA-NCA,
COMB-NCB,
COMC-NOC
COMA-NO0A,
COMB-NO0B
COMA-NOA,
COMB-NCB,
COMC-NOC
COMA-NO1A,
COMB-NO1B
COMA-NCA,
COMB-NOB,
COMC-NOC
COMA-NO2A,
COMB-NO2B
COMA-NOA,
COMB-NOB,
COMC-NOC
COMA-NO3A,
COMB-NO3B
X = Dont Care *ADDC not present of PS4531A.
Note:
NO_ and COM_ pins are identical and interchangeable. Either may be considered an input or an output;
signals pass equally well in either direction. LE is independent of EN1 and EN2.
PS8445A
06/20/00
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PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Voltages Referenced to V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other con-
ditions above those indicated in the operational
sections of this specification is not implied. Expo-
sure to absolute maximum rating conditions for
extended periods may affect reliability.
V+ ................................................................................................. 0.3Vto+13V
Voltage into Any Terminal(1)
or ±20mA (whichever occurs first) .......................................0.3Vto(V++0.3V)
Continuous Current into Any Terminal ................................................... ±20mA
PeakCurrent, NO, NC, orCOM_
(pulsed at 1ms, 10% duty cycle .............................................................. ±40mA
ESDperMethod3015.7 ........................................................................... >2000V
Continuous Power Dissipation (TA = +70°C)
PlasticDIP(derate11.11mW/°Cabove+70°C) ..................................... 889mW
SO(derate10.00mW/°Cabove+70°C) .................................................. 800mW
SSOP(derate8.00mW/°Cabove+70°C) ............................................... 640mW
Operating Temperature Ranges
PS453_C_P ................................................................................... 0°Cto+70°C
PS453_E_P ............................................................................... 40°Cto+85°C
Storage Temperature Range ..................................................... 65°Cto+150°C
Lead Temperture (soldering, 10s ............................................................... +30°C
Note:
Voltages exceeding V+ or V on any signal terminal are clampled by internal diodes.
Limitforward-diodecurrenttomaximumcurrantrating.
PS8445A
06/20/00
3
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
ElectricalSpecifications-DualSupplies
(V+ = +5V ±10%, V = 5V ±10%, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX
unless otherwise noted)
,
Parameter
Switch
Symbol
Conditions
Min(2) Typ(2) Max(2) Units
Analog Signal
Range
V
COM, VNO,
VNC_
Note(3)
V
V+
35
45
8
V
TA = +25°C
20
INO = 2mA,
VCOM = ±3.5V,
V+ = 4.5V, V = 4.5V
Channel On
Resistance
RON
TA = TMIN
to TMAX
TA = +25°C
6
8
On-Resistance
Matching Between
Channals(4)
INO = 2mA,
VCOM = ±3.5V,
V+ = 4.5V, V = 4.5V
Ohm
∆RON
TA = TMIN
to TMAX
12
4
TA = +25°C
INO = 2mA,
VCOM = 3V,0V, +3V;
V+ = 5V; V = 5V
On -Resistance
Flatnesss(5)
RFLAT(ON)
TA = TMIN
to TMAX
6
TA = +25°C
1
10
2
0.01
0.01
1
VNO = ±4.5V,
VCOM = ±4.5V,
V+ = 5.5V, V = 5.5V
NO-Off Leakage
Current(6)
INO(OFF)
TA = TMIN
to TMAX
10
2
TA = +25°C
VCOM = ±4.5V,
VNO ±4.5V,
V+ = 5.5V, V = 5.5V
PS4530A
TA = TMIN
to TMAX
100
1
100
1
COM-Off Leakage
Current(6)
ICOM(OFF)
TA = +25°C
0.01
0.01
0.01
VCOM = ±4.5V,
VNO ±4.5V,
V+ = 5.5V, V = 5.5V
PS4531A,
PS4532A
nΑ
TA = TMIN
to TMAX
50
2
50
2
TA = +25°C
PS4530A
TA = TMIN
to TMAX
100
1
100
1
VCOM = ±4.5V,
V+ = 5.5V,
V = 5.5V
COM-On Leakage
Current(6)
ICOM(ON)
TA = +25°C
PS4531A,
PS4532A
TA = TMIN
to TMAX
50
50
PS8445A
06/20/00
4
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
ElectricalSpecifications-DualSupplies(continued)
(V+ = +5V ±10%, V = 5V ±10%, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX
unless otherwise noted)
,
Parameter
Symbol
Conditions
Min(2) Typ(2) Max(2) Units
Digital Logic Input
V
ADD_H, VEN_H,
Logic High Threshold
Logic Low Threshold
TA = TMIN to TMAX
TA = TMIN to TMAX
1.5
1.5
2.4
VLE
V
VADD_H, VEN_H,
0.8
VLE
Input Current with
Input Voltage High
I
ADD_H, IEN_H,
VADD_H = 2.4V, VADD_L = 0.8V
0.1
0.1
0.01
0.1
0.1
ILE
µΑ
Input Current with
Input Voltage Low
I
ADD_L, IEN_L,
VADD_H = 2.4V, VADD_L = 0.8V
ILE
Supply
Power Supply Range
V+, V
I+
±2.0
1
±6
1
V
TA = +25°C
0.001
0.001
VEN = VADD_ = VLE = 0V/V+, V+
= 5.5V, V = 5.5V
Positive Supply Current
Negative Supply Current
TA = TMIN to TMAX
10
1
10
1
TA = +25°C
VEN = VADD_ = VLE = 0V/V+, V+
= 5.5V, V = 5.5V
I
TA = TMIN to TMAX
10
10
T
A = +25°C
1
0.01
60
1
VEN = VADD_ = VLE = 0V/V+, V+
= 5.5V, V = 5.5V
IGND Supply Current
Dynamic
IGND
TA = TMIN to TMAX
10
10
TA = +25°C
150
250
Transition Time
tTRANS
tBBM
Figure 1
Figure 3
Figure 2
TA = TMIN to TMAX
TA = +25°C
Break-Before-Make Interval
Enable Turn-On Time
4
10
10
TA = +25°C
150
250
100
150
tON(EN)
TA = TMIN to TMAX
TA = +25°C
40
Enable Turn-Off Time
tOFF(EN)
Figure 2
Figure 4
Figure 6
Figure 5
TA = TMIN to TMAX
TA = +25°C
ns
50
60
0
Setup Time, Channel
Select to Latch Enable
tS
TA = TMIN to TMAX
TA = +25°C
Hold Time,Latch Enable
to Channel Select
tH
TA = TMIN to TMAX
TA = +25°C
0
60
70
Pulse Width
Latch Enable
tMPW
TA = TMIN to TMAX
Charge Injection(3)
Off Isolation(7)
Q
1.5
5
pC
dB
VEN2 = 0V, RL = 1kOhm
f = 1 MHz
VISO
65
TA = +25°C
VEN1 = 0V, REN2 = 2.4V,
f = 1 MHz, VGEN = 1Vp-p,
RL = 1kOhm
Crosstalk Between Channels
VCT
92
PS8445A
06/20/00
5
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
ElectricalSpecifications-DualSupplies(continued)
(V+ = +5V ±10%, V = 5V ±10%, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX
unless otherwise noted)
,
Parameter
Distortion, THD
Symbol
Conditions
Min(2) Typ(2) Max(2) Units
0.025
Logic Input Capacitance
NO-Off Capacitance
CIN
f = 1 MHz
f = 1 MHz, VEN = VCOM = 0V
3
3
CNO(OFF)
PS4530A
15
f = 1 MHz,
EN2 = VCOM = 0V
TA = +25°C
COM-Off Capacitance
COM-On Capacitance
CCOM(OFF)
PS4531A
9
pF
V
PS4532A
PS4530A
PS4531A
PS4532A
6
26
20
17
f = 1 MHz,
EN1 = VCOM = 0V
EN2 = 2.4V
CCOM(ON)
V
V
ElectricalCharacteristics-Single5VSupply
(V+ = +5V ±10%, V = 0V, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX
unless otherwise noted)
,
Parameter
Symbol
Conditions
Min(2) Typ(2) Max(2) Units
Switch
Analog Signal Range
VCOM , VNO Note(3)
0
V+
65
75
V
T
A = +25°C
25
1
INO = 1mA, VCOM = 3.5V
V+ = 4.5V
On-Resistance
RON
TA = TMIN to TMAX
On-Resistance
Matching Between
Channels (3,4)
T
A = +25°C
TA = TMIN to TMAX
A = +25°C
8
INO = 1mA, VCOM = 3.5V
V+ = 4.5V
Ohm
∆RON
12
INO = 1mA, VCOM = 3V,2/V,1V,
V+ = 4.5V
On-Resistance Flatness
RFLAT
T
4
TA = +25°C
1
10
2
1
10
2
VNO = 4.5V, VCOM = 4.5V, 1V,
V+ = 4.5V
NO-Off Leakage
Current (8)
INO(OFF)
TA = TMIN to TMAX
TA = +25°C
PS4530A
VCOM = 4.5V, 1V;
VNO = 1V, 4.5V;
V+ = 5.5V
TA = TMIN to TMAX
100
1
100
1
COM-Off Leakage
Current (8)
ICOM(OFF)
TA = +25°C
PS453A,
PS4532A
nA
TA = TMIN to TMAX
A = +25°C
TA = TMIN to TMAX
A = +25°C
TA = TMIN to TMAX
50
2
50
2
T
PS4530A
100
1
100
1
COM-On Leakage
Current (8)
ICOM(ON)
T
PS4531A,
PS4532A
50
50
PS8445A
06/20/00
6
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
ElectricalCharacteristics-Single5VSupply
(V+ = +5V ±10%, V = 0V, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX, unless otherwise noted)
Parameter
Symbol
Conditions
Min(2) Typ(2) Max(2) Units
Digital Logic Input
VADD_H,
VEN_H, VLE
Logic-High Threshold
Logic-Low Threshold
2.4
TA = TMIN to TMAX
1.5
V
µA
V
VADD_L,
VEN_L, VLE
0.8
Input Current with
Input Voltage High
IADD_H,
IEN_H, ILE
VH = 2.4V, VL = 0.8V
0.1
0.1
Input Current with
Input Voltage Low
IADD_L,
IEN_L, ILE
Supply
Positive-Supply Range
2.0
1.0
10
1.0
10
12
1.0
10
T
A = +25°C
Positive-Supply Current
Negative-Supply Current
I+
I
TA = TMIN to TMAX
TA = +25°C
1.0
10
VEN_ = VADD = VLE = 0V, V+;
V+ = 5.5V; V = 0V
TA = TMIN to TMAX
µA
TA = +25°C
1.0
10
1.0
10
IGND Supply Current
Dynamic
IGND
TA = TMIN to TMAX
T
A = +25°C
90
200
250
Transition Time
tTRANS
tBBM
Figure 1, VNO =3V
Figure 3 (3)
TA = TMIN to TMAX
TA = +25°C
Break-Before-Make Interval
Enable Turn-On Time(3)
10
20
T
A = +25°C
TA = TMIN to TMAX
A = +25°C
TA = TMIN to TMAX
A = +25°C
100
200
250
100
150
tON(EN)
Figure 2
T
40
Enable Turn-Off Time(3)
tOFF(EN)
Figure 3
ns
T
50
60
0
Set-Up Time, Channel
Select to Latch Enable
tS
TA = TMIN to TMAX
TA = +25°C
Hold Time, Latch Enable
to Channel Select
tH
Figure 7
TA = TMIN to TMAX
TA = +25°C
0
60
70
Pulse Width, Latch Enable
Charge Injection(3)
tMPW
Q
TA = TMIN to TMAX
TA = +25°C
Figure 7, CL = 1nF, VNO = 0V
1.5
5
pC
PS8445A
06/20/00
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PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
ElectricalCharacteristics-Single3VSupply
(V+ = +2.7V to 3.6V, V = 0V, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.5V, TA = TMIN to TMAX, unless otherwise noted)
Parameter
Symbol
Conditions
Min(2) Typ(2) Max(2) Units
Switch
Analog Signal Rnage
VANALOG
RON
Note 3
0
V+
185
250
V
TA = +25°C
75
INO = 1mA, VCOM = 1.5V
V+ = 2.7V
On-Resistance
Ohm
TA = TMIN to TMAX
Dynamic
Figure 1, VIN = 2.4V
Transistion Time(3)
tTRANS
tON(EN)
tOFF(EN)
tS
150
150
60
350
350
180
VNO1 = 1.5V, VNO8 = 0V
Figure 3, VINH = 2.4V
Enable Turn-On Time(3)
Enable Turn-Off Time(3)
VINL = 0V, VNO1 = 1.5V
Figure 3, VINH = 2.4V
VINL = 0V, VNO1 = 1.5V
TA = +25°C
ns
Set-Up Time, Channel
Select to Latch Enable
100
Note 3
Hold Time, Latch Enable
to Channel Select
tH
0
Pulse Width, Latch Enable
tMPW
120
Notes:
2. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum,
is used in this data sheet.
3. Guaranteed by design
4. ∆R = R (max) - R (min)
ΟΝ
ΟΝ
ΟΝ
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured over the specified
analog ranges, i.e., VNO = 3V to 0V and 0V to 3V.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at T = +25ºC.
A
7. Worst-case isolation is on channel 4 because of its proximity to the COM pin.
Off isolation = 20log V
/V , V
= output, V = input to off switch
COM NO
COM NO
8. Leakage testing at single supply is guaranteed by testing with dual supplies.
PS8445A
06/20/00
8
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
Applications Information
Power-Supply Considerations
Overview
The PS4530A/PS4531A/PS4532A construction is typical of most V+ reaches +12V, the threshold is about 3.1V above the TTL
CMOS analog Switches. They have three supply pins: V+, V, and guaranteed, high-level minimum of 2.8V, but still compatible with
GND. V+ and V- drive the the internal CMOS switches and set the CMOS outputs.
limits of the analog voltage on any switch. Reverse ESD-protection
Bipolar Supplies
diodes are internally connected between each analog-signal pin
The PS4530A/PS4531A/PS4532A operate with bipolar supplies
and both V+ and V-. One of these diodes conducts if any signal
between ±2.0V and ±6V. V+ and V- supplies need not be symmetri-
exceeds V+ or V-. During normal operation, these and other
cal, but their sum cannot exceed the +13V absolute maximum rating.
reverse-biased ESD diodes leak, forming the only current drawn
Single Supply
from V+ or V.
PS4530A/PS4531A/PS4532A operate from a single supply
Virtually all of the analog leakage current comes from the ESD
between +2V and 12V when V is connected to GND. All bipolar
diodes. Although the ESD diodes on a given signal pine are iden-
precautions must be observed. At room temperature, they actually
tical and therefore fairly well balanced, they are reverse biased
work with a single supply at, near, or below +1.7V, although as
differently. Each is biased by either V+ or V- and the analog signal.
supply voltage decreases, switch on-resistance and switching times
This means their leakages vary as the signal varies. The difference
become very high.
in the two diode leakages to the V+ and V pins constitutes the
High-Frequency Performance
analog-signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the other
switch terminal. For this reason, both sides of a given switch can
show leakage currents of either the same or opposite polarity.
In 50Ohm systerns, signal response is reasonably flat up to 50MHz
(see Typical Operating Characteristics). Above 20MHz, the on
response has several minor peaks that are highly layout depen-
dent. The problem is not in turning the switch on, but in turning it
off. The off-state switch acts lilke a capacitor and passes higher
frequencies with less attenuation. At 10MHz, off isolation is about
65dB in 50 Ohm systems, becoming worse (approximately 21dB
per decade) as frequency increases. Higher circuit impedances
also make off isolation worse. Adjacent channel attenuation is
about 3dB above that of a bare IC socket, and is due entirely to
capacitive coupling.
The signal paths and GND are not connected.
V+ and GND power the internal logic and logic-level translators,
and set both the input and output logic limits. The logic level
translators convert the logic levels into switched V+ and V- sig-
nals to drive the analog signals gates. This drive signal is the only
connection between the logic supplies and signals and the analog
supplies. V+ and V- have ESD-protection diodes to GND.
The logic-level thresholds are TTL/CMOS compatible when
V+ = +5V. As V+ rises, the threshold increases slightly, so when
PS8445A
06/20/00
9
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
TestCircuits/TimingDiagrams
V+
V+
50%
V
ADD_
LE V+
ADDC
0V
+3V
–3V
NO0
NO1-NO6
ADDB
V
NO0
ADDA
50
90%
PS4530A
NO7
0V
V+
EN2
EN1
V
V
COM
OUT
OUT
90%
GND
V-
V
35pF
NO7
300
V–
t
t
trans
trans
V+
V+
0V
VADD_
50%
LE V+
V
ADDA
ADDB
ADD_
+3V
–3V
NO0
NO1_-NO2_
V
NO0
50
90%
PS4531A
NO3_
COM
V+
EN2
EN1
0V
V
OUT
V
OUT
GND
V-
90%
35pF
V
NO3
300
V–
t
t
trans
trans
V+
VADD_
V+
0V
LE V+
ADD_
50%
V
+3V
–3V
NO_
NC_
ADD_
50
V
NC_
PS4532A
90%
V+
EN2
EN1
V
COM
300
OUT
0V
V
GND
V-
OUT
35pF
90%
V
NO_
V–
t
t
trans
trans
Figure 1.Address Transition Time
PS8445A
06/20/00
10
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
TestCircuits/TimingDiagrams(continued)
V+
V+
0V
50%
V
V
EN1
LE V+
ADDC
+3V
NO0
ADDB
ADDA
V
NO1-NO7
NO0
90%
PS4530A
VEN1
V
COM
V–
OUT
OUT
EN1
EN2
V+
50
300
35pF
90%
GND
0V
t
t
ON
V–
OFF
V+
V+
0V
50%
LE V+
V
ADDA
ADDB
EN1
+3V
NO0_
NO1_NO2_NO3_
V
NO0
PS4531A
90%
VEN
V
COM_
OUT
V
EN1
EN2
OUT
V+
50
300
35pF
GND
V–
V–
90%
0V
t
t
ON
OFF
V+
V+
0V
50%
LE V+
V
V
EN1
NO0_
ADD_
V
NO0
NC_
+3V
PS4532A
90%
VEN1
V
COM_
OUT
EN1
EN2
OUT
V+
50
300
35pF
GND
V–
90%
0V
V–
t
t
ON
OFF
V = 0V for Single-Supply Operation.
Repeat Test for Each Section
Repeat Test for EN2, with Pulse Inverted and EN1 Connected to GND.
Figure 2. Enable Switching Time
PS8445A
06/20/00
11
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
V+
VADD_
LE V+
ADDC
ADDB
ADDA
NO1-NO7
+3V
300
50
PS4530A
V
COM
OUT
V+
EN1
EN2
35pF
GND
V–
V–
V+
t
t
= <20ns
= <20ns
F
R
V+
0V
V
50%
VADD_
ADD_
LE V+
ADDA
ADDB
NO0_-NO3_
+3V
300
V
50
NO_
90%
PS4531A
V
COM
OUT
V
OUT
V+
EN2
EN1
35pF
GND
V–
0V
V–
t
BBM
V+
VADD_
LE V+
ADD_
NO_-NO3_
COM
50
+3V
300
V
OUT
PS4532A
V+
EN2
EN1
35pF
GND
V–
V–
V = 0V for Single-Supply Operation.
Repeat Test for Each Section
Figure 3. Break-Before-Make Interval
PS8445A
06/20/00
12
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
V+
LE V+
ADDC
ADDB
ADDA
V+
NO_
VNO =0V
Channel
Select
V
EN1
0V
PS4530A
PS4531A
PS4532A
V
V
VEN1
V+
OUT
OUT
COM
VOUT
EN1
EN2
CL = 1000pF
GND
V–
50
V
is the measured voltage resulting from charge-transfer
OUT
V–
error Q when the channel turns off.
Q = x CL
V
OUT
V– = 0V for single-supply operation.
Repeat test for each section.
Figure 4. Charge Injection
V+
NETWORK
ANALYZER
LE V+
ADDC
Channel
Select
VOUT
VIN
OFF ISOLATION = 20log
ON LOSS = 20log
ADDB
ADDA
VIN
NO_
PS4530A
PS4531A
PS4532A
50
50
VOUT
VIN
MEASUREMENT
50
REF
VOUT
VOUT
VIN
COM_
CROSSTALK = 20log
V+
EN2
EN1
50
GND
V–
V–
Measurements are standardized against short at socket terminals.
Off isolation is measured between COM_ and OFF NO_ terminal on each switch.
On loss is measured between COM_ and ON terminal on each switch.
Crosstalk (PS4531/PS4532) is measured from one channel (A,B,C) to all other channels.
Signal direction through switch is reversed; worst values are recorded.
Figure 5. Off Isolation, On Loss, and Crosstalk
V+
LE V+
ADDC
Channel
Select
NO_
ADDB
NO_
PS4530A
ADDA
PS4531A
PS4532A
1MHz
CAPACITANCE
ANALYZER
V+
EN2
EN1
COM
GND
V–
V–
Figure 6. NO/COM Capacitance
PS8445A
06/20/00
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PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
V+
VADD_
EN2 V+
ADDC
ADDB
ADDA
NO1-NO7
+3V
300
50
PS4530A
V
COM
OUT
VLE
LE
35pF
EN1
GND
V–
50
t
MPW
3V
V–
V
LE
50%
0V
t
t
t
H
S
H
V+
3V
V
50%
ADD_
0V
VADD_
EN2 V+
ADDA
ADDB
t
,t
ON OFF
NO1_NO2_NO3_
+3V
300
3V
50
90%
NO0_
V
OUT
PS4531A
V
0V
COM_
OUT
VLE
LE
35pF
EN1
GND
V–
V–
50
V+
VADD_
EN2 V+
ADD_
NO_
50
NC_
+3V
300
PS4532A
V
COM_
OUT
VLE
LE
35pF
EN1
GND
V–
V–
50
V = 0V for Single-Supply Operation.
Repeat Test for Each Section
Figure 7. Setup and Hold Times, Minimum LE Width
PS8445A
06/20/00
14
PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
LatchedAnalogMultiplexers/Switches
Ordering Information
Part
Temp. Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
Pin-Package
20 Plastic DIP
20 SO
PS4530ACPP
PS4530ACWP
PS4530ACAP
PS4530AEPP
PS4530AEWP
PS4530AEAP
PS4531ACPP
PS4531ACWP
PS4531ACAP
PS4531AEPP
PS4531AEWP
PS4531AEAP
PS4532ACPP
PS4532ACWP
PS4532ACAP
PS4532AEPP
PS4532AEWP
PS4532AEAP
20 SSOP
40°C to +85°C 20 Plastic DIP
40°C to +85°C 20 SO
40°C to +85°C 20 SSOP
0°C to +70°C
0°C to +70°C
0°C to +70°C
20 Plastic DIP
20 SO
20 SSOP
40°C to +85°C 20 Plastic DIP
40°C to +85°C 20 SO
40°C to +85°C 20 SSOP
0°C to +70°C
0°C to +70°C
0°C to +70°C
20 Plastic DIP
20 SO
20 SSOP
40°C to +85°C 20 Plastic DIP
40°C to +85°C 20 SO
40°C to +85°C 20 SSOP
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
PS8445A
06/20/00
15
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