PT5061B [ETC]

Analog IC ; 模拟IC\n


型号：	PT5061B
厂家：	ETC
描述：	Analog IC 模拟IC\n 模拟IC
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PT5060 Series

9-W +5V-Input Dual-Output

Integrated Switching Regulator

SLTS027B

(Revised 12/19/2001)

Features

• Single Device:

Description

+ꢀV Input

The PTꢀ060 series of dual-output

Integrated Switching Regulators (ISRs)

provide a complimentary ±±1V or ±±ꢀV

from a single +ꢀV input. Applications

include systems that require power for

analog interface circuitry, such as D/A

and A/D converters, and Op Amps. The

output voltage can be adjusted with an

external resistor. These ISRs are made

available in a ±1-pin single in-line pin

(SIP) package. Note that these modules

are are not short-circuit protected.

• Complimentary Dual Output:

±±1V, ±±ꢀV

• Wide Input Voltage Range

• 8ꢀ% Efficiency

• Adjustable Output Voltage

• Laser-trimmed

Pin-Out Information

Ordering Information

PT 5061¨ = ±±1 Volts

PT 5062¨ = ±±ꢀ Volts

Pin Function

–Vo₁

GND

V_in

Standard Application

PT Series Suffix

(PT1234x)

V_oadj

V_in

Case/Pin

O rder

Package

Configuration

Suffix

Code *

–Vo₂

+Vo₁

ꢀ

V_in

Vin

3,4,5

PT5060

Vertical

Horizontal

SMD

Vertical, Side Tabs

Horizontal, Side Tabs

SMD, Side Tabs

(ECD)

(ECA)

(ECC)

(ECE)

(ECG)

(ECK)

8,9,10

6GND

GND

2,6,7

+Vo_±

C₁

100µF

+Vo_±

COM

±0

±±

±1

+Vo_±

V_oAdj

* Previously known as package style 300.

Do Not Connect

C_±= Required ±00µF electrolytic

(Reference the applicable package code drawing

for the dimensions and PC board layout)

Specifications (Unless otherwise stated, T_a=1ꢀ°C, V_in=+ꢀV, I_o=I_omax, C_±=±00µF)

PT5060 SERIES

Characteristics

Symbol

Conditions

Min

Typ

Max

Units

Output Current

I_o

Over V_inrange

Vo_±= +±1V

Vo₁= –±1V

0.0ꢀ

—

0.ꢀ0

0.1ꢀ

(±)

Vo_±= +±ꢀV

Vo₁= –±ꢀV

0.0ꢀ

—

0.40

0.10

(1)

(3)

Current Limit

Inrush Current

I_lim

—

±ꢀ0

—

%I_omax

I_ir

t_tr

On start up

—

ꢀ.ꢀ

—

mSec

Input Voltage Range

V_in

Over I_orange

4.7ꢀ

—

+V_o–±

Output Voltage Tolerance

∆V_o

Over V_inand I_oranges

+Vo_±

–Vo₁

—

±±.ꢀ

±ꢀ

±3.0

±±0

%V_o

T_a= 0°C to SOA limit ⁽³⁾

Line Regulation

Load Regulation

V_oRipple (pk-pk)

Reg_line

Reg_load

V_n

Over V_inrange

—

±0.ꢀ

±±.0

%V_o

0.± ≤ I_o≤ I_omax

10MHz bandwidth

+Vo_±

–Vo₁

—

±±.ꢀ

±1

±3

%V_o

Transient Response

t_tr

1ꢀ% load change

—

±00

—

ꢀ

µSec

%V_o

V_os

V_oover/undershoot

Efficiency

I_o=0.1A each output

Over V_inand I_oranges

—

8ꢀ

6ꢀ0

—

Switching Frequency

Operating Temperature Range

Storage Temperature

Mechanical Shock

ƒ_s

—

kHz

°C

T_a

T_s

+8ꢀ ⁽⁴⁾

+±1ꢀ

–40

—

Per Mil-STD-883D, Method 1001.3,

± msec, Half Sine, mounted to a fixture

—

ꢀ00

—

G’s

Mechanical Vibration

Per Mil-STD-883D, Method 1007.1

10-1000 Hz, Soldered in a PC board

±ꢀ

—

G’s

—

Weight

6.ꢀ

grams

Notes: (1)Do not operate thes negative output rail of these ISRs below the minimum load.

(2)ISRs based on

a boost topology are not short-circuit protected.

(3)The inrush current stated is above the normal input current for the associated output load.

(4)See Safe Operating Area curves or consult the factory for the appropr.iate derating

For technical support and more information, see inside back cover or visit www.ti.com

Typical Characteristics

PT5060 Series

9-W +5V-Input Dual-Output

Integrated Switching Regulator

PT5061 +/- 12VDC (See Note A)

PT5062 +/- 15V (See Note A)

Efficiency vs Output Current

100

Vin

14.0V

12.0V

10.0V

7.0V

Vin

11.0V

8.0V

7.0V

5.0V

4.75V

5.0V

4.75V

-12V load=0.2Adc

+12Vout 0-0.5Adc

-15V load=0.2Adc

+15Vout 0-0.4Adc

0.1

0.2

0.3

0.4

0.5

0.1

0.2

0.3

0.4

Iout-(Amps)

Ripple Voltage vs Output Current

100

300

250

200

150

100

-15V load=0.2Adc

+15Vout 0-0.4Adc

-12V load=0.2Adc

+12Vout 0-0.5Adc

Vin

4.75V

5.0V

4.75V

5.0V

7.0V

10.0V

12.0V

14.0V

7.0V

8.0V

11.0V

0.1

0.2

0.3

0.4

0.5

0.1

0.2

0.3

0.4

Iout-(Amps)

Power Dissipation vs Output Current

1.6

1.2

0.8

0.4

1.6

1.2

0.8

0.4

-15V load=0.2Adc

+15Vout 0-0.4Adc

-12V load=0.2Adc

+12Vout 0-0.5Adc

Vin

4.75V

5.0V

7.0V

10.0V

12.0V

14.0V

5.0V

7.0V

8.0V

11.0V

0.1

0.2

0.3

0.4

0.5

0.1

0.2

0.3

0.4

Iout-(Amps)

Safe Operating Area, V_in=5.0V; lo₂= 0.25A (See Note B)

Safe Operating Area V_in= 5.0V, lo₂= 0.2A (See Note B)

Airflow

100 LFM

60 LFM

0 LFM

Airflow

100 LFM

60 LFM

0 LFM

0.0

0.1

0.2

0.3

0.4

0.0

0.1

0.2

0.3

0.4

0.5

Maximum Positive Output Current (A)

Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the Converter.

Note B: Thermal derating graphs are developed in free-air convection cooling, which corresponds to approximately 40–60LFM of airflow.

For technical support and more information, see inside back cover or visit www.ti.com

Application Notes

PT5060 Series

Adjusting the Output Voltage of the PT5060

Dual-Output Boost Converter Series

The values of (R_±) [adjust down], and R₁[adjust up], can

also be calculated using the following formulas.

The dual output voltage of the PTꢀ060 series modules

can be adjusted higher or lower than the factory pre-set

voltage with the addition of a single external resistor.

Table ± gives the applicable adjustment range for each

model in the series as V_a(min) and V_a(max).

3.6ꢀ (V_a– 1.ꢀ )

(V_o– V_a)

(R_±)

R₁

- 0.±

kΩ

Adjust Up: An increase in the output voltage is obtained

by adding a resistor R₁, between pin ±± (V_oadj) and pins

1, 6, or 7 (GND).

9.±1ꢀ

V_a- V_o

- 0.±

Adjust Down: Add a resistor (R_±), between pin ±± (V_oadj)

and pins 8, 9 or ±0 (Vo_±).

Where: V_o= Original output voltage

V_a= Adjusted output voltage

Refer to Figure ± and Table 1 for both the placement and value

of the required resistor, either (R_±) or R₁as appropriate.

Table 1

PT5060 ADJUSTMENT AND FORMULA PARAMETERS

Notes:

Series Pt #

PT5061

PT5062

±. Both the positive and negative voltage outputs from the

ISR are adjusted simultaneously.

(nom)

(min)

(max)

±±1.0V

± 7.ꢀV

±±4.0V

±±ꢀ.0V

± 7.ꢀV

±10.0V

1. Use only a single ±% resistor in either the (R_±) or R₁

location. Place the resistor as close to the ISR as possible.

3. Never connect capacitors from V_oadj to either GND or

V_o. Any capacitance added to the V_oadjust pin will affect

the stability of the ISR.

Table 2

PT5060 ADJUSTMENT RESISTOR VALUES

Series Pt #

PT5061

PT5062

Current

V_o(nom)

0.5/0.25Adc

12.0Vdc

0.4/0.2Adc

15.0Vdc

4. An increase in the output voltage must be accompanied by

a corresponding reduction in the specified maximum

current at each output. For Vo_±and –Vo₁, the revised

maximum output current must be reduced to the

equivalent of 6 watts and 3 watts respectively. i.e.

V_a(req’d)

7.0

7.ꢀ

8.0

(4.0)kΩ

(4.9)kΩ

(1.3)kΩ

(1.8)kΩ

(3.3)kΩ

(3.9)kΩ

(4.6)kΩ

(ꢀ.4)kΩ

(6.4)kΩ

(7.7)kΩ

(9.3)kΩ

(±±.ꢀ)kΩ

(±4.ꢀ)kΩ

(±9.±)kΩ

(16.7)kΩ

(4±.9)kΩ

(87.ꢀ)kΩ

8.ꢀ

(6.1)kΩ

Io_±(max)

Io₁(max)

Adc

V_a

9.0

(7.8)kΩ

and

Adc,

9.ꢀ

(±0.±)kΩ

(±3.6)kΩ

(±9.4)kΩ

(30.9)kΩ

(6ꢀ.6)kΩ

±0.0

±0.ꢀ

±±.0

±±.ꢀ

±1.0

±1.ꢀ

±3.0

±3.ꢀ

±4.0

±4.ꢀ

±ꢀ.0

±ꢀ.ꢀ

±6.0

±6.ꢀ

±7.0

±7.ꢀ

±8.0

±8.ꢀ

±9.0

±9.ꢀ

10.0

where V_ais the adjusted output voltage.

ꢀ. Adjustments to the output voltage will also limit the

maximum input voltage that can be applied to the ISR.

The maximum input voltage that may be applied is limited

to (V_o– ±)Vdc or ±4Vdc, whichever is less.

±8.1kΩ

9.0kΩ

6.0kΩ

4.ꢀkΩ

Figure 1

±8.1kΩ

9.0kΩ

6.0kΩ

4.ꢀkΩ

3.6kΩ

1.9kΩ

1.ꢀkΩ

1.1kΩ

±.9kΩ

±.7kΩ

–Vo₂

3,4,5

V_in

Vin

PT5060

8,9,10

+Vo₁

+Vo ₁

GND

2,6,7

Vo(adj)

(R₁

)

Adj Down

C _out

100

R ₂

Adjust Up

C O M

R_±= (Blue)

R₁= Black

For technical support and more information, see inside back cover or visit www.ti.com

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PT5061B [ETC]

相关型号：

PT5061C

PT5061G

PT5061N

PT5061R

PT5062

PT5062

PT5062A

PT5062B

PT5062C

PT5062G

PT5062N

PT5062R