PT7A7522 [ETC]

4.38V Reset Active High Supervisor? ; 4.38V复位高有效监?\n
PT7A7522
型号: PT7A7522
厂家: ETC    ETC
描述:

4.38V Reset Active High Supervisor?
4.38V复位高有效监?\n

文件: 总12页 (文件大小:57K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Features  
Introduction  
• Precision supply-voltage monitor  
- 4.63V (PT7A7511, 7521, 7531)  
- 4.38V (PT7A7512, 7522, 7532)  
- 3.08V (PT7A7513, 7523, 7533)  
- 2.93V (PT7A7514, 7524, 7534)  
- 2.63V (PT7A7515, 7525, 7535)  
- 2.32V (PT7A7516, 7526, 7536)  
- 2.20V (PT7A7517, 7527, 7537)  
• 200ms reset pulse width  
The PT7A751X/752X/753X family microprocessor  
(µP) supervisory circuits are targeted to improve  
reliability and accuracy of power-supply circuitry in  
µP systems. These devices reduce the complexity and  
number of components required to monitor power-  
supply and battery functions.  
The main functions are:  
1. Asserting reset output during power-µp, power-  
down and brownout conditions for µP system;  
2. Detecting power failure or low-battery conditions  
with a 1.25V threshold detector;  
• Debounced TTL/CMOS-compatible manual-  
reset input  
• Independent watchdog timer 1.6sec time-out (not  
available for PT7A7531 - 7537)  
3. Watchdog functions (not for PT7A753x).  
• Reset output signal:  
- Active-low only (PT7A7511 - 7517)  
- Active-high only (PT7A7521 - 7527)  
- Active-high and active-low (PT7A7531 - 7537)  
Voltage monitor for power-fail or low battery warning  
• Guaranteed RESET/RESET valid at VCC = 1.2V  
Applications  
• Power-supply circuitry in µP systems  
PT0082(05/02)  
Ver:1  
1
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Contents  
Features ....................................................................................................................................................... 1  
Block Diagram ............................................................................................................................................ 1  
Introduction ................................................................................................................................................. 1  
Pin Information ........................................................................................................................................... 4  
Pin Configuration .............................................................................................................................. 4  
Pin Description .................................................................................................................................. 4  
Functional Description ................................................................................................................................ 5  
Reset Output ...................................................................................................................................... 5  
Watchdog Timer ................................................................................................................................ 5  
Manual Reset ..................................................................................................................................... 5  
Power-Fail Comparator ..................................................................................................................... 5  
Function Reference Table .................................................................................................................. 6  
Detailed Specifications ................................................................................................................................ 7  
Absolute Maximum Ratings .............................................................................................................. 7  
Recommended Operation Condition ................................................................................................. 7  
DC Electrical Characteristics ............................................................................................................. 8  
AC Electrical Characteristics ............................................................................................................. 9  
Ordering Information ................................................................................................................................ 10  
Mechanical Information ............................................................................................................................ 11  
Notes ......................................................................................................................................................... 12  
PT0082(05/02)  
Ver:1  
2
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Block Diagram  
Figure 1. Block Diagram of PT7A7511-7517/7521-7527  
Watchdog  
Transition Detector  
Watchdog Timer  
WDI  
WDO  
V
cc  
Timebase for Reset  
& Watchdog  
250uA  
MR  
Vcc  
RESET  
Reset Generator  
(RESET)  
V
RST  
PFI  
PFO  
1.25V  
Figure 2. Block Diagram of PT7A7531-7537  
Vcc  
250uA  
RESET  
RESET  
MR  
Reset Generator  
Vcc  
V
RST  
PFI  
PFO  
1.25V  
PT0082(05/02)  
Ver:1  
3
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Pin Information  
Pin Configuration  
Figure 3. Pin Configuration  
PT7A7511P-7517P  
PT7A7511W-7517W  
8-Pin PDIP/8-Pin SOIC  
PT7A7521P-7527P  
PT7A7521W-7527W  
8-Pin PDIP/8-Pin SOIC  
PT7A7531P-7537P  
PT7A7531W-7537W  
8-Pin PDIP/8-Pin SOIC  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
WDO  
RESET  
WDI  
WDO  
RESET  
WDI  
RESET  
RESET  
NC  
MR  
VCC  
MR  
VCC  
MR  
VCC  
GND  
PFI  
GND  
PFI  
GND  
PFI  
PFO  
PFO  
PFO  
Top View  
Pin Description  
Table 1. Pin Description  
Pin Name  
MR  
Type  
I
Description  
Manual-Reset: triggers a reset pulse when pulled below 0.8V, active low. It has an internal 250µA  
pull-up current and be driven from a TTL or CMOS logic line as well as shorted to ground with a  
switch.  
Vcc  
Power  
Power Supply  
GND  
Ground  
Ground Reference for all signals  
Power-Fail Voltage Monitor Input: When PFI is less than 1.25V, PFO goes low. Connect PFI to  
GND or Vcc when not used.  
PFI  
I
Power-Fail Output: it gets low and sinks current when PFI is less than 1.25V; otherwise PFO stays  
high.  
PFO  
O
Watchdog Input: If WDI remains high or low for 1.6sec, the internal watchdog timer runs out and  
WDO goes low. Floating WDI or connecting WDI to a high-impedance three-state buffer disables  
the watchdog feature. The internal watchdog timer clears whenever reset is asserted. WDI is three-  
stated, or WDI sees a rising or falling edge.  
WDI  
I
NC  
No Connect  
Reset Output pulses: low for 200ms when triggered, and stays low whenever Vcc is below the reset  
threshold. It remains low for 200ms after Vcc rises above the reset threshold or MR goes from low  
to high. A watchdog timeout will not trigger RESET unless WDO is connected to MR.  
RESET  
O
Watchdog Output: pulls low when the internal watchdog timer finishes its 1.6sec count and does  
not go high again until the watchdog is cleared. WDO also goes low during low-line conditions.  
Whenever Vcc is below the reset threshold, WDO stays low; however, unlike RESET, WDO does  
not have minimum pulse width. As soon as Vcc rises above the reset threshold, WDO goes high  
with no delay.  
WDO  
O
O
RESET  
The inverse of RESET: active high. Whenever RESET is high, RESET is low.  
PT0082(05/02)  
Ver:1  
4
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Watchdog Timer  
Functional Description  
The watchdog circuit monitors the µPs activity. If the µP does  
not toggle the watchdog input (WDI) within 1.6sec and WDI is  
The PT75xx family can assert reset output during power-up,  
power-down and brownout conditions for uP system, detect  
not in high impedance, WDO goes low. As long as RESET is  
power failure or low-battery conditions with a 1.25V threshold  
asserted or the WDI input is in high impedance, the watchdog  
detector and have watchdog functions. Refer to Table 2 for  
timer will stay cleared and will not count. As soon as reset is  
their individual features. The typical application see Figure 4.  
released and WDI is driven high or low, the timer will start  
counting. Pulses as short as 50ns can be detected.  
Reset Output  
Typically, WDO will be connected to the non-maskable  
The supervisory circuits can assert reset for a microprocessor  
interrupt input (NMI) of a µP. When VCC drops below the reset  
during power-up, power-down and brownout to prevent code  
threshold, WDO will go low whether or not the watchdog timer  
execution errors.  
has timed out yet. Normally this would trigger an NMI  
interrupt, but RESET goes low simultaneously, and thus  
On power-up, once VCC reaches about 1.2V, RESET is a  
overrides the NMI interrupt. If WDI is left unconnected, WDO  
guaranteed logic low of 0.4V or less.AsVCC rises, RESET stays  
can be used as a low-line output. Since floating WDI disables  
low. WhenVCC rises above the reset threshold, an internal timer  
the internal timer, WDO goes low only when VCC falls below  
releases RESET after about 200ms. RESET pulses low whenever  
the reset threshold, thus functioning as a low-line output.  
VCC drops below the reset threshold (brownout condition). If  
brownout occurs in the middle of a previously initiated reset  
pulse, the pulse continues for at least another 140ms.  
Manual Reset  
The manual-reset input (MR) allows reset to be triggered by a  
On power-down, once VCC falls below the reset threshold,  
push-button switch. The switch is effectively debounced by  
RESET stays low and is guaranteed to be 0.4V or less untilVcc  
the 140ms minimum reset pulse width. MR is TTL/CMOS  
drops below 1V.  
logic compatible, so it can be driven by any logic reset output.  
The PT7A752x and PT7A753x active-high RESET output is  
Power-Fail Comparator  
simply the complement of the RESET output, and is guaranteed  
to be valid with VCC down to 1.2V. Some µPs, such as Intels  
80C51, require an active-high reset pulse.  
The power-fail comparator will send out a Low signal once  
detects a voltage lowered than 1.25V. It can be used for various  
purposes because its output and non-inverting input are not  
internally connected. The inverting input is internally  
connected to a 1.25V reference.  
Figure 4. Typical Application Circuit  
DC Linear  
Regulator  
IN  
µP  
OUT  
Vcc  
RESET  
Vcc  
RESET  
P
Supervisory  
µ
I/O Line  
NMI  
Interrupt  
Circuit  
PFI  
MR  
WDI  
WDO  
PFO  
PT0082(05/02)  
Ver:1  
5
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Function Reference Table  
Table 2. Function Table of PT7A75xx Family  
Nom. Reset Time Nom. Watch dog  
Reset Active Low  
or High  
Power Fail  
Comp.  
Manual Reset  
Input  
Part No.  
Reset Threshold  
(ms), tRS  
Time (sec), tWD  
PT7A7511  
PT7A7521  
PT7A7531  
PT7A7512  
PT7A7522  
PT7A7532  
PT7A7513  
PT7A7523  
PT7A7533  
PT7A7514  
PT7A7524  
PT7A7534  
PT7A7515  
PT7A7525  
PT7A7535  
PT7A3516  
PT7A3526  
PT7A3536  
PT7A7517  
PT7A7527  
PT7A7537  
4.63V  
4.63V  
4.63V  
4.38V  
4.38V  
4.38V  
3.08V  
3.08V  
3.08V  
2.93V  
2.93V  
2.93V  
2.63V  
2.63V  
2.63V  
2.32V  
2.32V  
2.32V  
2.20V  
2.20V  
2.20V  
LOW  
HIGH  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
200  
1.6  
1.6  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
1.25V detector  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
LOW, HIGH  
LOW  
unavailable  
1.6  
HIGH  
1.6  
LOW, HIGH  
LOW  
unavailable  
1.6  
HIGH  
1.6  
LOW, HIGH  
LOW  
unavailable  
1.6  
HIGH  
1.6  
LOW, HIGH  
LOW  
unavailable  
1.6  
HIGH  
1.6  
LOW, HIGH  
LOW  
unavailable  
1.6  
HIGH  
1.6  
LOW, HIGH  
LOW  
unavailable  
1.6  
HIGH  
1.6  
LOW, HIGH  
unavailable  
PT0082(05/02)  
Ver:1  
6
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Detailed Specifications  
Absolute Maximum Ratings  
Note:  
Storage Temperature .......................................................-65oC to +150oC  
Stresses greater than those listed under MAXIMUM  
Ambient Temperature with Power Applied ....................... -40oC to +85oC  
RATINGS may cause permanent damage to the  
Supply Voltage to Ground Potential (Vcc to GND) ........... -0.3V to +7.0V  
device. This is a stress rating only and functional  
DC Input Voltage (All inputs except Vcc and GND) ..... -0.3VtoVCC+0.3V operation of the device at these or any other condi-  
tions above those indicated in the operational sec-  
tions of this specification is not implied. Exposure  
to absolute maximum rating conditions for ex-  
tended periods may affect reliability.  
DC Output Current (All outputs) .................................................... 20mA  
Power Dissipation........................................................................ 500mW  
(Depend on package)  
Recommended Operation Condition  
Table 3. DC Electrical Characteristics  
Sym  
VCC  
Description  
Test Conditions  
Min  
4.5  
Typ  
5.0  
3.3  
3.0  
2.4  
Max  
5.5  
Unit  
V
Supply Voltage for 75x1, 75x2  
Supply Voltage for 75x3, 75x4  
Supply Voltage for 75x5, 75x6, 75x7  
3.0  
5.5  
V
2.7  
5.5  
V
VCC > 4.0V  
2.0  
V
VIH1  
VIH2  
VIL1  
MR Input High Voltage  
WDI Input High Voltage  
MR Input Low Voltage  
VCC 4.0V  
0.7VCC  
0.7VCC  
V
V
VCC > 4.0V  
0.8  
0.2VCC  
0.3VCC  
85  
V
VCC 4.0V  
V
VIL2  
TA  
WDI Input Low Voltage  
Operating Temperature  
V
-40  
OC  
PT0082(05/02)  
Ver:1  
7
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
DC Electrical Characteristics  
Table 4. DC Electrical Characteristics  
Sym  
Description  
Test Conditions  
Min  
Typ  
30  
Max  
200  
Unit  
T7A75x1/75x2 VCC = 5V  
PT7A75x3/75x4 VCC = 3.3V  
PT7A75x5 VCC = 3.0V  
PT7A75x6/75x7 VCC = 2.5V  
Left WDI un-connected (No  
output load)  
ICC  
Operational Power Supply Current  
µΑ  
TA=25oC  
PT7A75x1  
VRN  
4.630  
4.380  
3.080  
2.930  
2.630  
2.320  
2.200  
70  
VRN+1.5%  
4.699  
4.446  
3.126  
2.974  
2.669  
2.355  
2.233  
VRN-1.5%  
4.560  
4.314  
3.034  
2.886  
2.590  
2.285  
2.167  
PT7A75x2  
PT7A75x3  
VRST  
Reset Threshold Voltage *  
V
PT7A75x4  
PT7A75x5  
PT7A75x6  
PT7A75x7  
VRTH  
Reset Threshold Hysteresis *  
Output HIGH Voltage  
VCC varies between VRN 5%  
mV  
V
Vcc > 4.5V Isource=800µA VCC-1.5  
VOH  
Vcc > 2.7V Isource=500µA  
Vcc >1.8V Isource=150µA  
Vcc > 4.5V Isink=3.2mA  
Vcc > 2.7V Isink=1.2mA  
Vcc > 1.2V Isink=100µA  
0.8VCC  
0.8VCC  
0.4  
0.3  
0.3  
VOL  
Output LOW Voltage  
V
V
PFI varies from1.0V to 1.5V  
1.23  
1.20  
1.25  
1.25  
1.27  
V
V
(TA = 25oC)  
VPFT  
PFI Input Threshold  
PFI Input Current  
VPFI varies from1.0V to 1.5V  
PFI connected to VCC  
PFI connected to GND  
WDI connected to VCC  
WDI connected to GND  
MR = 0, VCC= 5V  
1.30  
2.00  
IPFI  
µA  
-2.00  
30  
-30  
100  
IWDI  
IMR  
Average WDI Input Current**  
MR Input Current  
µA  
µA  
-100  
-600  
-250  
-100  
* Valid for both RESET and RESET. VRN is nominal reset threshold voltage.  
** WDI is internally serviced within the watchdog period if WDI is left unconnected.  
PT0082(05/02)  
Ver:1  
8
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
AC Electrical Characteristics  
Table 5. AC Electrical Characteristics  
Sym  
tRS  
Description  
Test Conditions  
Min  
140  
Typ  
200  
Max  
280  
Units  
ms  
Reset Pulse Width  
MR from low to High  
WDI and MR tied to VCC,  
VCC > VRN + 5%  
tWD  
Watchdog Timeout Period  
1.0  
1.6  
2.25  
s
tMR  
tMD  
tWP  
MR Pulse Width  
MR to RESET Delay  
WDI Pulse Width  
150  
ns  
ns  
ns  
VCC = 5.0V  
250  
50  
Figure 5. Watchdog Timing Diagram  
tWP  
tWD  
tWD  
tWD  
5V  
0V  
WDI  
5V  
0V  
WDO  
5V  
0V  
Externally  
Triggered by MR  
RESET  
RESET  
tRS  
5V  
0V  
Figure 6. Watchdog Timing Diagram  
VRT  
VRT  
5V  
0V  
VCC  
tRS  
tRS  
5V  
0V  
RESET  
MR  
5V  
0V  
tMD  
tMR  
5V  
0V  
WDO  
PT0082(05/02)  
Ver:1  
9
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Ordering Information  
Part No.  
Reset Threshold  
4.63V  
4.63V  
4.63V  
4.38V  
4.38V  
4.38V  
3.08V  
3.08V  
3.08V  
2.93V  
2.93V  
2.93V  
2.63V  
2.63V  
2.63V  
2.32  
Package  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
PDIP-8  
Part No.  
Reset Threshold  
4.63V  
4.63V  
4.63V  
4.38V  
4.38V  
4.38V  
3.08V  
3.08V  
3.08V  
2.93V  
2.93V  
2.93V  
2.63V  
2.63V  
2.63V  
2.32  
Package  
PT7A7511P  
PT7A7521P  
PT7A7531P  
PT7A7512P  
PT7A7522P  
PT7A7532P  
PT7A7513P  
PT7A7523P  
PT7A7533P  
PT7A7514P  
PT7A7524P  
PT7A7534P  
PT7A7515P  
PT7A7525P  
PT7A7535P  
PT7A7516P  
PT7A7526P  
PT7A7536P  
PT7A7517P  
PT7A7527P  
PT7A7537P  
PT7A7511W  
PT7A7521W  
PT7A7531W  
PT7A7512W  
PT7A7522W  
PT7A7532W  
PT7A7513W  
PT7A7523W  
PT7A7533W  
PT7A7514W  
PT7A7524W  
PT7A7534W  
PT7A7515W  
PT7A7525W  
PT7A7535W  
PT7A7516W  
PT7A7526W  
PT7A7536W  
PT7A7517W  
PT7A7527W  
PT7A7537W  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
SOIC-8 (150mil)  
2.32  
2.32  
2.32  
2.32  
2.20  
2.20  
2.20  
2.20  
2.20  
2.20  
PT0082(05/02)  
Ver:1  
10  
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Mechanical Information  
Figure 7. 8-Pin SOIC  
PT0082(05/02)  
Ver:1  
11  
Data Sheet  
PT7A7511-7517/7521-7527/7531-7537  
µP Supervisor Circuits  
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||  
Notes  
Pericom Technology Inc.  
Email: support@pti.com.cn  
Web-Site: www.pti.com.cn, www.pti-ic.com  
China:  
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China  
Tel: (86)-21-6485 0576 Fax: (86)-21-6485 2181  
Asia Pacific: Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong  
Tel: (852)-2243 3660 Fax: (852)- 2243 3667  
U.S.A.:  
2380 Bering Drive, San Jose, California 95131, USA  
Tel: (1)-408-435 0800 Fax: (1)-408-435 1100  
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve  
design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described  
other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free  
from patent infringement or other rights, of Pericom Technology Incorporation.  
PT0082(05/02)  
Ver:1  
12  

相关型号:

PT7A7522P

Power Management Circuit, PDIP8,
DIODES

PT7A7522W

Power Management Circuit, PDSO8,
DIODES

PT7A7523

3.08V Reset Active High Supervisor?
ETC

PT7A7523WE

Power Supply Management Circuit, Fixed, 1 Channel, PDSO8, SOIC-8
DIODES

PT7A7523WEX

Power Supply Management Circuit, Fixed, 1 Channel, PDSO8, SOIC-8
DIODES

PT7A7524

2.93V Reset Active High Supervisor?
ETC

PT7A7524P

Power Management Circuit, PDIP8,
DIODES

PT7A7524W

Power Management Circuit, PDSO8,
PERICOM

PT7A7525

2.63V Reset Active High Supervisor?
ETC

PT7A7525P

Power Management Circuit, PDIP8,
DIODES

PT7A7525W

Power Management Circuit, PDSO8,
DIODES

PT7A7526

2.32V Reset Active Low Supervisor?
ETC