REG104-5 [ETC]
DMOS 1A Low Dropout (LDO) Regulator ; DMOS 1A低压降（ LDO ）稳压器\n
| 型号： | REG104-5 |
| 厂家： | 
ETC |
| 描述： | DMOS 1A Low Dropout (LDO) Regulator
|
| 文件： | 总15页 (文件大小：263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REG104
REG
104
R
E
G
1
0
4
SBVS025C – SEPTEMBER 2001
DMOS
1A Low-Dropout Regulator
DESCRIPTION
FEATURES
The REG104 is a family of low-noise, low-dropout linear
regulators with low ground pin current. Its new DMOS
topology provides significant improvement over previous
designs, including low dropout voltage (only 230mV typ at
full load), and better transient performance. In addition, no
output capacitor is required for stability, unlike conventional
low dropout regulators that are difficult to compensate and
require expensive low ESR capacitors greater than 1µF.
● NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
230mV typ at 1A and 3.3V Output
Output Capacitor NOT Required for Stability
● FAST TRANSIENT RESPONSE
●
VERY LOW NOISE: 33µVrms
● HIGH ACCURACY: ±2% max
Typical ground pin current is only 1.7mA (at IOUT = 1A) and
drops to 0.5µA in “not enabled” mode. Unlike regulators with
PNP pass devices, quiescent current remains relatively con-
stant over load variations and under dropout conditions.
● HIGH EFFICIENCY:
IGND = 1.7mA at IOUT = 1A
Not Enabled: IGND = 0.5µA
● 2.5V, 2.7V, 3.0V, 3.3V, 5.0V AND
The REG104 has very low output noise (typically 33µVrms
for VOUT = 3.3V with CNR = 0.01µF), making it ideal for use
in portable communications equipment. On-chip trimming
results in high output voltage accuracy. Accuracy is main-
tained over temperature, line, and load variations. Key
parameters are tested over the specified temperature range
(–40°C to +85°C).
ADJUSTABLE OUTPUT VERSIONS
● THERMAL PROTECTION
● SMALL SURFACE-MOUNT PACKAGES:
SOT223-5, DDPAK-5
The REG104 is well protected—internal circuitry provides
a current limit which protects the load from damage. Ther-
mal protection circuitry keeps the chip from being damaged
by excessive temperature. The REG104 is available in the
DDPAK-5 and the SOT223-5.
APPLICATIONS
● PORTABLE COMMUNICATION DEVICES
● BATTERY-POWERED EQUIPMENT
● MODEMS
● BAR-CODE SCANNERS
● BACKUP POWER SUPPLIES
Enable
Enable
VOUT
VIN
VOUT
VIN
REG104
(Fixed Voltage
Versions)
+
R1
Adj
R2
+
+
+
0.1µF
(1)
(1)
COUT
REG104-A
COUT
0.1µF
NR
Gnd
Gnd
NR = Noise Reduction
NOTE: (1) Optional.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Supply Input Voltage, VIN .......................................................–0.3V to 16V
Enable Input ............................................................................ –0.3V to VIN
Output Short-Circuit Duration ...................................................... Indefinite
Operating Temperature Range ....................................... –55°C to +125°C
Storage Temperature Range .......................................... –65°C to +150°C
Junction Temperature ..................................................... –55°C to +150°C
Lead Temperature (soldering, 3s, SOT, and DDPAK) ........................ +240°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
SPECIFIED
PACKAGE
DESIGNATOR
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
PRODUCT
PACKAGE-LEAD
5V Output
REG104FA-5
DDPAK-5
KTT
–40°C to +85°C
REG104FA-5.0
REG104FA-5
REG104FA-5
REG104GA-5
REG104GA-5
Rails, 49
Tape and Reel, 500
Rails, 78
"
"
"
DCQ
"
"
"
REG104GA-5
SOT223-5
–40°C to +85°C
R104G50
"
"
"
"
Tape and Reel, 2500
3.3V Output
REG104FA-3.3
DDPAK-5
KTT
"
DCQ
"
–40°C to +85°C
REG104FA-3.3
REG104FA-3.3
REG104FA-3.3
REG104GA-3.3
REG104GA-3.3
Rails, 49
Tape and Reel, 500
Rails, 78
"
"
"
"
REG104GA-3.3
SOT223-5
–40°C to +85°C
R104G33
"
"
"
"
Tape and Reel, 2500
3.0V Output
REG104FA-3
DDPAK-5
KTT
–40°C to +85°C
REG104FA-3.0
REG104FA-3
REG104FA-3
REG104GA-3
REG104GA-3
Rails, 49
Tape and Reel, 500
Rails, 78
"
"
"
DCQ
"
"
"
REG104GA-3
SOT223-5
–40°C to +85°C
R104G30
"
"
"
"
Tape and Reel, 2500
2.7V Output
REG104FA-2.7
DDPAK-5
KTT
"
DCQ
"
–40°C to +85°C
REG104FA-2.7
REG104FA-2.7
REG104FA-2.7
REG104GA-2.7
REG104GA-2.7
Rails, 49
Tape and Reel, 500
Rails, 78
"
"
"
"
REG104GA-2.7
SOT223-5
–40°C to +85°C
R104G27
"
"
"
"
Tape and Reel, 2500
2.5V Output
REG104FA-2.5
DDPAK-5
KTT
"
DCQ
"
–40°C to +85°C
REG104FA-2.5
REG104FA-2.5
REG104FA-2.5
REG104GA-2.5
REG104GA-2.5
Rails, 49
Tape and Reel, 500
Rails, 78
"
"
"
"
REG104GA-2.5
SOT223-5
–40°C to +85°C
R104G25
"
"
"
"
Tape and Reel, 2500
Adjustable Output
REG104FA-A
DDPAK-5
KTT
"
DCQ
"
–40°C to +85°C
REG104FA-A
REG104FA-A
REG104FA-A
REG104GA-A
REG104GA-A
Rails, 49
Tape and Reel, 500
Rails, 78
"
"
"
"
R104GA
"
REG104GA-A
SOT223-5
–40°C to +85°C
"
"
"
Tape and Reel, 2500
PIN CONFIGURATIONS
Top View
SOT223-5
DDPAK-5
Tab is Gnd
Tab is Gnd
1
2 3 4
5
1
2
3
4
5
VO
NR/Adjust(1)
Gnd
VIN
Enable
VIN
Gnd
NR/Adjust(1)
Enable
VOUT
(DCQ Package)
(KTT Package)
NOTE: (1) For REG104A-A: voltage setting resistor pin.
All other models: noise reduction capacitor pin.
REG104
2
SBVS025C
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V
Boldface limits apply over the specified temperature range, TJ = –40°C to +85°C
At TJ = +25°C, VIN = VOUT + 1V (VOUT = 3.0V for REG104-A), VENABLE = 2V, IOUT = 10mA, CNR = 0.01µF, and COUT = 0.1µF(1), unless otherwise noted.
REG104GA
REG104FA
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
OUTPUT VOLTAGE
Output Voltage Range
REG104-2.5
REG104-2.7
REG104-3.0
REG104-3.3
REG104-5
REG104-A
VOUT
2.5
2.7
3.0
3.3
5
V
V
V
V
V
V
VREF
5.5
Reference Voltage
Adjust Pin Current
Accuracy
VREF
IADJ
1.295
0.2
±0.5
V
µA
%
1
±2
TJ = –40°C to +85°C
vs Temperature
vs Line and Load
TJ = –40°C to +85°C
±3.0
%
ppm/°C
%
dVOUT/dT
TJ = –40°C to +85°C
IOUT = 10mA to 1A, VIN = (VOUT + 0.7V) to 15V
VIN = (VOUT + 0.9V) to 15V
70
±0.5
±2.5
±3.5
%
DC DROPOUT VOLTAGE(2, 3)
For all models except 5V
For 5V model
For all models except 5V
TJ = –40°C to +85°C
For 5V models
VDROP
IOUT = 10mA
3
230
320
25
mV
mV
mV
mV
IOUT = 1A
400
500
480
IOUT = 1A
IOUT = 1A
I
OUT = 1A
580
mV
TJ = –40°C to +85°C
VOLTAGE NOISE
f = 10Hz to 100kHz
Vn
Without CNR (all models)
With CNR (all fixed voltage models)
CNR = 0, COUT = 0
CNR = 0.01µF, COUT = 10µF
35µVrms/V • VOUT
10µVrms/V • VOUT
µVrms
µVrms
OUTPUT CURRENT
Current Limit(4)
TJ = –40°C to +85°C
ICL
1.2
1.0
1.7
65
2.1
2.2
A
A
RIPPLE REJECTION
f = 120Hz
dB
ENABLE CONTROL
V
ENABLE High (output enabled)
VENABLE Low (output disabled)
ENABLE High (output enabled)
VENABLE
IENABLE
2
–0.2
VIN
0.5
100
100
V
V
nA
nA
µs
ms
I
VENABLE = 2V to VIN, VIN = 2.1V to 6.5(5)
VENABLE = 0V to 0.5V
1
2
50
1.5
IENABLE Low (output disabled)
Output Disable Time
Output Enable Softstart Time
THERMAL SHUTDOWN
Junction Temperature
Shutdown
150
130
°C
°C
Reset from Shutdown
GROUND PIN CURRENT
Ground Pin Current
IGND
IOUT = 10mA
IOUT = 1A
VENABLE ≤ 0.5V
0.5
1.7
0.5
0.7
1.8
mA
mA
µA
Enable Pin Low
INPUT VOLTAGE
VIN
Operating Input Voltage Range(6)
Specified Input Voltage Range
TJ = –40°C to +85°C
2.1
VOUT + 0.7
VOUT + 0.9
15
15
15
V
V
V
VIN > 2.7V
VIN > 2.9V
TEMPERATURE RANGE
Specified Range
Operating Range
TJ
–40
–55
–65
+85
+125
+150
°C
°C
°C
Storage Range
Thermal Resistance
DDPAK-5 Surface Mount
SOT223-5 Surface Mount
θJC
θJC
Junction-to-Case
Junction-to-Case
4
15
°C/W
°C/W
NOTES: (1) The REG104 does not require a minimum output capacitor for stability. However, transient response can be improved with proper capacitor selection.
(2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at VIN = VOUT + 1V at
fixed load. (3) Not applicable for VOUT less than 2.7V. (4) Current limit is the output current that produces a 15% change in output voltage from VIN = VOUT + 1V and
IOUT = 10mA. (5) For VIN > 6.5V, see typical characteristic “VENABLE vs IENABLE.” (6) The REG104 no longer regulates when VIN < VOUT + VDROP (MAX). In drop-out or
when the input voltage is between 2.7V and 2.1V, the impedance from VIN to VOUT is typically less than 1Ω at TJ = +25°C. See typical characteristic “Output Voltage
Change vs VIN”.
REG104
SBVS025C
3
TYPICAL CHARACTERISTICS
For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted.
OUTPUT VOLTAGE CHANGE vs IOUT
(VIN = VOUT + 1V, Output Voltage % Change
Referred to IOUT = 10mA at +25°C)
0.8
DC DROPOUT VOLTAGE vs IOUT
350
300
250
200
150
100
50
0.6
+125°C
0.4
+125°C
0.2
+25°C
–55°C
0
+25°C
–0.2
–0.4
–0.6
–0.8
–55°C
–1
0
–1.2
0
200
400
600
800
1000
0
100 200 300 400 500 600 700 800 900 1000
Output Current (mA)
IOUT (mA)
OUTPUT VOLTAGE CHANGE vs IOUT
(Output Voltage % Change Referred to
OUTPUT VOLTAGE CHANGE vs VIN
(Output Voltage % Change Referred to
I
OUT = 10mA at +25°C)
V
IN = VOUT + 1V at IOUT = 10mA)
0.6
0.4
0.5
0
IOUT = 10mA
IOUT = 200mA
IOUT = 10mA
0.2
IOUT = 200mA
0
IOUT = 1000mA
–0.5
–1
–0.2
–0.4
–0.6
–0.8
–1
IOUT = 1000mA
–1.5
–2
–1.2
–60 –40 –20
0
20
40
60
80 100 120
0
2
4
6
8
10
12
Temperature (°C)
Input Voltage Above VOUT (V)
LINE REGULATION vs TEMPERATURE
(VIN = VOUT + 1V to 16V)
DC DROPOUT VOLTAGE vs TEMPERATURE
IOUT = 1000mA
0.5
0.4
0.3
0.2
0.1
0
350
300
250
200
150
100
50
IOUT = 10mA
IOUT = 200mA
IOUT = 200mA
IOUT = 10mA
0
–75
–75
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
REG104
4
SBVS025C
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted.
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
REG104-3.3
REG104-3.3
IOUT = 200mA
COUT = 0
COUT = 0
VOUT
VOUT
COUT = 10µF
COUT = 10µF
VOUT
VOUT
ILOAD
VIN
1A
6V
5V
10mA
10µs/div
50µs/div
LOAD TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
REG104–A
REG104–A
Load = 200mA, CFB = 0.01µF, VOUT = 3.3V
CFB = 0.01µF, VOUT = 3.3V
COUT = 0
COUT = 0
COUT = 10µF
COUT = 10µF
1A
6V
5V
ILOAD
VIN
10mA
10µs/div
50µs/div
LOAD REGULATION vs TEMPERATURE
(VIN = VOUT + 1V and 10mA < IOUT < 1000mA)
OUTPUT NOISE DENSITY
0.5
0.4
0.3
0.2
0.1
0
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
CNR = 0
C
OUT = 0
C
C
NR = 0.01µF
OUT = 10µF
–60 –40 –20
0
20
40
60
80 100 120
10
100
1000
10000
100,000
Temperature (°C)
Frequency (Hz)
REG104
SBVS025C
5
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted.
GROUND PIN CURRENT, NOT ENABLED
vs TEMPERATURE
GROUND PIN CURRENT vs TEMPERATURE
1.8
3
2.5
2
VENABLE = 0V
IOUT = 1000mA
1.6
1.4
1.2
1
1.5
1
IOUT = 200mA
0.8
0.5
0
0.6
IOUT = 10mA
0.4
–75
–50
–25
0
25
50
75
100
125
–60 –40 –20
0
20
40
60
80
100 120
Temperature (°C)
Temperature (°C)
IADJUST vs TEMPERATURE
GROUND PIN CURRENT vs IOUT
1.6
1.4
1.2
1
0.28
0.26
0.24
0.22
0.20
0.18
0.16
0.14
REG104-A
0.8
0.6
0.4
1
10
100
1000
–60 –40 –20
0
20
40
60
80 100 120 140
IOUT (mA)
Temperature (°C)
RIPPLE REJECTION vs FREQUENCY
CURRENT LIMIT vs TEMPERATURE
VOUT = VOUT-NOMINAL • 0.90
70
60
50
40
30
20
1850
1800
1750
1700
1650
1600
1550
VOUT = 1V
COUT = 10µF
COUT = 0
10
100
1k
10k
100k
–60 –40 –20
0
20
40
60
80 100 120
Frequency (Hz)
Temperature (°C)
REG104
6
SBVS025C
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted.
RIPPLE REJECTION vs IOUT
75
SOFT START
VRIPPLE = 3Vp-p, f = 120Hz
70
VOUT
65
60
55
50
45
40
2V
0
VENABLE
0
200
400
600
800
1000
250µs/div
IOUT (mA)
OUTPUT DISABLE TIME
COUT = 0
OUTPUT VOLTAGE DRIFT HISTOGRAM
45
40
35
30
25
20
15
10
5
VOUT
2V
0
VENABLE
0
10µs/div
40 45 50 55 60 65 70 75 80 85 90
VOUT Drift (ppm/°C)
OUTPUT VOLTAGE ACCURACY HISTOGRAM
60
50
40
30
20
10
0
–1 –0.8 –0.6 –0.4 –0.2
0
0.2 0.4 0.6 0.8
1
Error (%)
REG104
SBVS025C
7
None of the versions require an output capacitor for regula-
tor stability. The REG104 will accept any output capacitor
type less than 1µF. For capacitance values larger than 1µF
the effective ESR should be greater than 0.1Ω. This mini-
mum ESR value includes parasitics such as printed circuit
board traces, solder joints, and sockets. A minimum 0.1µF
low ESR capacitor connected to the input supply voltage is
recommended.
BASIC OPERATION
The REG104 series is a family of LDO (Low DropOut)
linear regulators. The family includes five fixed output
versions (2.5V to 5.0V) and an adjustable output version. An
internal DMOS power device provides low dropout regula-
tion with near constant ground pin current (largely indepen-
dent of load and dropout conditions) and very fast line and
load transient response. All versions include internal current
limit and thermal shutdown circuitry.
ENABLE
Figure 1 shows the basic circuit connections for the fixed
voltage models. Figure 2 gives the connections for the
adjustable output version (REG104A) and example resistor
values for some commonly used output voltages. Values for
other voltages can be calculated from the equation shown in
Figure 2.
The Enable pin allows the regulator to be turned on and off.
This pin is active HIGH and compatible with standard TTL-
CMOS levels. Inputs below 0.5V (max) turn the regulator
off and all circuitry is disabled. Under this condition ground-
pin current drops to approximately 0.5µA.
When not used, the Enable pin may be connected to VIN.
Internal to the part, the Enable pin is connected to an input
resistor-zener diode circuit, as shown in Figure 3, creating a
nonlinear input impedance.
Enable
REG104
Gnd NR
VIN
VOUT
In
Out
175kΩ
Enable
COUT
0.1µF
CNR
0.01µF
VZ = 10V
Optional
FIGURE 3. Enable Pin Equivalent Input Circuit.
FIGURE 1. Fixed Voltage Nominal Circuit for REG104.
Enable
5
EXAMPLE RESISTOR VALUES
2
VOUT
1
V
OUT (V)
R1 (Ω)(1)
R2 (Ω)(1)
VIN
CFB
0.01µF
REG104
R1
COUT
1.295
2.5
Short
Open
IADJ
4
0.1µF
12.1k
1.21k
13k
1.3k
Load
Adj
R2
3
Gnd
3
3.3
5
16.9k
1.69k
13k
1.3k
Pin numbers for SOT-223 package.
20k
2.0k
13k
1.3k
Optional
37.4k
3.74k
13k
1.3k
VOUT = (1 + R1/R2) • 1.295V
NOTE: (1) Resistors are standard 1% values.
To reduce current through divider, increase resistor
values (see table at right).
As the impedance of the resistor divider increases,
I
ADJ (~200nA) may introduce an error.
C
FB improves noise and transient response.
FIGURE 2. Adjustable Voltage Circuit for REG104A.
REG104
8
SBVS025C
The Enable Pin Current versus Applied Voltage relationship
is shown in Figure 4. When the Enable pin is connected to
VIN greater than 10V, a series resistor may be used to limit
the current.
Since the value of VREF is 1.295V, this relationship reduces to:
µVrms
VN = 35
• VOUT
V
Connecting a capacitor, CNR, from the Noise-Reduction
(NR) pin to ground can reduce the output noise voltage.
Adding CNR, as shown in Figure 5, forms a low-pass filter
for the voltage reference. For CNR = 10nF, the total noise in
the 10Hz to 100kHz bandwidth is reduced by approximately
a factor of 3.5. This noise reduction effect is shown in
Figure 6.
100
10
1
0.1
45
REG104-3.3
0.01
0.001
0
2
4
6
8
10
12
14
16
Enable Voltage
35
FIGURE 4. Enable Pin Current versus Applied Voltage.
OUTPUT NOISE
COUT = 0
COUT = 10µF
A precision band-gap reference is used for the internal
reference voltage, VREF, for the REG104. This reference is
the dominant noise source within the REG104. It generates
approximately 45µVrms in the 10Hz to 100kHz bandwidth
at the reference output. The regulator control loop gains up
the reference noise, so that the noise voltage of the regulator
is approximately given by:
25
0.001
0.01
0.1
1
CNR (µF)
FIGURE 6. Output Noise versus Noise Reduction Capacitor.
The REG104 adjustable version does not have the noise-
reduction pin available, however, the adjust pin is the sum-
ming junction of the error amplifier. A capacitor, CFB,
R1 + R2
VOUT
VREF
VN = 45µVrms
= 45µVrms •
R2
VIN
NR
(fixed output
versions only)
Low Noise
Charge Pump
CNR
(optional)
VREF
(1.295V)
DMOS
Output
VOUT
Over Current
Over Temp
Protection
R1
R2
Enable
Adj
(Adjustable
Versions)
REG104
NOTE: R1 and R2 are internal
on fixed output versions.
FIGURE 5. Block Diagram.
REG104
SBVS025C
9
connected from the output to the adjust pin will reduce both
the output noise and the peak error from a load transient.
Figure 7 shows improved output noise performance for two
capacitor combinations.
For large step changes in load current, the REG104 requires
a larger voltage drop across it to avoid degraded transient
response. The boundary of this “transient dropout” region is
shown as the top line in Figure 8. Values of VIN to VOUT
voltage drop above this line insure normal transient re-
sponse.
10.0
In the transient dropout region between “DC” and “Tran-
sient”, transient response recovery time increases. The time
required to recover from a load transient is a function of both
the magnitude and rate of the step change in load current and
the available “headroom” VIN to VOUT voltage drop. Under
worst-case conditions (full-scale load change with VIN to
VOUT voltage drop close to DC dropout levels), the REG104
can take several hundred microseconds to re-enter the speci-
fied window of regulation.
1.0
0.1
TRANSIENT RESPONSE
10
100
1000
10000
100000
The REG104 response to transient line and load conditions
improves at lower output voltages. The addition of a capaci-
tor (nominal value 10nF) from the output pin to ground may
improve the transient response. In the adjustable version, the
addition of a capacitor, CFB (nominal value 10nF), from the
output to the adjust pin will also improve the transient
response.
Frequency
FIGURE 7. Output Noise Density on Adjustable Versions.
The REG104 utilizes an internal charge pump to develop an
internal supply voltage sufficient to drive the gate of the
DMOS pass element above VIN. The charge-pump switch-
ing noise (nominal switching frequency = 2MHz) is not
measurable at the output of the regulator.
THERMAL PROTECTION
Power dissipated within the REG104 will cause the junc-
tion temperature to rise. The REG104 has thermal shut-
down circuitry that protects the regulator from damage.
The thermal protection circuitry disables the output when
the junction temperature reaches approximately 150°C,
allowing the device to cool. When the junction temperature
cools to approximately 130°C, the output circuitry is again
enabled. Depending on various conditions, the thermal
protection circuit may cycle on and off. This limits the
dissipation of the regulator, but may have an undesirable
effect on the load.
DROP-OUT VOLTAGE
The REG104 uses an N-channel DMOS as the “pass”
element. When the input voltage is within a few hundred
millivolts of the output voltage, the DMOS device behaves
like a resistor. Therefore, for low values of VIN to VOUT, the
regulator’s input-to-output resistance is the RdsON of the
DMOS pass element (typically 230mΩ). For static (DC)
loads, the REG104 will typically maintain regulation down
to VIN to VOUT voltage drop of 230mV at full rated output
current. In Figure 8, the bottom line (DC dropout) shows the
minimum VIN to VOUT voltage drop required to prevent
dropout under DC load conditions.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 125°C, maximum. To estimate the margin of
safety in a complete design (including heat sink), increase
the ambient temperature until the thermal protection is
triggered. Use worst-case loads and signal conditions. For
good reliability, thermal protection should trigger more than
35°C above the maximum expected ambient condition of
your application. This produces a worst-case junction tem-
perature of 125°C at the highest expected ambient tempera-
ture and worst-case load.
REG103 –3.3 at 25°C
250
DC
Transient
200
150
100
50
The internal protection circuitry of the REG104 has been
designed to protect against overload conditions. It was not
intended to replace proper heat sinking. Continuously run-
ning the REG104 into thermal shutdown will degrade reli-
ability.
0
0
100
200
300
400
500
IOUT (mA)
FIGURE 8. Transient and DC Dropout.
10
REG104
SBVS025C
POWER DISSIPATION
5
4
3
2
1
0
The REG104 is available in two different package configu-
rations. The ability to remove heat from the die is different
for each package type and, therefore, presents different
considerations in the Printed Circuit-Board (PCB) layout.
The PCB area around the device that is free of other
components moves the heat from the device to the ambient
air. While it is difficult-to-impossible to quantify all of the
variables in a thermal design of this type, performance data
for several configurations are shown in Figure 9. In all cases
the PCB copper area is bare copper, free of solder resist
mask, and not solder plated. All examples are for 1-ounce
copper. Using heavier copper will increase the effectiveness
in moving the heat from the device. In those examples where
there is copper on both sides of the PCB, no connection has
been provided between the two sides. The addition of plated
through holes will improve the heat sink effectiveness.
CONDITIONS
#1
#2
#3
#4
0
25
50
75
100
125
Ambient Temperature (°C)
CONDITION
PACKAGE
PCB AREA
THETA J-A
1
2
3
4
DDPAK
SOT-223
DDPAK
4in2 Top Side Only
4in2 Top Side Only
None
27°C/W
53°C/W
65°C/W
110°C/W
Power dissipation depends on input voltage and load condi-
tions. Power dissipation is equal to the product of the
average output current times the voltage across the output
element, VIN to VOUT voltage drop.
SOT-223
0.5in2 Top Side Only
FIGURE 9. Maximum Power Dissipation versus Ambient
Temperature for the Various Packages and PCB
Heat Sink Configurations.
PD = (VIN – VOUT ) • IOUT(AVG)
Power dissipation can be minimized by using the lowest
possible input voltage necessary to assure the required
output voltage.
REG104
SBVS025C
11
REGULATOR MOUNTING
Although the tabs of the DDPAK and the SOT-223 are
electrically grounded, they are not intended to carry any
current. The copper pad that acts as a heat sink should be
isolated from the rest of the circuit to prevent current flow
through the device from the tab to the ground pin. Solder pad
footprint recommendations for the various REG104 devices
are presented in the Application Bulletin “Solder Pad Rec-
ommendations for Surface-Mount Devices” (SBFA015),
available from the Texas Instruments web site (www.ti.com).
The tab of both packages is electrically connected to ground.
For best thermal performance, the tab of the DDPAK sur-
face-mount version should be soldered directly to a circuit-
board copper area. Increasing the copper area improves heat
dissipation. Figure 10 shows typical thermal resistance from
junction to ambient as a function of the copper area for the
DDPAK, Figure 11 shows the same relationship for the
SOT-223.
THERMAL RESISTANCE vs PCB COPPER AREA
50
Circuit Board Copper Area
REG104
Surface Mount Package
40
30
20
10
0
1 oz. copper
REG104
DDPAK Surface Mount Package
5
0
1
2
3
4
Copper Area (inches2)
FIGURE 10. Thermal Resistance versus PCB Area for the Five Lead DDPAK.
THERMAL RESISTANCE vs PCB COPPER AREA
180
Circuit Board Copper Area
REG104
Surface Mount Package
160
1 oz. copper
140
120
100
80
θ
60
40
20
REG104
SOT-223 Surface Mount Package
0
0
1
2
3
4
5
Copper Area (inches2)
FIGURE 11. Thermal Resistance versus PCB Area for the Five Lead SOT-223.
REG104
12
SBVS025C
PACKAGE DRAWINGS
KTT (R-PSFM-G5)
MPSF007A – APRIL 2000 – REVISED SEPTEMBER 2000
PLASTIC FLANGE-MOUNT
0.405 (10,29)
0.395 (10,03)
0.185 (4,70)
0.058 (1,47)
0.052 (1,32)
0.175 (4,45)
0.050 (1,27) NOM
0.107 (2,72)
0.103 (2,62)
0.010 (0,25)
0.001 (0,03)
0.340 (8,64)
0.330 (8,38)
0.610 (15,49)
0.590 (14,99)
1
5
Seating Plane
0.004 (0,10)
0.035 (0,89)
0.067 (1,70)
0.268 (6,81)
0.029 (0,74)
0.010 (0,25) M
0.010 (0,25)
0.021 (0,53)
0.015 (0,38)
0.110 (2,79)
0.090 (2,29)
0°– 5°
4200577-3/B 09/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
REG104
SBVS025C
13
PACKAGE DRAWINGS (Cont.)
DCQ (R-PDSO-G6)
MPDS098 – MARCH 2001
PLASTIC SMALL-OUTLINE
B
0.258 (6,55)
0.254 (6,45)
D
0.120 (3,05)
0.116 (2,95)
Gage
Plane
M
0.004 (0,10)
C B
H
A
6X
0.003 (0,08)
C
0.004 (0,10)
0.001 (0,02)
0.140 (3,55)
0.136 (3,45)
0.286 (7,26)
0.270 (6,86)
0.010(0,25)
Seating
Plane
M
0.004 (0,10)
C A
0.045 (1,14)
0.036 (0,91)
D
4X
0.020 (0,51)
0.016 (0,41)
0.050(1,27)
5X
E
F
0.200(5,08)
M
0.004 (0,10)
C B
0.013 (0,32)
0.009 (0,24)
F
0.071 (1,80)
MAX
0.036 (0,91)
0.034 (0,87)
0.065 (1,65)
0.061 (1,55)
0°–8°
4202109/A 03/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Controlling dimension in inches
I. Datums A and B are to be determined at Datum H.
J. Packagedimensions per JEDEC outline drawing TO–261,
issue B, dated Feb. 1999.
This variation is not yet included.
D. Body length and width dimensions are determined at
the outermost extremes of the plastic body exclusive
of mold flash, tie bar burrs, gate burrs, and interlead
flash, but including any mismatch between the top and
the bottom of the plastic body.
E. Lead width dimension does not include dambar
protrusion.
F. Lead width and thickness dimensions apply to solder
plated leads.
G. Interlead flash allow 0.008 inch max.
H. Gate burr/protrusion max. 0.006 inch.
REG104
14
SBVS025C
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