SI2400_技术文档

Si2400

V.22BIS ISOMODEM™ WITH INTEGRATED GLOBAL DAA

Features

! Data Modem Formats

^"2400 bps: V.22bis

! Integrated DAA

Si2400

^"Capacitive Isolation

^"1200 bps: V.22, V.23, Bell 212A

^"300 bps: V.21, Bell 103

^"Parallel Phone Detect

^"Globally Compliant Line Interface

^"Overcurrent Protection

^"V.25 Fast Connect and V.23 Reversing

^"SIA and other security protocols

! Caller ID Detection and Decode

! DTMF Tone Gen./Detection

! 3.3 V or 5.0 V Power

! UART with Flow Control

Si3015

! AT Command Set Support

! Integrated Voice Codec

! PCM Data Pass-Through Mode

! HDLC Framing in Hardware

! Call Progress Support

Ordering Information

See page 71.

Applications

Pin Assignments

! Set Top Boxes

! Power Meters

! Security Systems ! Medical Monitoring

! ATM Terminals ! Point-of-Sale

Si2400

XTALI

EOFR/GPIO1

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Description

XTALO

CLKOUT

V_D

AIN/GPIO2

ESC/GPIO3

ISOB

The Si2400 ISOmodem™ is a complete modem chipset with integrated

direct access arrangement (DAA) that provides a programmable line

interface to meet global telephone line requirements. Available in two 16-

pin small outline (SOIC) packages, it eliminates the need for a separate

DSP data pump, modem controller, analog front end (AFE), isolation

transformer, relays, opto-isolators, 2- to 4-wire hybrid, and voice codec.

The Si2400 is ideal for embedded modem applications due to its small

board space, low power consumption, and global compliance.

TXD

GND

RXD

C1A

CTS

ALERT/GPIO4

AOUT

RESET

Si3015

QE2

DCT

IGND

C1B

FILT2

FILT

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

RX

Functional Block Diagram

REXT

REXT2

REF

RNG1

RNG2

QB

Si2400

Si3015

TXD

RXD

VREG2

VREG

RX

µ

Controller

QE

(AT Decoder

Call Progress)

Hybrid

and

DC

FILT

FILT2

REF

RESET

Termination

Patents pending

DCT

EOFR/GPIO1

AIN/GPIO2

ESC/GPIO3

DSP

(Data Pump)

VREG2

REXT

REXT2

Control

Interface

ALERT/GPIO4

CTS

RNG1

RNG2

QB

Ring Detect

Off-Hook

Audio

Codec

QE

QE2

CLKOUT

XTALI

Clock

Interface

XTALO

AOUT

Rev. 0.95 4/00

Si2400-DS095

Si2400

2

Rev. 0.95

Si2400

TABLE OF CONTENTS

Section

Page

Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Typical Application Circuit Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Analog Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Configurations and Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Global DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Carrier Detect/Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Caller ID Decoding Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Tone Generation and Tone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

PCM Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Analog Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

V.23 Operation/V.23 Reversing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

V.42 HDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Clock Generation Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Command Line Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

< CR > End Of Line Character . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

AT Command Set Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Extended AT Commands for the Alarm Industry . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Modem Result Codes and Call Progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Low Level DSP Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

S Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Appendix A—DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Appendix B—Typical Modem Applications Examples . . . . . . . . . . . . . . . . . . . . . . . . . 67

Appendix C—UL1950 3rd Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Rev. 0.95

3

Si2400

Electrical Specifications

Table 1. Recommended Operating Conditions

1

2

Symbol

Test Condition

Typ

Unit

Parameter

Min

Max

70

Ambient Temperature

Si2400 Supply Voltage, Digital³

Notes:

T_A

V_D

K-Grade

B-Grade

0

25

°C

V

–40

3.0

85

3.3/5.0

5.25

1. The Si2400 specifications are guaranteed when the typical application circuit (including component tolerance) and any

Si2400 and any Si3015 are used. See Figure 3 on page 9 for typical application circuit.

2. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.

Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated.

3. The digital supply, V_D, can operate from either 3.3 V or 5.0 V. The Si2400 interface supports 3.3 V logic when operating

from 3.3 V. The 3.3 V operation applies to both the serial port and the digital signals CTS, CLKOUT, GPIO1–4, and

RESET.

Table 2. DAA Loop Characteristics

(V_D= 3.0 to 3.6 V or 4.75 to 5.25 V, T_A= 0 to 70°C for K-Grade, T_A= –40 to 85°C for B-Grade)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

DC Termination Voltage

V_TR

I_L= 20 mA, ACT = 1

DCT = 11 (CTR21)

—

7.5

V

DC Termination Voltage

V_TR

I_L= 42 mA, ACT = 1

DCT = 11 (CTR21)

—

40

—

11

—

12

—

14.5

40

V

I_L= 50 mA, ACT = 1

DCT = 11 (CTR21)

I_L= 60 mA, ACT = 1

DCT = 11 (CTR21)

—

I_L= 20 mA, ACT = 0

DCT = 01 (Japan)

6.0

—

I_L= 100 mA, ACT = 0

DCT = 01 (Japan)

I_L= 20 mA, ACT = 0

DCT = 10 (FCC)

7.5

—

I_L= 100 mA, ACT = 0

DCT = 10 (FCC)

On Hook Leakage Current

Operating Loop Current

DC Ring Current

I_LK

I_LP

V_BAT= –48 V

FCC/Japan Modes

CTR21

—

13

—

11

17

15

—

1

120

60

20

22

33

68

0.2

µA

mA

µA

Ring Detect Voltage

V_RD

F_R

RT = 0

RT = 1

V_RMS

Hz

Ring Detect Voltage

Ring Frequency

Ringer Equivalence Number*

*Note: C15, R14, Z2, and Z3 not installed.

REN

4

Rev. 0.95

Si2400

Table 3. DC Characteristics

(V_D= 4.75 to 5.25 V, T_A= 0 to 70°C for K-Grade, T_A= –40 to 85°C for B-Grade)

Parameter

Symbol Test Condition Min

Typ

Max

Unit

High Level Input Voltage

V_IH

V_IL

V_OH

V_OL

I_L

3.5

—

28

16

10

60

—

0.8

—

V

Low Level Input Voltage

High Level Output Voltage

I_O= –2 mA

I_O= 2 mA

I_O= 40 mA

2.4

—

V

Low Level Output Voltage

0.4

0.6

10

V

Low Level Output Voltage, GPIO1–4

Input Leakage Current

—

V

–10

—

µA

mA

µA

Power Supply Current, Digital*

Power Supply Current, DSP Power Down*

Power Supply Current, Wake-On-Ring (ATZ)

Power Supply Current, Total Power Down

I_D

V_Dpin

32

I_D

—

19

I_D

—

11

I_D

—

105

*Note: Specifications assume MCKR = 0 (default). Typical value is 4 mA lower when MCKR = 1 and 6 mA lower when

MCKR = 2,3.

Measurements are taken with inputs at rails and no loads on outputs.

Table 4. DC Characteristics

(V_D= 3.0 to 3.6 V, T_A= 0 to 70°C for K-Grade, T_A= –40 to 85°C for B-Grade)

Parameter

Symbol Test Condition Min

Typ

Max

Unit

High Level Input Voltage

V_IH

V_IL

V_OH

V_OL

I_L

2.1

—

15

9

—

0.8

—

V

Low Level Input Voltage

High Level Output Voltage

I_O= –2 mA

I_O= 2 mA

I_O= 20 mA

2.4

—

V

Low Level Output Voltage

0.35

0.6

10

21

14

8

V

Low Level Output Voltage, GPIO1–4

Input Leakage Current

—

V

–10

—

µA

mA

µA

Power Supply Current, Digital

Power Supply Current, DSP Power Down

Power Supply Current, Wake-On-Ring

Power Supply Current, Total Power Down

I_D

V_Dpin

I_D

—

I_D

—

5

I_D

—

40

55

*Note: Specifications assume MCKR = 0 (default). Typical value is 2 mA lower when MCKR = 1 and 3 mA lower when

MCKR = 2,3.

Measurements are taken with inputs at rails and no loads on outputs.

TIP

+

600 Ω

Si3015

I_L

V_TR

10 µF

–

RING

Figure 1. Test Circuit for Loop Characteristics

Rev. 0.95

5

Si2400

Table 5. DAA AC Characteristics

(V_D= 3.0 to 3.6 V or 4.75 to 5.25 V, T_A= 0 to 70°C for K-Grade, T_A= –40 to 85°C for B-Grade)

Parameter

Symbol

Test Condition

Low –3 dB Corner

Min

—

Typ

5

Max

—

Unit

Hz

Transmit Frequency Response

Receive Frequency Response

Transmit Full Scale Level¹

Receive Full Scale Level^1,2

Dynamic Range^3,4

—

5

—

Hz

V_FS

DR

—

0.6

82

—

dBm

dB

—

ACT = 0, DCT = 10 (FCC)

I_L= 100 mA

—

Dynamic Range^3,5

DR

ACT = 0, DCT = 01 (Japan)

I_L= 20 mA

—

82

—

dB

Dynamic Range³

ACT = 1, DCT = 11(CTR21)

I_L= 60 mA

Transmit Total Harmonic Distortion^4,6

Transmit Total Harmonic Distortion^5,6

Receive Total Harmonic Distortion^4,6

THD

ACT = 0, DCT = 10 (FCC)

I_L= 100 mA

–75

ACT = 0, DCT = 01 (Japan)

I_L= 20 mA

ACT = 0, DCT = 01 (Japan)

I_L= 20 mA

ACT = 1, DCT = 11 (CTR21)

I_L= 60 mA

Dynamic Range (Caller ID mode)

Caller ID Full Scale Level (0 dB gain)¹

Notes:

DR_CID

V_CID

VIN = 1 kHz, –13 dB

—

60

—

dB

2.7

V_PEAK

1. Measured at TIP and RING with 600 Ω termination.

2. Receive full scale level will produce –0.9 dBFS at TXD.

3. DR = VIN + 20*log (RMS signal/RMS noise). Measurement is 300 to 3400 Hz. Applies to both transmit and receive

paths. Vin = 1 kHz, –3dBFS, Fs = 10300 Hz

4. Vin = 1 KHz, –3 dB

5. Vin = 1 KHz, –9 dB

6. THD = 20*log (RMS distortion/RMS signal). Vin = 1 kHz, –3 dBFS, Fs = 10.3 kHz

6

Rev. 0.95

Si2400

Table 6. Voice Codec AC Characteristics

(V_D= 3.0 to 3.6 V or 4.75 to 5.25 V, T_A= 0 to 70°C for K-Grade, T_A= –40 to 85°C for B-Grade)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

AOUT Dynamic Range, APO = 0

AOUT THD, APO = 0

VIN = 1 kHz

—

60

40

–40

—

dB

AOUT Full Scale Level, APO = 0

AOUT Mute Level, APO = 0

0.7*V_DD

60

V_PP

dB

AOUT Dynamic Range, APO = 1,

V_D= 4.75 to 5.25 V

VIN = 1 kHz, –3 dB

65

dB

AOUT Dynamic Range, APO = 1,

V_D= 3 to 3.6 V

55

65

—

dB

AOUT THD, APO = 1, V_D= 4.75 to

5.25 V

–55

–60

AOUT THD, APO = 1, V_D= 3 to 3.6 V

AOUT Full Scale Level, APO = 1

AOUT Mute Level, APO = 1

–40

—

–60

1.5

–65

—

20

—

dB

V_PP

dB

kΩ

pF

—

AOUT Resistive Loading, APO = 1

AOUT Capacitive Loading, APO = 1

10

—

AIN Dynamic Range, V_D= 4.75 to

5.25 V

VIN = 1 kHz, –3 dB

60

65

dB

AIN Dynamic Range, V_D= 3 to 3.6 V

AIN THD, V_D= 4.75 to 5.25 V

AIN THD, V_D= 3 to 3.6 V

VIN = 1 kHz, –3 dB

55

–55

–40

—

65

—

dB

–60

2.8

dB

AIN Full Scale Level^*

V_PP

*Note: Receive full scale level will produce –0.9 dBFS at TXD.

Table 7. Absolute Maximum Ratings

Parameter

Symbol

Value

Unit

DC Supply Voltage

V_D

I_IN

–0.5 to 6.0

±10

V

µA

V

Input Current, Si2400 Digital Input Pins

Digital Input Voltage

V_IND

T_A

–0.3 to (V_D+ 0.3)

–10 to 100

Operating Temperature Range

Storage Temperature Range

°C

T_STG

–40 to 150

Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation

should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

Rev. 0.95

7

Si2400

Table 8. Switching Characteristics

(V_D= 3.0 to 3.6 V or 4.75 to 5.25 V, T_A= 0 to 70°C for K-Grade, T_A= –40 to 85°C for B-Grade)

Parameter

Symbol

Min

Typ

Max

Unit

CLKOUT Output Clock Frequency

Baud Rate Accuracy

2.4576

–1

—

39.3216

1

MHz

%

t_bd

t_sbc

t_csb

t_rs

—

Start Bit ↓ to CTS ↑

—

1/(2*Baud Rate)

—

ns

CTS ↓ Active to Start Bit↓

RESET ↓ to RESET ↑

RESET ↑ Rise Time

10

—

ns

5.0

—

msec

ns

t_rs2

100

Note: All timing is referenced to the 50% level of the waveform. Input test levels are V_IH= V_D– 0.4 V, V_IL= 0.4 V

Transmit Timing

TXD

Start

D0

D1

D2

D3

D4

D5

D6

D7

Stop

8-Bit Data

Mode (Default)

TXD

9-Bit Data

Mode

D8

Stop

Receive Timing

RXD

8-Bit Data

Mode(Default)

Start

D0

D1

D2

D3

D4

D5

D6

D7

Stop

D8

RXD

9-Bit Data

Mode

D4

Stop

t_csb

t_sbc

CTS

Note: Baud rates (programmed through register SE0) are as follows: 300, 1200, 2400, 9600, 19200,

230400, 245760, and 307200 Hz.

Figure 2. Asynchronous UART Serial Interface Timing Diagram

8

Rev. 0.95

Si2400

Bill of Materials

Table 9. Global Component Values—Si2400 Chipset

Component

Value

150 pF, 3 kV, X7R,±20%

0.22 µF, 16 V, X7R, ±20%

0.1 µF, 50 V, Elec/Tant/X7R, ±20%

0.1 µF, 16 V, X7R, ±20%

1800 pF, 250 V, X7R, ±20%

22 nF, 250 V, X7R, ±20%

1.0 µF, 16 V, Tant/X7R, ±20%

0.68 µF, 16 V, X7R/Elec/Tant, ±20%

12 nF, 16 V, X7R, ±20%

0.01 µF, 16 V, X7R, ±20%

1000 pF, 3 kV, X7R, ±10%

33 pF, 16 V, NPO, ±5%

10 pF, 16 V, NPO, ±10%

1000 pF, 3 kV, X7R, ±10%

Dual Diode, 300 V, 225 mA

Ferrite Bead, BLM31A601S

A42, NPN, 300 V

Suppliers

C1,C4

Novacap, Venkel, Johanson, Murata, Panasonic

Not Installed

1

C2

C3

2

C5

C6,C10,C13,C16

C7,C8

C9

Novacap, Venkel, Johanson, Murata, Panasonic

C12

2

C14

C18,C19

C20

C24,C25

C26,C27

Novacap, Venkel, Johanson, Murata, Panasonic

3

C30

Not Installed

3

C31,C32

4

D1,D2

Central Semiconductor

Murata

FB1,FB2

Q1,Q3

Q2

OnSemiconductor, Fairchild, Zetex

OnSemiconductor, Fairchild

Teccor, ST Microelectronics, Microsemi, TI

Not Installed

A92, PNP, 300 V

5

Q4

BCP56, NPN, 60 V, 1/2 W

Sidactor, 275 V, 100 A

240 V, MOV

RV1

6

RV2

2

R2

402 Ω, 1/16 W, ±1%

R5

R6

100 kΩ, 1/16 W, ±1%

120 kΩ, 1/16 W, ±5%

4.87 kΩ, 1/4 W, ±1%

8

R7,R8,R15,R16,R17,R19

R9,R10

R11

15 kΩ, 1/10 W, ±5%

10 kΩ, 1/16 W, ±1%

2

R12

78.7 Ω, 1/16 W, ±1%

2

R13

215 Ω, 1/16 W, ±1%

R18

R24

2.2 kΩ, 1/10 W, ±5%

150 Ω, 1/16 W, ±5%

R25,R26

U1

10 MΩ, 1/16 W, ±5%

Si2400

Silicon Labs

U2

Si3015

Y1

4.9152 MHz, 20 pF, 50 ppm, 150 ESR

Zener Diode, 43 V, 1/2 W

Not Installed

2

Z1

Vishay, Motorola, Rohm

Notes:

1. C2 was included in previous revisions of the data sheet. Replacing C2 with C4 improves longitudinal balance.

2. For FCC-only designs: C14, R12, and R13 are not required; R2 may be ±5%; with Z1 rated at 18 V, C5 may be rated at 16 V; also see note 7.

3. C30, C31, C32 may provide an additional improvement in emissions/immunity and/or voice performance, depending on design and layout. Population

option recommended. See "Emissions/Immunity‚" on page 62.

4. Several diode bridge configurations are acceptable (suppliers include General Semi., Diodes Inc.).

5. Q4 may require copper on board to meet 1/2 W power requirement. (Contact manufacturer for details.)

6. RV2 can be installed to improve performance from 2500 V to 3500 V for multiple longitudinal surges (240 V, MOV).

7. The R7, R8, R15, and R16, R17, R19 resistors may each be replaced with a single resistor of 1.62 kΩ, 3/4 W, ±1%. For FCC-only designs, 1.62 kΩ, 1/16

W, ±5% resistors may be used.

10

Rev. 0.95

Si2400

Analog Input/Output

Figure 4 illustrates an optional application circuit to support the analog output capability of the Si2400 for voice

monitoring purposes.

+5V

C2

R3

6

3

2

C4

AOUT

5

U1

C5

4

C6

R1

C3

Speaker

R2

Figure 4. Optional Connection to AOUT for a Monitoring Speaker

Table 10. Component Values—Optional Connection to AOUT

‘

Symbol

Value

C2, C3, C5

0.1 µF, 16 V, ±20%

100 µF, 16 V, Elec. ±20%

820 pF, 16 V, ±20%

10 kΩ, 1/10 W, ±5%

10 Ω, 1/10 W, ±5%

47 kΩ, 1/10 W, ±5%

LM386

C4

C6

R1

R2

R3

U1

Si2400

1 Vrms

Analog Input

AIN/GPIO

0.1 µF

Figure 5. Analog Input Circuit

Rev. 0.95

11

Si2400

This device is ideal for embedded modem applications

due to its small board space, low power consumption,

Functional Description

The Si2400 ISOmodem is a complete modem chipset and global compliance. The Si2400 solution integrates a

with integrated direct access arrangement (DAA) that silicon DAA using Silicon Laboratories’ proprietary

provides a programmable line interface to meet global ISOcap™ technology. This highly integrated DAA can be

telephone line requirements. Available in two 16-pin programmed to meet worldwide PTT specifications for

small outline packages, this solution includes a DSP data AC termination, DC termination, ringer impedance, and

pump, a modem controller, an analog front end (AFE), a ringer threshold. The DAA also can monitor line status for

DAA, and an audio codec.

parallel handset detection and for overcurrent conditions.

The modem, which accepts simple modem AT The Si2400 is designed so that it may be rapidly

commands, provides connect rates of up to 2400 bps, assimilated into existing modem applications. The device

full-duplex over the Public Switched Telephone Network interfaces directly through

a UART to either a

(PSTN) with V.42 hardware support through HDLC microcontroller or a standard RS-232 connection. This

framing. To minimize handshake times, the Si2400 can simple interface allows for PC evaluation of the modem

implement a V.25-based fast connect feature. The immediately upon powerup via the AT commands across

modem also supports the V.23 reversing protocol as well a standard hyperterminal.

as SIA and other alarm standard formats.

The chipset can be fully programmed to meet

As well as supporting the modem signalling protocols, the international telephone line interface requirements with

ISOmodem provides numerous additional features for full compliance to FCC, CTR21, JATE, and other country-

embedded modem applications. The Si2400 includes full specific PTT specifications. In addition, the Si2400 has

caller ID detection and decoding for the US, UK, and been designed to meet the most stringent worldwide

Japanese caller ID formats. Both DTMF decoding and requirements for out-of-band energy, billing-tone

generation are provided on chip as well. Call progress is immunity, lightning surges, and safety requirements.

supported both at a high level through echoing result

The Si2400 solution needs only a few low-cost discrete

codes and at a low level through user-programmable

components to achieve global compliance. See Figure 3

biquad filters and parameters such as ring period, ring

on page 9 for a typical application circuit.

on/off time, and dialing interdigit time.

Table 11. Selectable Configurations

Carrier

Frequency (Hz)

Data Rate

(bps)

Standard

Compliance

Configuration

Modulation

V.21

V.22

FSK

DPSK

QAM

1080/1750

1200/2400

1300/2100

1300/1700

1170/2125

1200/2400

—

300

1200

Full

V.22bis (1200 fallback)

V.22bis

1200

Full

2400

No retrain*

V.23

1200/75

600/75

300

Full; plus reversing

(Europe)

FSK

V.23

Bell 103

FSK

DPSK

DTMF

Pulse

FSK

Full

Bell 212A

Security

1200

40

Full

SIA—Pulse

SIA Format

—

Low

Full

1170/2125

300 half-duplex

300 bps only

*Note: The Si2400 only adjusts its baud rate for line conditions during the initialization of the call. Retraining to accommodate

changes in line conditions which occur during a call must be implemented by terminating the call and redialing.

12

Rev. 0.95

Si2400

data bits, and the line data format is 8 data bits (8N1),

then the MSB from the link will be dropped as the 9-bit

word is passed from the link side to the line side. In this

case, the dropped ninth bit can then be used as an

escape mechanism. However, if the link data format is 8

data bits and the line data format is 9 data bits, an MSB

equal to 0 will be added to the 8-bit word as it is passed

from the link side to the line side.

Digital Interface

The Si2400 has an asynchronous serial port (UART)

that supports standard microcontroller interfaces. After

reset, the baud rate defaults to 2400 bps with the 8-bit

data format described below. Immediately after power-

up, the device must be programmed using the primary

serial port because the secondary serial port is disabled

by default. The CLKOUT clock will be running with a

frequency of 9.8304 MHz.

The Si2400 UART does not continuously check for stop

bits on the incoming digital data. Therefore, if the RXD

pin is not high, the TXD pin may transmit meaningless

characters to the host UART. This requires the host

UART to flush its receiver FIFO upon initialization.

The baud rate of the serial link is established by writing

S register SD (SE0.2:0). It may be set for 300, 1200,

2400, 9600, 19200, 228613, 245760, or 307200 bps.

Immediately after the ATSE0=xx string is sent, the user

must reprogram the host UART to match the selected

new baud rate. The higher baud rate settings (>230400)

can be used for transferring PCM data from the host to

the Si2400 for transmission of voice data over the

phone line or through the voice codec.

Si2400

Si3015

RXD UART

TXD

RJ11

Link

Line

Data Rate: S07

Data Format: S15

Data Rate: SD (SE0.2:0)

Table 12. Register S07 Examples: DTMF = 0,

HDEN = 0, BD = 0

Data Format: ND (SE0.3)

Figure 6. Link and Line Data Formats

Modem Protocol

Register S07 Values

Command/Data Mode

V.21

Bell 103

0x03

0x01

0x02

0x00

0x06

0x24

0x14

0x20

0x10

Upon reset, the modem will be in command mode and

will accept AT-style commands. An outgoing modem

call can be made using the “ATDT#” (tone dial) or

“ATDP#” (pulse dial) command after the device is

configured. If the handshake is successful, the modem

will respond with the “c”, “d”, or “v” string and enter data

mode. (The byte following the “c”, “d”, or “v” will be the

first data byte.) At this point, AT-style commands are not

accepted. There are three methods which may be used

to return the Si2400 to command mode:

V.22

Bell 212A

V.22bis

V.23 (75 tx, 1200 rx)

V.23 (1200 tx, 75 rx)

V.23 (75 tx, 600 rx)

V.23 (600 tx, 75 rx)

! Use the ESC pin—To program the GPIO3 pin to

function as an ESCAPE input, set GPIO3

(SE2.5:4) = 3. In this setting, a positive edge

detected on this pin will return the modem to

command mode. The “ATO” string can be used to re-

enter data mode.

Configurations and Data Rates

The Si2400 can be configured to any of the Bell and

CCITT operation modes. This device also supports SIA

and other security modes for the security industry.

Table 11 provides the modulation method, the carrier

frequencies, the data rate, the baud rate and the notes

on standard compliance for each modem configuration

of the Si2400. Table 12 shows example register settings

(SO7) for some of the modem configurations.

! Use 9-bit data mode—If 9-bit data format with

escape is programmed, a 1 detected on bit 9 will

return the modem to command mode. (See Figure 2

on page 8.) This is enabled by setting ND (SE0.3) =

1 and NBE (S15.0) = 1. The “ATO” string can be

used to reenter data mode.

As shown in Figure 6, 8-bit and 9-bit data modes refer

to the link data format over the UART. Line data formats

are configured through registers S07 and S15. If the

number of bits specified by the link data format differs

from the number of bits specified by the line data

format, the MSBs will either be dropped or bit-stuffed,

as appropriate. For example, if the link data format is 9

! Use TIES—The time independent escape sequence

is a sequence of three escape characters ("+"

characters by default). Once these characters have

been recognized, the modem enters the Command

state without sending a confirming result code to the

terminal. The modem then starts an internal prompt

Rev. 0.95

13

Si2400

delay timer. From that point on if an AT<CR>

(attention) command is received before the timer

expires, the timer is stopped and the “O” response

code is sent to the terminal. This indicates that the

Si2400 is in command mode.

If any other data is received while the timer is

running, the timer is stopped, the device returns to

the online state, and the data received through the

UART RXD is sent to the other modem.

If the timer expires, a confirming “O” response code

is sent to the terminal indicating that the modem is in

command mode.

TIES can be enabled by writing register TED

(S14.5)=1. Both the escape character “+” and the

escape time-out period are programmable via

registers TEC (S0F) and TDT (S10), respectively.

out onto the pin, LSB first. After 9 data bits, the stop bit

follows. All bits are shifted out at the rate determined by

the baud rate register.

Once the baud rate register SD (SE0.2:0) is written,

reception may begin at any time. The falling edge of a

start bit on the RXD pin will begin the reception process.

Data must be shifted in at the selected baud rate.

The ninth data bit may be used to indicate an escape by

setting NBE (S15.0) = 1. If so, this bit will normally be

set to 0 when the modem is online. To go offline into

command mode, set this bit to 1. The next frame will be

interpreted as a command. Data mode can be

reentered using the ATO command.

After the middle of the stop-bit time, the receiver will go

back to looking for a 1 to 0 transition on the RXD pin.

Flow Control

Note: TIES is not the recommended escape solution for the

most robust designs. Any data strings that actually

contain the escape character three times in a row will

interrupt a data sequence erroneously.

If a higher serial link line (UART) data rate is

programmed than the baud rate of the modem, flow

control is required to prevent loss of data to the

transmitter. No flow control is needed if the same baud

rate as modem rate is programmed. Note that in

compliance with the V.22bis algorithm, the V.22bis

(2400 baud) modem will connect at 1200 baud if it

cannot make a 2400 baud connection.

Whether using an escape method or not, when the

carrier is lost, the modem will automatically return to

command mode and report “N”.

8-Bit Data Mode

This mode is asynchronous, full-duplex, and uses a

total of 10 bits (shown in Figure 2 on page 8). To

program 8-Bit Data mode, set ND (SE0.3) = 0. (Note

that 8-Bit Data mode is the default.) The 10 bits consist

of a start bit (logic 0), 8 data bits, and 1 stop bit (logic 1).

To control flow, the CTS pin is used. As shown in

Figure 2 on page 8, the CTS pin will normally be high,

and will be low whenever the modem is able to accept

new data. The CTS pin will go high again as soon as a

start bit is detected on the RXD pin and will remain high

until the modem is ready to accept another character.

Data transmission from the Si2400 to the host takes

place on the TXD pin. It begins when the Si2400 lowers

TXD, placing the start bit on the pin. Data is then shifted

out onto the pin, LSB first. After 8 data bits, the stop bit

follows. All bits are shifted out at the rate determined by

the baud rate register.

Low Power Modes

The Si2400 has three low power modes. These are

described below:

! DSP Powerdown. The DSP processor can be

powered down by setting register PDDE (SEB.3) =1.

In this mode the serial interface still functions as

normal, and the modem will be able to detect ringing

and intrusion. No modem modes or tone detection

features will function.

Once the baud rate register SD (SE0.2:0) is written,

reception by the Si2400 may begin at any time. The

falling edge of a start bit will signal to the Si2400 that the

reception process has begun. Data should be shifted

onto RXD at the selected baud rate.

After the middle of the stop-bit time, the receiver will go

back to looking for a 1 to 0 transition on the RXD pin.

! Wake Up On Ring. By issuing the “z” command, the

Si2400 goes into a low power mode where both the

microcontroller and DSP are powered down. Only

incoming ringing or a total reset will power up the

chip again.

9-Bit Data Mode

This mode uses

a total of 11 bits in UART

communication. To program 9-Bit Data mode, set ND

(SE0.3) = 1. The 11 bits consist of one start bit (logic 0),

9 data bits, and 1 stop bit (logic 1, see Figure 2 on page

8). As in 8-Bit Data mode, the transmissions occur on

the TXD signal pin and receptions on the RXD pin.

! Total Powerdown. By writing registers PDN (SF1.6)

and PDL (SF1.5), the Si2400 will be put into a total

powerdown mode. In this mode, all logic is powered

down, including the crystal oscillator and clock-out

pin. Only a hardware reset can restart the Si2400.

Data transmission from the Si2400 to the host takes

place on the TXD pin. It begins when the Si2400 lowers

TXD, placing the start bit on the pin. Data is then shifted

14

Rev. 0.95

Si2400

the DAA register settings required to meet international

PTT standards. A detailed description of the registers in

Table 13 can be found in "Appendix A—DAA

Operation‚" on page 62.

Global DAA Operation

The Si2400 chipset contains an integrated silicon direct

access arrangement (silicon DAA) that provides a

programmable line interface to meet international

telephone line interface requirements. Table 13 gives

Table 13. Country-Specific Register Settings

Register

Country

SF5

SF7

LIM

SF6

OHS

ACT

DCT

RZ

RT

VOL

FNM

Australia

1

0

1

0

1

0

1

0

1

0

2

3

2

1

2

1

2

1

2

1

0

1

0

1

0

1

0

1

0

1

0

Bulgaria

CTR21¹

Czech Republic

FCC

Hungary

Japan

Malaysia²

New Zealand

Philippines

Poland³

Singapore²

Slovakia

Slovenia

South Africa³

South Korea³

Note:

1. CTR21 includes the following countries: Austria, Belgium, Cyprus, Denmark, Finland, France,

Germany, Greece, Iceland, Ireland, Israel, Italy, Liechtenstein, Luxembourg, Netherlands, Norway,

Portugal, Spain, Sweden, Switzerland, and the United Kingdom.

2. Supported for loop current ≥ 20mA.

3. The RZ register (SF5.1) should only be set for Poland, South Africa and South Korea if the ringer

impedance network (C15, R14, Z2, Z3) is not populated.

sense (register LVCS (SDB)). When on hook, LVCS

Parallel Phone Detection

monitors the line voltage. (When off hook, it measures

The Si2400 has the ability to detect another phone that

current.) LVCS has a full scale of 70 V with an LSB of

is off hook on a shared line. This allows the ISOmodem

2.25 V. The first code (0 → 1) is skewed such that a 0

both the ability to avoid interrupting another call on a

indicates that the line voltage is < 3.0 V. The voltage

shared line and to intelligently handle an interruption

accuracy of LVCS is ±20%. The user can read these

when the Si2400 is using the line. An automatic

bits directly when on hook through register LVCS.

algorithm to detect parallel phone intrusion (defined as

The automatic on-hook detector algorithm can be

an off-hook parallel handset) is provided by default.

tripped by either an absolute level or by a voltage

On-Hook Intrusion Detection

differential by selecting ONHD (S13.3). If the absolute

The on-hook intrusion detection allows the user to avoid

detector is chosen, the Si2400 algorithm will detect an

interrupting another call on a shared line. To implement

intrusion if LVCS is less than the on-hook intrusion

the intrusion detection, the Si2400 uses a loop voltage

Rev. 0.95

15

Si2400

threshold, register AVL (S11.4:0). In other words, it is lines with current-limiting specifications such as France.

determined that an intrusion has occurred if LVCS < For these lines, a differential detector is more

AVL.

appropriate.

AVL defaults to 0x0D, or 30 V on powerup. The The differential detector method checks the status of the

absolute detector is the correct method to use for FCC line every 26.66 ms. The detector compares (LVCS (t –

and most other countries. The absolute detector should 0.02666) – LVCS (t)) to the differential threshold level

also be used to detect the presence (or absence) of a set in register DVL (S11.7:5). The default for DVL is

line connection.

0x02 (5.25 V). If the threshold is exceeded (LVCS (t –

0.02666) – LVCS (t) > DVL), an intrusion is detected. If

(LVCS (t) – LVCS (t – 0.02666) > DVL), then the

intrusion is said to have terminated.

Under the condition of a very short line and a current-

limiting telephone off hook, the off-hook line voltage can

be as high as 40 V. The minimum on-hook voltage may

not be much greater. This condition can occur on phone

30

25

20

LVCS

BIT

15

10

5

0

3

6

9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72

Loop Voltage

100

Figure 7. Loop Voltage—LVCS Transfer Function

Off-Hook Intrusion Detection

When the Si2400 is off hook, it can detect another

phone going off hook by monitoring the DC loop current.

The loop current sense transfer function is shown in

Figure 8 with the upper curve representing CTR21

(current limiting) operation and the lower curve

representing all other modes. The overload points

indicate excessive current draw. The user can read

these bits directly through register LVCS (SDB). Note

that as in the line voltage sense, there is hysteresis

between codes (0.375 mA for CTR21 mode and

0.75 mA for ROW).

16

Rev. 0.95

Si2400

Overload

30

25

20

15

CTR21

LCS

BIT

10

5

0

3

6

9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72 75 78 81 84 87 90 93

Loop Current (mA)

140

Figure 8. Loop Current—LVCS Transfer Function

The off-hook algorithm can be chosen to use either a current is accomplished by going off-hook (issuing the

differential current detector or an absolute current “ATDT;” command), reading LVCS after 50 ms, and

detector via setting OFHD (S13.4).

going back on hook using the “ATH” command. This

measured value of LVCS should be used to determine

the threshold register ACL. If this method is used, the

loop current should be measured on a periodic basis to

account for drift in line resistance.

Because of the extra code and host processing required

by the absolute current method, the differential current

method is chosen to be the default. This method uses

two techniques to detect an intrusion. The first

technique is described as follows:

The absolute current method is the most accurate, and

it is necessary to use this method in order to determine

if another phone goes off hook simultaneous with or

immediately (< 400 ms) after the Si2400 phone goes off

hook. It does, however, require processing by the host,

including periodic off-hook events to measure the loop

current.

If (LVCS (t – 400 ms) – LVCS (t)) > DCL, then an

intrusion is deemed to have taken place. If (LVCS (t) –

LVCS (t – 400 ms)) > DCL, then the intrusion is deemed

to have completed. Default DCL is 2.

The second technique takes advantage of the DC

holding circuit. If a parallel phone suddenly goes off

hook, the DC holding circuit will not react immediately,

therefore the loop current through the Si2400 will drop

briefly to zero. Thus, an intrusion is also reported when

LVCS = 0.

If an intrusion event is detected while in command

mode, an “i” is echoed to the host; When it is terminated

an “I” is echoed. The host may also be notified of an

intrusion when in data mode through the ALERT pin by

setting GPIO4 (SE2.7:6) = 3. Upon intrusion, the

ALERT pin will go high, and the host may then read

register IND (S14.1) to confirm an intrusion.

If the absolute detector is chosen, the Si2400 will detect

an intrusion under the condition that LVCS is less than

the off-hook intrusion threshold, register ACL (S12.4:0).

In other words, it is determined that an intrusion has

occurred if LVCS < ACL. ACL defaults to 3 (15.5 mA) on

powerup. Because the loop current can vary from

20 mA to 100 mA, depending on the line, a factory

preset threshold is not useful.

The host may use the automatic intrusion detection

algorithm (the default) by monitoring the ALERT pin or

waiting for the character echoes. The host may also use

the LVCS, AVL, and DVL registers as a basis for a

custom algorithm. Note that LVCS only acts as a line

voltage sense when on hook. When off hook, it

becomes the line current sense register.

If the host wishes to use this absolute mode, the host

must measure the line current and then set the

threshold accordingly. A measurement of the loop

Rev. 0.95

17

Si2400

ID) or CIDB (S13.2) = 1 (Set modem to UK type caller ID)

or JID (S13.7) = 1 (Set modem to Japanese type caller ID)

Carrier Detect/Loss

The Si2400 can provide the functionality of a loss-of-

carrier pin similar to the CD pin functionality in an RS-

232 connection. If programmed as an ALERT, GPIO4

will go high in online mode when either parallel phone

intrusion or a loss-of-carrier is detected. When used in

this manner, the host detects a low-to-high transition on

GPIO4 (ALERT), escapes into command mode, and

reads register IND (S14.1). If high, IND indicates

intrusion. If low, IND indicates loss-of-carrier.

3. Set baud rate either to 1200 bps without flow control or

greater than 1200 bps with flow control.

Bellcore Caller ID Operation

The Si2400 will detect the first ring burst signal and will

echo an “R” to the host. The device will then start

searching for the caller ID preamble sequence after the

appropriate time-out. When 50 continuous mark bits

have been detected, the “m” response will be echoed to

indicate that the mark has been detected and that caller

ID data will follow.

Overcurrent Protection

The Si2400 has built in protection to avoid damage to

the device due to overcurrent situations. An example

situation occurs when plugging the modem into a digital

PBX outlet and attempting to go off-hook. Digital PBX

systems vary, but many can provide a DC feed voltage

of up to 70 V and therefore have the ability to deliver

hundreds of milliamps of current into the DAA.

At this point the algorithm will look for the first start bit,

assemble the characters, and then transmit them out of

the UART as they are detected. When the caller ID

burst finishes, the carrier will be lost and the modem will

echo an “N” to indicate that the carrier is lost.

At this point the Si2400 will continue detecting ring

bursts and echoing “R” for each burst, and will

automatically answer after the correct number of rings.

The Si2400 will always go off hook with the current-

limiting mode enabled. This allows no possibility of

damage for voltages up to about 48 V. However, at

higher voltages the 43 V Zener protection device will

begin to conduct and could be damaged if the power is

applied for too long.

UK Caller ID Operation

When the Si2400 detects a line reversal, it will echo an

“f” to the host. It will then start searching for the Idle

State Tone Alert Signal. When this signal has been

detected, the Si2400 will transmit an “a” to the host.

After the Idle State Tone Alert Signal is completed, the

Si2400 will apply the wetting pulse for the required

15 ms by quickly going off hook and on hook. From this

point on, the algorithm is identical to that of Bellcore in

that it will search for the channel seizure signal and the

marks before echoing an “m” and will then report the

decoded caller ID data.

The Si2400 will detect the value of the loop current at a

programmable time after going off-hook (default =

20 ms) via register OHT (S32). If the loop current is too

high, an “x” will be echoed back to the host to indicate a

fault condition. The host may then check register OD

(S14.3) to confirm an overcurrent condition and go back

on hook if necessary.

The user can optionally enable another protection

feature, the overcurrent protection, via register AOC

(S14.4). This protection feature can automatically detect

an overcurrent condition and put the Si2400 into a lower

drive mode, which is similar to the current-limiting mode

but has reduced hookswitch drive. This feature allows

the Si2400 to remain off-hook on a digital line for a

longer period of time without damage. If the Si2400

does not detect overcurrent after the time set by OCDT

(S32), then the correct line termination is applied. This

method of going off hook in current-limiting mode can

be disabled by clearing OFHE (S13.5).

Japan Caller ID Operation

After a polarity reversal and the first ring burst are

detected, the Si2400 is taken off hook. After 40 1s

(marks) have been detected, the Si2400 will search for

a start bit, echo an “m” for mark, and begin assembling

characters and transmitting them out through the serial

port. When the carrier is lost, the Si2400 immediately

hangs up and echoes “N”. Also, if no carrier is detected

for three seconds, the line hangs up and echoes “N”.

Force Caller ID Monitor

The Si2400 may be used to continuously monitor the

phone line for the caller ID mark signals. This can be

useful in systems that require detection of caller ID data

before the ring signal, voice mail indicator signals, and

Type II caller ID support. To force the Si2400 into caller

ID monitor mode, set CIDM (S0C.5).

Caller ID Decoding Operation

The Si2400 supports full caller ID detection and decode

for US Bellcore, UK, and Japanese standards. To use

the caller ID decoding feature, the following set-up is

necessary:

1. Set ND (SEO.3) = 0 (Set modem to 8N1 configuration)

2. Set CIDU (S13.1) = 1(Set modem to Bellcore type caller

18

Rev. 0.95

Si2400

the high byte be sent first containing bits D13–D7. The

LSB (B0) must equal zero. The low byte must be sent

next containing bits D6–D0; the LSB (B0) must equal

one. The receive data format is the same.

Tone Generation and Tone Detection

The Si2400 provides comprehensive and flexible tone

generation and detection. This includes all tones

needed to establish a circuit connection and to set up

and control a communication session. The tone

generation furnishes the DTMF tones for PSTN auto

dialing and the supervisory tones for call establishment.

The tone detection provides support for call progress

monitoring. The detector can also be user-programmed

to recognize up to 16 DTMF tones and two tone

detection bandpass filters.

In PCM data mode, the line can be answered using the

“ATA;” command or a call can be originated using the

“ATDT#;” command. (The “;” is used to keep the modem

from leaving the command mode.) When PCM data

mode is enabled (set PCM (S13.0) = 1 and DRT

(SE4.5:4) = 0 (default)), data will immediately begin

streaming into and out of the serial port at a 9600 Hz*2

word rate. In this mode, the controller will not detect dial

tones or other call progress tones. If desired, the user

can monitor these tones using manual call progress

detection prior to entering the PCM data mode.

DTMF tones may be detected and generated by using

the “ATA0” and “AT!0” commands described in the AT

command section.

A

description of the user-

programmable tones can be found in "Modem Result

Codes and Call Progress‚" on page 30.

To exit the PCM data mode, an escape must be

performed either by pulsing the ESC pin or by using 9-

bit data mode and setting the ninth bit. (TIES cannot be

used in PCM data mode.) The escape command will

disable PCM streaming, and the controller will again

accept AT style commands.

PCM Data Mode

The Si2400 has the ability to bypass the modem

algorithm and send 14-bit PCM data, sampled at

9600 Hz, across the DAA. To use this mode, it is

necessary to set the serial link baud rate to at least

228613 bps (SE0), set PCM (S13.0) = 1, and set MCKR

(E1.7:6) = 0. The data format (Figure 9) requires that

Note: PCM data mode is the format that must also be used

when the Si2400 is configured to run as a voice codec

(DRT = 3).

PCM Receive Timing

8-Bit Data

High-Byte

Low-Byte

TXD

D7

B1

D8

B2

D9

B3

D10

D11

D12

B6

D13

B7

D0

B1

D1

B2

D2

D3

D4

B5

D5

B6

D6

B7

B0

B3

B4

B5

Start

Stop

Start

Stop

PCM Transmit Timing

8-Bit Data

High-Byte

Low-Byte

RXD

D7

B1

D8

B2

D9

D10

D11

B5

D12

B6

D13

B7

D0

B1

D1

B2

D2

D3

D4

B5

D5

B6

D6

B7

B0

Start

B0

B3

B4

B3

B4

Stop

Note: Baud rates (programmed through register SE0) can be set to the following: 228613, 245760, and 307200.

Figure 9. PCM Timing

Rev. 0.95

19

Si2400

Data Mode (DRT = 0)

Si2400

DSP

Si3015

RXD

TXD

DSPOUT

RJ11

TX

A.

DSPIN

RX

AIN

AOUT

(Call Progress)

Voice Mode (DRT = 1)

Si2400

DSP

Si3015

RXD

TXD

DSPOUT

RJ11

TX

RX

B.

DSPIN

AIN

AOUT

(Voice In)

(Voice Out)

Loopback Mode (DRT = 2)

Si2400

DSP

RXD

TXD

DSPOUT

TX

RX

C.

DSPIN

AOUT

AIN

Codec Mode (DRT = 3)

Si2400

DSP

Si3015

RXD

TXD

DSPOUT

RJ11

TX

RX

D.

DSPIN

AIN

AOUT

(Voice In)

(Voice Out)

Figure 10. Signal Routing

20

Rev. 0.95

Si2400

Analog Codec

V.23 Operation/V.23 Reversing

The Si2400 features an on-chip, voice quality codec. The Si2400 supports full V.23 operation including the

The codec consists of a digital to analog converter V.23 reversing procedure. V.23 operation is enabled by

(DAC) and an analog to digital converter (ADC). The setting MF8 (S07) = xx10xx00 or xx01xx00. If V23R

sample rate for the codec is set to 9.6 kHz. When the (S07.5) = 1, then the Si2400 will transmit data at 75 bps

codec is powered on (set register APO (SE4.1)=1), the and receive data at either 600 or 1200 bps. If V23T

output of the DAC is always present on the Si2400 (S07.4) = 1, then the Si2400 will receive data at 75 bps

AOUT pin. When the codec is powered off (APO = 0), a and transmit data at either 600 or 1200 bps. BAUD

PWM output is present on the AOUT pin instead. In (S07.2) is the 1200 or 600 bps indicator. BAUD = 1 will

order to use the ADC, one of the four GPIO pins must enable the 1200/600 V.23 channel to run at 1200 bps

be selected as an analog input (AIN) by programming while BAUD = 0 will enable 600 bps operation.

the GPIO register (SE2).

When a V.23 connection is successfully established, the

Figure 10 shows the various signal routing modes for modem will respond with a “c” character if the

the Si2400 voice codec, which are programmed through connection is made with the modem transmitting at

register DRT (SE4.5:4). Figure 10A shows the data 1200/600 bps and receiving at 75 bps. The modem will

routing for data mode. This is the default mode, which is respond with a “v” character if a V.23 connection is

used for the modem data formats. In this configuration, established with the modem transmitting at 75 bps and

AOUT produces a mixed sum of the DSPOUT and receiving at 1200/600 bps.

DSPIN signals and is typically used for call progress

monitoring through an external speaker. The relative

allows a modem that is transmitting at 75 bps to initiate

levels of the DSPOUT and DSPIN signals that are

output on the AOUT pin can be set through registers

ATL (SF4.1:0) and ARL (SF4.3:2).

The Si2400 supports a V.23 turnaround procedure. This

a

“turnaround” procedure so that it can begin

transmitting data at 1200/600 bps and receiving data at

75 bps. The modem is defined as being in V.23 master

Figure 10B shows the format for sending analog voice mode if it is transmitting at 75 bps and it is defined as

across the DAA to the PSTN. AIN is routed directly being in slave mode if the modem is transmitting at

across the DAA to the telephone line. In this 1200/600 bps. The following paragraphs give a detailed

configuration, AOUT produces a mixed sum of the description of the V.23 turnaround procedure.

DSPOUT and DSPIN signals. The relative levels of the

Modem in master mode

DSPOUT and DSPIN signals that are output on the

To perform a direct turnaround once a modem

AOUT pin can be set through registers ATL (SF4.1:0)

connection is established, the host goes into online-

and ARL (SF4.3:2). Note that the DSP may process

command-mode by sending an escape command

these signals if it is not in PCM data mode. Thus, the

(Escape pin activation, TIES, or ninth bit escape) to the

DSP may be used in this configuration, for example, to

master modem. (Note that the host can initiate a

decode DTMF tones. This is the mode used with the “!0”

turnaround only if the Si2400 is the master.) The host

and “A0” commands.

then sends the ATRO command to the Si2400 to initiate

Figure 10C shows the loopback format, which can be

a V.23 turnaround and to go back to the online (data)

used for in-circuit testing. A detailed description of the

mode.

in-circuit test modes is described in the "Appendix A—

The Si2400 will then change its carrier frequency (from

DAA Operation‚" on page 62.

390 Hz to 1300 Hz), and wait for detecting a 390 Hz

Figure 10D shows the codec mode. This format is

carrier for 440 ms. If the modem detects more than

useful, for example, in voice prompting, speaker

40 ms of a 390 Hz carrier into a time window of 440 ms,

phones, or any systems involving digital signal

it will echo the “c” response character. If the modem

processing. In this mode, DSPOUT is routed to both the

does not detect more than 40 ms of a 390 Hz carrier

AOUT pin and to the telephone line, and AIN is routed

into a time window of 440 ms, it will hang up and echo

directly to DSPIN.

the “N” (no carrier) character as a response

Note that in all the DRT formats, the DSP must be in

PCM mode in order to pass DSPIN and DSPOUT

The Si2400 performs a reverse turnaround when it

directly to and from TXD and RXD.

Modem in slave mode

detects a carrier drop longer than 20 ms. The Si2400

then reverses (it changes its carrier from 1300 Hz to

390 Hz) and waits to detect a 1300 Hz carrier for

220 ms. If the Si2400 detects more than 40 ms of a

Rev. 0.95

21

Si2400

1300 Hz carrier in a time window of 220 ms, then it will HDLC format. On the transmit side, if no data is

set the ALERT pin (GPIO4 must be configured as available from the host, the HDLC flag pattern is sent

ALERT) and the next character echoed by the Si2400 repeatedly. When data is available, the Si2400

will be a “v”.

computes the CRC code throughout the frame and the

data is sent with the HDLC zero-bit insertion algorithm.

If the Si2400 does not detect more than 40 ms of the

1300 Hz carrier in a time window of 220 ms, then it HDLC flow control operates in a similar manner to

reverses again and waits to detect a 390 Hz carrier for normal asynchronous flow control across the UART and

220 ms. Then, if the Si2400 detects more than 40 ms of is shown in Figure 11. In order to operate flow control

a 390 Hz carrier in a time window of 220 ms, it will set (using the CTS pin to indicate when the Si2400 is ready

the ALERT pin and the next character echoed by the to accept a character), a higher serial link baud rate

Si2400 will be a “c”.

than the transmission line rate should be selected. The

method of transmitting HDLC frames is as follows:

At this point, if the Si2400 does not detect more than

40 ms of the 390 Hz carrier in a time window of 220 ms,

then it will hang up, set the ALERT pin, and the next

character echoed by the Si2400 will be an “N” (no

carrier).

1. After the call is connected, the host should begin sending

the frame data to the Si2400, using the CTS flow control to

ensure data synchronicity. A 1-deep character FIFO is

implemented in the Si2400 to ensure that data is always

available to transmit.

Successful completion of a turnaround procedure in

either master or slave will automatically update V23T

(S07.4) and V23R (S07.5) to indicate the new status of

the V.23 connection.

2. When the frame is complete, the host should simply stop

sending data to the Si2400. As shown in Figure 11B, since

the Si2400 does not yet recognize the end-of-frame, it will

expect an extra byte and assert CTS. If CTS is used to

cause a host interrupt, then this final interrupt should be

ignored by the host.

In order to avoid using the ALERT pin, the host may

also be notified of the ALERT condition by using 9-bit

data mode. Setting NBE (S15.0) = 1 and 9BF (C.3) = 0

will configure the ninth bit on the Si2400 TXD path to

function exactly as the ALERT pin has been described.

3. When the Si2400 is ready to send the next byte, if it has

not yet received any data from the host, it will recognize

this as an end-of-frame, raise CTS, calculate the final CRC

code, transmit the code, and begin transmitting stop flags.

V.42 HDLC Mode

4. After transmitting the first stop flag, the Si2400 will lower

CTS indicating that it is ready to receive the next frame

from the host. At this point the process repeats as in

step 1.

The Si2400 supports V.42 through HDLC framing in

hardware in all modem data modes. Frame packing and

unpacking, including opening and closing flag

generation and detection, CRC computation and

checking, zero insertion and deletion, and modem data

transmission and reception are all performed by the

Si2400. V.42 error correction and data compression

must be performed by the host.

The method of receiving HDLC frames is as follows:

1. After the call is connected, the Si2400 searches for flag

data. Then, once the first non-flag word is detected, the

CRC is continuously computed, and the data is sent

across the UART (8-Bit Data or 9-Bit Data mode) to the

host after removing the HDLC zero-bit insertion. The baud

rate of the host must be at least as high as that of data

transmission. HDLC mode only works with 8-bit data

words; the ninth bit is used only for escape on RXD and

EOFR on TXD.

The digital link interface in this mode uses the same

UART interface (8-Bit Data and 9-Bit Data formats) as in

the asynchronous modes and the ninth data bit may be

used as an escape by setting NBE (S15.0) = 1. When

using HDLC in 9-Bit Data mode, if the ninth bit is not

used as an escape, it is ignored.

2. When the Si2400 detects the stop flag, it will send the last

data word in the frame as well as the two CRC bytes and

determine if the CRC checksum matches or not. Thus, the

last two bytes are not frame data, but are the CRC bytes,

which can be discarded by the host. If the checksum

matches, then the Si2400 echoes “G” (good). If the

checksum does not match, the Si2400 echoes “e” (error).

Additionally, if the Si2400 detects an abort (seven or more

contiguous ones), then it will echo an “A”.

To use the HDLC feature on the Si2400, the host must

first enable HDLC operation by setting HDEN

(S07.7) = 1. Next, the host may initiate the call or

answer the call using either the “ATDT#”, the “ATA”

command, or the auto-answer mode. (The auto-answer

mode is implemented by setting register NR (S0) to a

non-zero value.) When the call is connected, a “c”, “d”,

or a “v” is echoed to the host controller. The host may

now send/receive data across the UART using either

the 8-Bit Data or 9-Bit Data formats with flow control.

When the “G”, “e”, or “A” (referred to as a frame result

word) is sent, the Si2400 raises the EOFR (end of frame

receive) pin (see Figure 10B). The GPIO1 pin must be

configured as EOFR by setting GPE (SE4.3) = 1. In

addition to using the EOFR pin to indicate that the byte is a

At this point, the Si2400 will begin framing data into the

22

Rev. 0.95

Si2400

frame result word, if in 9-bit data mode (set NBE (S15.0) =

1), the ninth bit will be raised if the byte is a frame result

word. To program this mode, set 9BF (S0C.3) = 1 and ND

(SEO.3) = 1.

Clock Generation Subsystem

The Si2400 contains an on-chip clock generator. Using

a single master clock input, the Si2400 can generate all

modem sample rates necessary to support V.22bis,

V.22/Bell212A, and V.21/Bell103 standards as well as a

9.6 kHz rate for audio playback. Either a 4.9152 MHz

clock on XTALI or a 4.9152 MHz crystal across XTALI

and XTALO form the master clock for the Si2400. This

clock source is sent to an internal phase-locked loop

(PLL) which generates all necessary internal system

clocks. The PLL has a settling time of ~1 ms. Data on

RXD should not be sent to the device prior to settling of

the PLL.

3. When the next frame of data is detected, EOFR is lowered

and the process repeats at step 1.

To summarize, the host will begin receiving data

asynchronously from the Si2400. When each byte is

received, the host should check the EOFR pin (or the

ninth bit). If the pin (or the ninth bit) is low, then the data

is valid frame data. If the pin (or the ninth bit) is high,

then the data is a frame result word.

Fast Connect

A CLKOUT pin exists whereby a 78.6432 MHz/(N + 1)

clock is produced which may be used to clock a

microcontroller or other devices in the system. N may

be programmed via CLKD (SE1.4:0) to any value from 1

to 31, and N defaults to 7 on power-up. The clock may

be stopped by setting N = 0.

In modem applications that require fast connection

times, it is possible to expedite the handshaking by

bypassing the answer tone. The No Answer Tone (NAT)

bit (S33.1) is intended to provide a method to decrease

the time needed to complete modem handshaking. If

the NAT bit is set, the Si2400 will bypass transmitting a

2100 Hz or 2225 Hz answer tone when receiving a call. The MCKR (microcontroller clock rate register SEI.7:6)

Instead, the modem will immediately begin the allows the user to control the microcontroller clock rate.

handshaking sequence that normally follows answer On powerup, the Si2400 UART baud rate is set to

tone transmission. For example, when the modem is 2400 bps, given that the clock input is 4.9152 MHz. The

configured as a V.22 answering modem, activating the MCKR register conserves power via slower clocking of

NAT bit will cause the modem to immediately transmit the microcontroller for specific applications where

unscrambled ones at 1200 bps after the modem power conservation is required. Table 14 shows the

connects to the line. In addition, register UNL (S20) may configurations for different values of MCKR.

be used to set the length of time that the modem

Note that if MCKR = 0, then all of the serial interface link

transmits unscrambled ones. Setting UNL to a value

rates will run at either half (MCKR = 1) or quarter

lower than the default may also shorten the answer

(MCKR = 2,3) speed.

sequence.

Table 14. MCKR Configurations

When the modem is set up to originate a call, setting the

NAT bit causes the modem to bypass the normal

answer tone search. Instead, the modem will send the

transmit sequence that normally occurs after receiving

the answer tone within 20 ms of the start of the answer

tone. For example, when the modem is configured as a

V.22 originating modem, activating the NAT bit will

cause the modem to start transmitting scrambled ones

at 1200 bps within 20 ms of the start of an answer tone.

MCKR

Modes Working

All modes

0

(9.8304 MHz)

1

All modes except

(4.9152 MHz) PCM streaming

and V22bis

When NAT=0, additional modem handshaking control

can be adjusted through registers TATL (S1E), ATTD

(S1F), UNL (S20), TSOD (S21), TSOL (S22), VDDL

(S23), VDDH (S24), SPTL (S25), VTSO (S26), VTSOL

(S27), VTSOH (S28), RSO (S2A), FCD (S2F), FCDH

(S30), RATL (S31), TASL (S34), and RSOL (S35).

These registers can be especially useful if the user has

control of both the originating and answer modems.

2,3

Command modes

(2.4576 MHz) only

Rev. 0.95

23

Si2400

Host begins frame N

Host finished sending frame N

Host begins frame N + 1

Start

RXD

CTS

Start

Frame N

Stop

Frame N + 1

Si2400 detects

end of frame N

Si2400 ready for byte 1 of frame N

(CTS used as normal flow control)

Si2400 ready for byte 1

of frame N + 1

Note: Figure not to scale

A. Frame Transmit

TXD

Start

Receive Data

Stop

Start

CRC Byte 1

Stop

Start

CRC Byte 2

Stop

Start

Frame Result Word Stop

EOFR

(or bit 9)

B. Frame Receive

Figure 11. HDLC Timing

24

Rev. 0.95

Si2400

AT Command Set

Table 15. AT Command Set Summary

Command Function

The Si2400 supports a subset of the AT command set

as it is intended to be used with a dedicated

microcontroller instead of the complete set required for

general terminal entry applications.

A

DT#

DP#

E

Answer Line Immediately with Modem

Command lines are typed to the modem when the

modem is in the Idle or Command state. Syntax for the

AT commands is case-sensitive.

Tone Dial Number

Pulse Dial Number

A command line is defined as a string of characters

starting with the “A” and “T” characters and ending with

a special end-of-line character, <CR> (13 decimal).

Command lines may contain several commands, one

after another. If there are no characters between “AT”

and <CR>, the modem responds with “OK” after the

carriage return.

Local Echo On/Off

H

Hangup/Go On Line

Return Product Code + Chip Revision

Speaker Control Options

Return Online

I

M

Command Line Execution

O

The characters in a command line are executed one at

a time. Unexpected command characters will be

ignored, but unexpected data characters may be

interpreted incorrectly.

RO

S

V.23 Reverse

Read/Write S Registers

Write S-Register in Binary

Read S-Register in Binary

Monitor S-Register in Binary

Software Reset

w##

r#

After the modem has executed a command line, the

result code corresponding to the last command

executed is returned to the terminal or host. The

commands which warrant a response (e.g., “ATSR?”) or

“ATI” must be the last in the string and followed by a

<CR>. All other commands may be concatenated on a

single line. To echo command line characters, set the

Si2400 to echo mode using the E1 command.

m#

Z

z

Wakeup on Ring

All numeric arguments, including S-register numbers,

are in hexidecimal format and two digits must always be

entered.

AT Command Set Description

A

Answer

The “A” command makes the modem go off hook and

respond to an incoming call. This command is to be

executed after the Si2400 has indicated that a ring has

occurred. (The Si2400 will indicate an incoming ring by

echoing an “R”.)

< CR > End Of Line Character

This character is typed to end a command line. The

value of the <CR> character is 13, the ASCII carriage

return character. When the <CR> character is entered,

the modem executes the commands in the command

line. Commands which do not require a response are

executed immediately and do not need a <CR>.

This command is aborted if any other character is

transmitted to the Si2400 before the answer process is

completed.

Auto answer mode is entered by setting NR (S0) to a

nozero value. NR indicates the number of rings before

answering the line.

Upon answering, the modem communicates by

whatever protocol has been determined via the modem

control registers in S07.

If no transmit carrier signal is received from the calling

modem within the time specified in CDT (S39), the

modem hangs up and enters the idle state.

Rev. 0.95

25

Si2400

D

Dial

M3

DT#

DP#

Tone Dial Number.

Pulse Dial Number.

Speaker on after last digit dialed, off at carrier detect.

O

Return to Online Mode

The D commands make the modem dial a telephone This command returns the modem to the online mode. It

call according to the digits and dial modifiers in the dial is frequently used after an escape sequence to resume

string following the commands. A maximum of 64 digits communication with the remote modem.

is allowed. A DT command performs tone dialing, and a

RO

Turn-Around

DP command performs pulse dialing.

This command initiates a V.23 “direct turnaround”

sequence and returns online.

The “ATS07=40DT;” command can be used to go off

hook without dialing.

S

S Register Control

The dial string must contain only the digits “0–9”, “*”, “#”,

“A”, “B”, “C”, “D”, or the modifiers “;”, “/”, or “,”. Other

characters will be interpreted incorrectly. The modifier

“,” causes a two second delay in dialing. The modifier “/”

causes a 125 ms delay in dialing. The modifier “;”

returns the device to command mode after dialing and it

must be the last character.

SR=N

Write an S register. This command writes the value “N”

to the S-register specified by “R”. “R” is a hexidecimal

number, and “N” must also be a hexadecimal number

from 00–FF. This command does not wait for a carriage

return <CR> before taking effect.

Note: Two digits must always be entered for both “R” and “N”.

If any character is received by the Si2400 between the

ATDT#<CR> (or ATDP#<CR>) command and when the

connection is made (“c” is echoed), the extra character

is interpreted as an abort, and the Si2400 returns to

command mode, ready to accept AT commands.

SR?

Read an S register. This command causes the Si2400

to echo the value of the S-register specified by R in hex

format. R must be a hexidecimal number.

If the modem does not have to dial (i.e., “ATDT<CR>” or

“ATDP<CR>” with no dial string), the Si2400 assumes

the call was manually established and attempts to make

a connection.

Note: Two digits must always be entered for R.

w##

Write S Register in Binary

This command writes a register in binary format. The

first byte following the “w” is the address in binary

format and the second byte is the data in binary format.

This is a more rapid method to write registers than the

“SR=N” command and is recommended for use by a

host microcontroller.

E

Command Mode Echo

Tells the Si2400 whether or not to echo characters sent

from the terminal when the modem is accepting AT

commands.

EO

r#

Read S Register in Binary

Does not echo characters sent from the terminal.

This command reads a register in binary format. The

byte following the “r” is the address in binary format.

The modem will echo the contents of this register in

binary format. This is a more rapid method to read

registers than the “SR?” command and is

recommended for use by a host microcontroller.

E1

Echo characters sent from the terminal.

H

Hangup

Hang up and go into command mode (go offline).

Chip Identification

I

Notes: When using this command, the modem result

codes should be disabled by setting MRCD (S14.7) = 1.

This ensures that the host will not confuse a result code

with data being read.

This command causes the modem to echo the chip

revision for the Si2400 device.

M

Speaker On/Off Options

w## and r# are not required to be on separate lines (i.e.,

no <CR> between them). Also, the result of an r# is

returned immediately without waiting for a <CR> at the

end of the AT command line.

These options are used to control AOUT for use with a

call progress monitor speaker.

M0

Speaker always off.

Once a <CR> is encountered, “AT” is again required to

begin the next “AT” command.

M1

Speaker on until carrier established.

M2

Speaker always on.

26

Rev. 0.95

Si2400

m#

Monitor S Register in Binary

Extended AT Commands for the Alarm

This command monitors a register in binary format. The

byte following the “m” is the address in binary format.

The Si2400 constantly transmits the contents of the

register at the set baud rate until a new byte is

transmitted to the device. The new byte is ignored and

viewed as a stop command. The modem result codes

should be disabled (as described above in r#) before

using this command.

Industry

In addition to the AT command set used to make a data

modem connection, the Si2400 also supports a

complete set of commands required for making calls

and connections in security industry systems. These

commands are summarized in Table 16.

A0

After answering, connect AIN analog signal to phone

line transmit signal and output the phone line receive

signal to the AOUT pin (See Figure 10B). Also, this

mode monitors for DTMF received digits and the user

defined frequencies. A digit is reported by echoing the

character received. Transmission of any data to the

Si2400 UART will cause the modem to go into

command mode.

Z

Software Reset

The “Z” command causes a software reset to occur in

the device whereby all registers will return to their

default power up value. If other commands follow on the

same line, another AT is needed after the “Z” (e.g.,

ATZATS07=06<CR>).

z

Wakeup on Ring

The Si2400 enters a low-power mode wherein the DSP

and microcontroller are powered down. The serial

interface also stops functioning. In this mode, only the

line-side chip (Si3015) and the ISOcap communication

link function. An incoming ring signal causes the Si2400

to power up and echo a “w”. Without a ring signal, the

host must perform a hardware reset to power up the

Si2400.

Once in command mode, the modem may be

disconnected with the “ATH” command, or DTMF tones

may be generated by using the “ATDT#” command. (In

this case, “ATDT#” does not initiate a new call because

the Si2400 has not been hung up and is still online.)

Online mode can be resumed by issuing the “ATO”

command. (User-defined frequencies are reported as X

and

Y for user defined frequencies 1 and 2,

respectively. To enable user-defined frequencies, set

UDF (S14.6) = 1.) Setting the user-defined frequencies

requires DSP low-level control.

Table 16. AT Command Set Extensions

for Alarm Industry

A1

Answer line and follow the "SIA Format" protocol for

Alarm System Communications at 300 bps (see !2).

Command Function

A0

A1

!0

Answer and switch to DTMF monitor mode

Answer and switch to “SIA Format”

Dial and switch to DTMF monitor mode

Dial and switch to DTMF security mode

Dial and switch to “SIA Format”

Dial and switch to GDC—P1

!0

After dialing the number, go into DTMF monitor mode

(no modem connection). After dialing is complete, the

connection is exactly the same as for the “AO”

command.

!1

Note: When using “!” commands, the first instance of “!” must

!2

be on the same line as the “ATDT#” or “ATDP#”.

!1

!3

Dial number and follow the DTMF security protocol. “#”

is the DTMF message to transmit.

!4

Dial and switch to GDC—P2

!5

Dial and switch to GDC—P3

The modem dials the phone number and then echoes

“r”, “b”, and “c” as appropriate. “c” echoes only after the

Si2400 detects the Handshake Tone. After a 250 ms

wait, the modem sends the DTMF tones. Next, the

modem searches for a Kissoff tone. If the Kissoff tone is

detected, the Si2400 echoes a “K” and the controller

may begin sending the next message. The message

should end with a <CR>.

!6

Dial and switch to GDC—P4

X1

X2

SIA half-duplex mode search

SIA half-duplex return online as

transmitter

X3

SIA half-duplex return online as receiver

Rev. 0.95

27

Si2400

In order to send another message, the Si2400 must 3. If a positive (negative) acknowledgment is detected a

begin to receive the next message from the host within “P” (“N”) is displayed once the tone has been detected

250 ms of echoing the “K”. The next message must be for 400 ms.

proceeded by the “!” character. To resend the same

4. The modem is still in command mode at this point. It

message, the host can transmit a “~”. After the Si2400

can be put back online as a transmitter by issuing the

echoes the “K”, any character other than “!” or “~”

“ATX2” command, or put online as a receiver by issuing

indicates an abort to the Si2400, and it will exit into

the “ATX3” command.

command mode, echoing an “O”. Note that this aborts

This sequence can be repeated to send long messages.

the sending process, but the modem remains off-hook.

Notes:

Multiple messages may be sent in this manner. If the

1. If tonal acknowledgment is not used, and the host wants to

Kissoff tone is not detected by the Si2400 within 1.25

reverse the line, it can issue an escape and immediately

seconds, it will echo with a “^”. In this case, the host

program “ATX2” or “ATX3” to reverse the data direction.

may transmit a “~” after the “^” and the message will be

resent.

2. Ninth bit escape does not operate in security modes.

This command may also be used without being

proceeded by the “ATDT” command. Thus, transmitting

an “AT!2#” will immediately send the “#” message

without dialing.

Notes:

1. While the DTMF message is being sent, the Si2400 is not

in command mode. No characters should be transmitted to

the Si2400 during this time. The only exceptions are the “!”

!3

and “~” characters, which have special meanings as

described above. If any other character is transmitted it is

ignored, the message is aborted, and the Si2400 returns to

command mode expecting AT commands.

Dial the phone number and transmit the message

according to the Generic SIA pulse format P1 protocol.

After the handshake tone, the Si2400 responds with “c”

and then transmits the message with the correct timing.

When the message is sent, the device waits for the

kissoff tone. If a kissoff tone is detected, the modem

echoes a “K” and enters command mode. If no kissoff

tone is detected and the Inter-Round time (S36) timeout

has expired, then the Si2400 echoes a “^”.

2. The escape pin or ninth bit has no effect in security modes.

3. A second kissoff tone detector has been added that will

return the character “k” if a kissoff tone longer than the

value stored in KTL (S36) is detected (default = 1 second).

4. Setting (S0C.0) will cause a “.” character to be echoed

when the DTMF tone is turned on and the "/" character to

be echoed when the tone is turned off. This can help give

the controller an indication of the progress of the message

transmission.

To resend the message, the host can respond with “~”

after receiving the “^”. If not, the host can respond with

“O” to enter command mode. In these modes, setting

(SC.0) causes a “.” to be echoed when the tone is

turned on and a “/” to be echoed when the tone is turned

off. This can help give the controller an indication of how

the message is progressing.

5. This command may also be used without being proceeded

by the ATDT command. Thus, transmitting an “AT!1#” will

immediately send the “#” message without dialing.

!2

After dialing the number, follow the "SIA Format"

protocol for Alarm System Communications. The

signaling speed is set to 300 bps. The modem dials the

phone number and then echoes “r” and “b” as

appropriate. Once the handshake tone is detected, the

speed synchronization signal is sent, and an

acknowledge “c” is echoed. The modem is then put

online in half-duplex FSK. After the “c” is received by

the host, the host can then send the first SIA block.

Once the host has transmitted the SIA block, it can

monitor for the acknowledge tone by completing the

following sequence:

Note: Max number digits = 64 including phone number and !3

command

!4

This command is identical to S3 except pulse format P2

is used.

!5

This command is identical to S3 except pulse format P3

is used.

!6

This command is identical to S3 except pulse format P4

is used.

1. The Si2400 should be put in command mode by

issuing an escape (pulsing the escape pin).

Note: Commands “AT!3#”, “AT!4#”, “AT!5#”, and “AT!6#”

may also be used without being preceded by the

“ATDT” command. For example, transmitting an “AT!6#”

will immediately send the # message without dialing.

2. At this point the “ATX1” command may be issued.

This causes the modem to turn off the transmitter and

begin monitoring for the acknowledgment tones.

28

Rev. 0.95

Si2400

X1

X3

Search for positive and negative acknowledge tones in Return to online mode in SIA half-duplex mode as

SIA half-duplex 300 bps mode. The Si2400 will respond receiver.

with “P” when a positive acknowledge is detected and

“N” when a negative acknowledge is detected.

X2

Return to online mode in SIA half-duplex mode as

transmitter.

Table 17. Si2400 Global Ringer and Busy Tone Cadence Settings

Country

RTON

RTOF

RTOD

BTON

BTOF

BTOD

Australia

Austria

7

3

93

56

75

140

93

65

75

3

1

10

6

37

30

50

25

35

25

30

50

37

30

50

75

50

37

30

50

25

35

25

30

50

37

30

50

75

50

4

3

5

3

4

3

5

4

3

5

8

5

18

14

28

18

6

Belgium

Brazil

8

China

8

Denmark

Finland

15

10

7

France

Germany

Great Britain

Greece

8

2

18

7

75

4

8

Hong Kong, New Zealand

India

1

7

3

1

Ireland

7

4

1

Italy, Netherlands, Norway, Thailand,

Switzerland, Israel

18

75

8

Japan, Korea

Malaysia

18

8

37

4

1

50

35

25

50

75

20

25

50

65

25

50

75

20

25

50

5

7

Mexico

18

7

75

93

4

8

3

Portugal

10

1

5

Singapore

Spain

8

28

18

38

56

93

37

75

6

2

Sweden

10

4

3

Taiwan

5

U.S., Canada (default)

7

15

Rev. 0.95

29

Si2400

Table 18. Modem Result Codes (Continued)

Modem Result Codes and Call Progress

Table 18 shows the modem result codes which can be

used in call progress monitoring. All result codes are

only a single character in order to speed up the

communication and ease processing by the host.

x

Overcurrent State Detected After an

Off-Hook Event

^

,

Kissoff tone detection required

Dialing Complete

Table 18. Modem Result Codes

Command Function

Automatic Call Progress Detection

The Si2400 has the ability to detect dial, busy and

ringback tones automatically. The following is a

description of the algorithms that have been

implemented for these three tones.

a

British Telecom Caller ID Idle Tone

Alert Detected

1. Dial Tone. The dial tone detector looks for a dial tone after

going off hook and before dialing is initiated. This can be

bypassed by enabling blind dialing (set BD (S07.6) =1).

After going off hook, the Si2400 waits the number of

seconds in DW (S01) before searching for the dial tone.

In order for a dial tone to be detected, it must be present

for the length of time programmed in DTT (SIC). Once the

dial tone is detected, dialing will commence. If a dial tone

is not detected for the time programmed in CW (S02), the

Si2400 will hangup and echo an “N” to the user.

b

c

d

Busy Tone Detected

Connect

Connect 1200 bps (when pro-

grammed as V.22bis modem)

f

H

I

Hookswitch Flash or Battery Rever-

sal Detected

Modem Automatically Hanging Up in

Japan Caller ID Mode

2. Busy / Ringback Tone. After dialing has completed, the

Si2400 monitors for Busy/Ringback and modem answer

tones. The busy and ringback tone detectors both use the

call progress energy detector.

On-Hook Intrusion Completed

(phone back on hook)

Si2400 register settings for global cadences for busy and

ringback tones are listed in Table 17, including the default

settings for registers BTON (S16), BTOF (S17), BTOD

(S18), RTON (S19), RTOF (S1A), and RTOD (S1B).

i

On-Hook Intrusion Detected (phone

off-hook on the line)

K

SIA Contact ID Kissoff Tone

Detected

Manual Call Progress Detection

Because other call progress tones beyond those

described above may exist, the Si2400 supports manual

call progress. This requires the host to read and write

the low-level DSP registers and may require realtime

control by the host. Manual call progress may be

required for detection of application-specific ringback,

dial tone, and busy signals.

L

l

Phone Line Detected

No Phone Line Detected

Caller ID Mark Signal Detected

No Carrier Detected

m

N

n

Note: Manual call progress requires DSP low-level control.

The section on DSP low level control should be read

before attempting manual call progress detection.

No Dial tone (time-out set by CW

(S02))

O

R

r

Modem OK Response

Incoming Ring Signal Detected

Ringback Tone Detected

Resending SIA Contact ID Data

Dial Tone

To use this mode, the automatic modem responses

should be disabled by setting MRCD (S14.7) = 1. The

call progress biquad filters can be programmed to have

a custom desired frequency response and detection

level (as described in “Modem Result Codes and Call

Progress” ).

S

t

Four dedicated user-defined frequency detectors can

be programmed to search for individual tones. The four

detectors have center frequencies which can be set

through registers UDFD1–4 (see Table 20). TDET (SE5

(SE8 = 0x02) Read Only Definition) can be monitored,

v

Connect 75 bps (V.23 only)

30

Rev. 0.95

Si2400

along with TONE, to detect energy at these user-

defined frequencies. The trip-threshold for UDFD1–4 is

–30 dBm.

Table 19. DTMF

By issuing the “ATDT;” command, the modem will go off

hook and return to command mode. The user can then

put the DSP into call progress monitoring by first setting

SE8 = 0x02. Next, set SE5 = 0x00 so no tones are

transmitted, and set SE6 to the appropriate code,

depending on which types of tones are to be detected.

Tones

DTMF

Code

Keyboard

Equivalent

Low

High

1336

1209

1336

1477

1209

1336

1477

1209

1336

1477

1633

1209

1477

1633

0

1

0

1

2

3

4

5

6

7

8

9

D

*

941

697

770

852

941

697

770

852

At this point, users may program their own algorithm to

monitor the detected tones. If the host wishes to dial, it

should do so by blind dialing, setting the dial timeout

PW (SO1) to 0 seconds, and issuing an “ATDT#;”

command. This will immediately dial and return to

command mode.

2

3

4

Once the host has detected an answer tone using

manual call progress, the host should immediately

execute the “ATA” command in order to make a

connection. This will cause the Si2400 to search for the

modem answer tone and begin the correct connect

sequence.

5

6

7

In manual call progress, the DSP can be programmed

to detect specific tones. The result of the detection is

reported into SE5 (SE8 = 0x2) as explained above. The

output is priority encoded such that if multiple tones are

detected, the one with the highest priority whose

detection is also enabled is reported (see SE5

(SE8=02) Read Only).

8

9

10

11

12

13

14

15

In manual call progress, the DSP can be programmed

to generate specific tones (see TONC register SE5

(SE8 = 02) Write Only). For example, setting TONC = 6

will generate the user-defined tone as indicated by

UFRQ in Table 20 with an amplitude of TGNL.

#

A

B

C

Table 19 shows the mappings of Si2400 DTMF values,

keyboard equivalents, and the related dual tones.

Rev. 0.95

31

Si2400

Low Level DSP Control

Although not necessary for most applications, the DSP DSP word requires two writes from the host. When

low-level control functions have been made available for SE8 = 1, SE5 represents the 8 LSBs of the word, and

users with very specific requirements who must control SE6.5:0 represents the 6 MSBs. Tables 20 and 21

the DSP more directly.

define the DSP registers.

Note: SE8=0 and SE8=1 must be used only when the

DSP Registers

modem is not already “online.”

The DSP registers may be accessed through the

Si2400 microcontroller. S-registers SE5, SE6, SE7, and

SE8 are used to read and write the DSP registers. The

definition of SE5 and SE6 both depend on the value of

SE8 and whether they are being read or written. Both of

these conditions are given in the register definitions for

SE5 and SE6 (see "S Registers‚" on page 35).

Example1: The user would like to program call

progress filter coefficient A2_k0 (0x15) to be 309

(0x135).

Host Command:

ATSE8=00SE6=00SE5=15SE8=01SE6=01SE5=35SE8=00

In the command above, ATSE8=00 sets up registers

SE5 and SE6 as DSP address registers. SE6=00 sets

the high bits of the address, and SE5=15 sets the low

bits. SE8=01 sets up registers SE5 and SE6 as DSP

data registers for the previously written DSP address

(0x15). SE6=01 sets the high 6 bits of the 14-bit data

word, and SE5=35 sets the low 8 bits of the 14-bit data

word.

When SE8 = 0 or 1, SE5 and SE6 are defined directly

as the address (SE8 = 0) and data (SE8 = 1) of the

internal DSP registers. The address field is 8 bits wide.

As shown in Tables 20 and 21, DSP address values

range from 0x02 to 0x0B and from 0x10 to 0x23. To

write an address, set SE8 = 0 and then write the DSP

address to register SE5 and SE6. Writing any other

DSP addresses than those shown in Tables 20 and 21

may cause unpredictable behavior by the DSP. The

DSP data field is 14 bits wide. Thus, writing a single

When SE8=2, depending on whether the host is reading

or writing, SE5 and SE6 are as defined in the S-register

tables.

Table 20. Low-Level DSP Parameters

DSP Register

Address

Name

Description

Function

Default

0x02

0x03

0x04

0x05

XMTL

DAA modem full scale transmit level,

default = –10 dBm

Level = 20log₁₀(XTML/4096)

–10 dBm

4096

DTML

DTMT

UFRQ

DTMF high tone transmit level,

default = –5 dBm

Level = 20log₁₀(DTML/5157)

–5 dBm

5157

3277

91

DTMF twist ratio (low/high), default =

–2 dBm

Level = 20log₁₀(DTMT/3277)

–2 dB

User-defined transmit tone frequency. f = (9600/512) UFRQ (Hz)

See register SE5 (SE8=0x02 (Write

Only))

0x06

0x07

0x08

0x09

CPDL

Call progress detect level (see

Figure 12), default = –34 dBm

Level = 20log₁₀(4096/CPDL)

–34 dBm

4096

4987

536

UDFD1 User-defined frequency detector 1.

Center frequency for detector 1.

UDFD1 = 8192 cos (2π f/9600)

UDFD2 = 8192 cos (2π f/9600)

UDFD3 = 8192 cos (2π f/9600)

UDFD2 User-defined frequency detector 2.

Center frequency for detector 2.

UDFD3 User-defined frequency detector 3.

Center frequency for detector 3.

4987

32

Rev. 0.95

Si2400

Table 20. Low-Level DSP Parameters (Continued)

Description Function

UDFD4 = 8192 cos (2π f/9600)

DSP Register

Address

Name

Default

0x0A

0x0B

UDFD4 User-defined frequency detector 4.

Center frequency for detector 4.

536

TGNL

Tone generation level associated with

TONC (SE5 (SE8 = 0x02) Write Only

Definition), default = –10 dBm

Level = 20log₁₀(TGNL/2896)

– 10 dBm

2896

Call Progress Filters

Table 21. Call Progress Filters

The programmable call progress filters coefficients are

located in DSP address locations 10H through 23H.

There are two independent 4th order filters A and B,

each consisting of two biquads, for a total of 20

coefficients. Coefficients are 14 bits (–8192 to 8191)

and are interpreted as, for example, b0 = value/4096,

thus giving a floating point value of approximately –2.0

to 2.0. Output of each biquad is calculated as

DSP Register

Coefficient

Default

Address

0x10

0x11

0x12

0x13

0x14

0x15

0x16

0x17

0x18

0x19

0x1A

0x1B

0x1C

0x1D

0x1E

0x1F

0x20

0x21

0x22

0x23

A1_k0

A1_b1

A1_b2

A1_a1

A1_a2

A2_k0

A2_b1

A2_b2

A2_a1

A2_a2

B1_k0

B1_b1

B1_b2

B1_a1

B1_a2

B2_k0

B2_b1

B2_b2

B2_a1

B2_a2

1024

–2046

1024

7737

–3801

309

w[n] = k0 * x[n] + a1 * w[n – 1] + a2 * w[n – 2]

y[n] = w[n] + b1 * w[n – 1] + b2 * w[n – 2].

The output of the filters is input to an energy detector

and then compared to a fixed threshold with hysteresis

(DSP register CPDL). Defaults shown are a bandpass

filter from 80–650 Hz (–3 dB). These registers are

located in the DSP and thus must be written in the same

manner described in "Modem Result Codes and Call

Progress‚" on page 30.

10

309

7109

–3565

1024

–2046

1024

7737

–3801

309

The filters may be arranged in either parallel or cascade

through register CPCD (SE6.6 (SE8=0x02)), and the

output of filter B may be squared by selecting CPSQ

(SE6.7 (SE8=0x02)). Figure 12 shows a block diagram

of the call progress filter structure.

10

309

7109

–3565

Rev. 0.95

33

Si2400

0

CPCD

1

Filter Input

Energy

Detect

0

Filter B

y = x²

1

B

A

B

Max

(A,B)

0

Hysteresis

TDET

A > B?

1

0

CPCD

CPSQ

Energy

Detect

Filter A

20log₁₀(4096/CPDL) –34 dBm

Figure 12. Programmable Call Progress Filter Architecture

34

Rev. 0.95

Si2400

S Registers

Note: Any register not documented here is reserved and should not be written.

Table 22. S-Register Summary

Register Name Function

Reset

0x00

0

1

2

NR

DW

CW

Number of rings before answer; 0 suppresses auto answer.

0x03

0x14

Number of seconds modem waits before dialing (maximum of 109 seconds).

Number of seconds modem waits for a dial tone before hang-up added to

time specified by DW (maximum of 109 seconds).

0x0E

3

CLW

TD

Duration that the modem waits (53.33 ms units) after loss of carrier before

hanging up.

0x30

0x18

4

5

Both duration and spacing (5/3 ms units) of DTMF dialed tones.

OFFPD Duration of off-hook time (5/3 ms units) for pulse dialing.

0x24

6

ONPD Duration of on-hook time (5/3 ms units) for pulse dialing.

This is a bit mapped register.¹

0000_0001

0x0A

7

MF1

8

MNRP Minimum ring period (5/3 ms units).²

MXRP Maximum ring period (5/3 ms units).²

0x28

9

Ringer off time (53.333 ms units).²

0x4B

A

ROT

MNRO Minimum ringer off time (10 ms units).²

0x28

B

0000_0000

0x16

C

MF2

RPE

DIT

This is a bit mapped register.¹

D

Ringer off time allowed error (53.333 ms units).²

Pulse dialing Interdigit time (10 ms units added to a minimum time of 64 ms).

TIES escape character. Default = +.

0x46

E

0x2B

F

TEC

0x07

10

11

12

13

14

15

16

TDT

TIES delay time (256 * 5/3 ms units).

ONHI This is a bit mapped register.¹

OFHI

This is a bit mapped register.¹

MF14 This is a bit mapped register.¹

MF15 This is a bit mapped register.¹

0100_1101

0100_0011

0001_0000

0000_0000

1000_0100

0x32

MLC

This is a bit mapped register.¹

BTON Busy tone on. Time that the busy tone must be on (10 ms units) for busy tone

detector.

0x32

0x0F

17

18

BTOF Busy tone off. Time that the busy tone must be off (10 ms units) for busy tone

detector.

BTOD Busy tone delta. Detector Time Delta (10 ms). A busy tone is detected to be

valid if (BTON – BTOD < on time < BTON + BTOD) and (BTOF – BTOD < off

time < BTOF + BTOD).

0x26

0x4B

19

1A

RTON Ringback tone on. Time that the ringback tone must be on (53.333 ms units)

for ringback tone detector.

RTOF Ringback tone off. Time that the ringback tone must be off (53.333 ms units)

for ringback tone detector.

Rev. 0.95

35

Si2400

Table 22. S-Register Summary (Continued)

0x07

1B

1C

RTOD Detector time delta (53.333 ms units). A ringback tone is determined to be

valid if (RTON – RTOD < on time < RTON + RTOD) and (RTOF – RTOD < off

time < RTOF + RTOD).

0x0A

0x03

0x2D

0x5D

DTT

Dial tone time. The time that the dial tone must be valid before being detected

(10 ms units).

1D

1E

1F

20

DTMFD DTMF detect time. The time that a DTMF tone must be valid before being

detected (10 ms units).

TATL

Transmit answer tone length. Answer tone length in seconds when answering

a call (3 seconds units).

ATTD Answer tone to transmit delay. Delay between answer tone end and transmit

data start (5/3 ms units).

UNL

Unscrambled ones length. Minimum length of time required for detection of

unscrambled binary ones during V.22 handshaking by a calling modem

(5/3 ms units).

0x09

21

TSOD Transmit scrambled ones delay. Time between unscrambled binary one

detection and scrambled binary one transmission by a call mode V.22 modem

(5/3 ms units added to a minimum time of 426.66 ms).

0xA2

0xCB

22

23

TSOL Transmit scrambled ones length. Length of time scrambled ones are sent by

a call mode V.22 modem (5/3 ms units).

VDDL V.22X data delay low. Delay between handshake complete and data connec-

tion for a V.22X call mode modem (5/3 ms units added to the time specified

by VDDH).

0x08

24

VDDH V.22X data delay high. Delay between handshake complete and data con-

nection for a V.22X call mode modem (256 * 5/3 ms units added to the time

specified by VDDL).

0x3C

0x0C

25

26

SPTL S1 pattern time length. Amount of time the unscrambled S1 pattern is sent by

a call mode V.22bis modem (5/3 ms units).

VTSO V.22bis 1200 bps scrambled ones length. Minimum length of time for trans-

mission of 1200 bps scrambled binary ones by a call mode V.22bis modem

after the end of pattern S1 detection (5/3 ms units added to a minimum time

of 426.66 ms).

0x78

0x08

0xD2

27

28

2A

VTSOL V.22bis 2400 bps scrambled ones length low. Minimum length of time for

transmission of 2400 bps scrambled binary ones by a call mode V.22bis

modem (5/3 ms units added to the time specified by VTSOH).

VTSOH V.22bis 2400 bps scrambled ones length high. Minimum length of time for

transmission of 2400 bps scrambled binary ones by a call mode V.22bis

modem (256 * 5/3 ms units added to the time specified by VTSOL).

RSO

Receive scrambled ones V.22bis (2400 bps) length.

Minimum length of time required for detection of scrambled binary ones dur-

ing V.22bis handshaking by the answering modem after S1 pattern conclu-

sion (5/3 ms units).

0x18

2B

DTL

V.23 direct turnaround carrier length. Minimum length of time that a master

mode V.23 modem must detect carrier when searching for a direct turnaround

sequence (5/3 ms units).

36

Rev. 0.95

Si2400

Table 22. S-Register Summary (Continued)

0x08

0x0C

0x84

0x3C

0x00

2C

2D

2E

2F

30

DTTO V.23 direct turnaround timeout. Length of time that the modem searches for a

direct turnaround carrier (5/3 ms units added to a minimum time of

426.66 ms).

SDL

V.23 slave carrier detect loss. Minimum length of time that a slave mode

V.23 modem must lose carrier before searching for a reverse turnaround

sequence (5/3 ms units).

RTCT V.23 reverse turnaround carrier timeout. Amount of time a slave mode V.23

modem will search for carriers during potential reverse turnaround sequences

(5/3 ms units).

FCD

FSK connection delay low. Amount of time delay added between end of

answer tone handshake and actual modem connection for FSK modem

connections (5/3 ms units).

FCDH FSK connection delay high. Amount of time delay added between end of

answer tone handshake and actual modem connection for FSK modem con-

nections (256*5/3 ms units).

0x3C

0x0C

31

32

RATL Receive answer tone length. Minimum length of time required for detection

of a CCITT answer tone (5/3 ms units).

OCDT The time after going off hook when the loop current sense bits are checked

for overcurrent status (5/3 ms units).

0000_0000

0x5A

33

34

MDMO This is a bit mapped register.¹

TASL

Answer tone length when answering a call (5/3 ms units). This register is only

used if TATL (1E) has a value of zero.

0xA2

0x64

0x20

35

36

37

RSOL Receive scrambled ones V.22 length (5/3 ms units). Minimum length of time

that an originating V.22 (1200 bps) modem must detect 1200 bps scrambled

ones during a V.22 handshake.

SKDTL Second kissoff tone detector length. The security modes A1 and !1 will echo a

“k” if a kissoff tone longer than the value stored in SKDTL is detected

(10 ms units).

CDR

Carrier detect return. Minimum length of time that a carrier must return and be

detected in order to be recognized after a carrier loss is detected

(5/3 ms units).

0x38

0x3C

0x29

38

39

3A

IRT

CDT

ATD

RP

Interround time. Time between messages in security pulse modes

(53 ms units).

Carrier detect timeout. Amount of time modem will wait for carrier detect

before aborting call (1 second units).

Delay between going off-hook and answer tone generation when in answer

mode (53.33 ms units).

0x03

3B

DB

E0

E1

E2

E3

Minimum number of consecutive ring pulses per ring burst.

0x00

LVCS Loop voltage (on-hook)/loop current (off-hook) register

CF1

This is a bit mapped register.¹

CLK1 This is a bit mapped register.¹

GPIO This is a bit mapped register.¹

0000_0010

0100_0111

0000_0000

GPD

This is a bit mapped register.¹

Rev. 0.95

37

Si2400

Table 22. S-Register Summary (Continued)

This is a bit mapped register.¹

DADL (SE8 = 0x00) Write only definition. DSP register address lower bits [7:0].¹

DDL

(SE8 = 0x01) Write only definition. DSP data word lower bits [7:0].¹

DSP1 (SE8 = 0x02) Read only definition. This is a bit mapped register.¹

DSP2 (SE8 = 0x02) Write only definition. This is a bit mapped register.¹

DADH (SE8 = 0x00) Write only definition. DSP register address upper bits [15:8]

0000_0000

0x00

E4

E5

E6

CF5

0x00

DDH

(SE8 = 0x01) Write only definition. DSP data word upper bits [13:8]

DSP3 (SE8 = 0x02) Write only definition. This is a bit mapped register.¹

0x00

0000_0000

0x00

E7

E8

E9

EA

DSPR3 This is a bit mapped register.¹

DSPR4 Set the mode to define E5 and E6.

RTH

RTL

Timer high. High bits of the realtime timer (see register EA).

Timer low. Low bits of the realtime timer. The timer has an LSB of 5/3 ms, with

maximum time count at 109 seconds. RTL should always be read first, with

RTH read second.

This is a bit mapped register.¹

0000_0000

0001_1100

0000_0000

0000_1111

0000_1000

0000_0000

0001_0000

xxxx_1100

0000_0000

EB

F0

TPD

DAA0 This is a bit mapped register.¹

DAA1 This is a bit mapped register.¹

DAA2 This is a bit mapped register.¹

DAA4 This is a bit mapped register.¹

DAA5 This is a bit mapped register.¹

DAA6 This is a bit mapped register.¹

DAA7 This is a bit mapped register.¹

DAA8 This is a bit mapped register.¹

DAA9 This is a bit mapped register.¹

F1

F2

F4

F5

F6

F7

F8

F9

Notes:

1. These registers are explained in detail in the following section.

2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT,

and REP.

38

Rev. 0.95

Si2400

Register 7. Modem Functions 1

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name HDEN BD V23 MODM DTMF BAUD CCITT FSK

Type

R/W R/W R/W

R/W

Reset settings = 0000_0001

Bit

Name

Function

7

HDEN

HDLC Framing.

0 = Disable

1 = Enable

6

5

BD

Blind Dialing.

0 = Disable

1 = Enable (Blind dialing occurs immediately after “ATDT#” command.)

V23R

V.23 Receive.

V.23 75 bps send/600 (BAUD = 0) or 1200 (BAUD = 1) bps receive

0 = Disable

1 = Enable

4

V23T

V.23 Transmit.

V.23 600 (BAUD = 0) or 1200 (BAUD = 1) bps send/75 bps receive

0 = Disable

1 = Enable

3

2

DTMF

BAUD

DTMF Tone Detector.

0 = Disable

1 = Enable

2400/1200 Baud Select.

2400/1200 baud select (V23R = 0 and V23T = 0)

0 = 1200

1 = 2400

600/1200 baud select (V23R = 1 and V23T = 1)

0 = 600

1 = 1200

1

0

CCITT

FSK

CCITT/Bell Mode.

0 = Bell

1 = CCITT

300 bps FSK.

0 = Disable

1 = Enable

Rev. 0.95

39

Si2400

Register C. Modem Functions 2

Bit

D7

D6

D5

CIDM

R/W

D4

D3

D2

D1

D0

Name

Type

9BF BDL MLB MCH

R/W R/W R/W R/W

Reset settings = 0000_0000

Bit

7:6

5

Name

Function

Reserved

Read returns zero.

CIDM

Caller ID Monitor.

Causes the Si2400 to search for the caller ID Channel Seizure Signal (alternating 1/0

pattern) continuously.

0 = Disable (default)

1 = Enable

Reserved

9BF

Read returns zero.

4

3

Ninth Bit Function.

Only valid if the ninth bit escape is set (S15.0).

0 = Ninth bit equivalent to ALERT.

1 = Ninth bit equivalent to HDLC EOFR.

2

1

0

BDL

MLB

MCH

Blind Dialing.

Enables blind dialing after register CW dial timeout (S02) expires.

Modem Loopback.

Swaps frequency bands in modem algorithm to do a loopback in a test mode.

Miscellaneous Characters.

Enables “.” and “/” character echoing to indicate tone on and tone off for security mode

and the SIA pulse modes.

Register 11. On-Hook Intrusion

Bit

D7

D6

D5

D4

D3

D2

AVL

R/W

D1

D0

Name

Type

DVL

R/W

Reset settings = 0100_1101

Bit

Name

Function

7:5

DVL

Differential Voltage Level.

Differential voltage level to detect intrusion event.

4:0

AVL

Absolute Voltage Level.

Absolute voltage level to detect intrusion event.

40

Rev. 0.95

Si2400

Register 12. Off-Hook Intrusion

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

Type

DCL

R/W

ACL

R/W

Reset settings = 0100_0011

Bit

Name

Function

7:5

DCL

Differential Current Level.

Differential current level to detect intrusion event.

4:0

ACL

Absolute Current Level.

Absolute current level to detect intrusion event.

Rev. 0.95

41

Si2400

Register 13. Modem Functions 3

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name JID BTID OFHE OFHD ONHD CIDB CIDU PCM

Type R/W R/W

R/W

R/W R/W R/W R/W

Reset settings = 0001_0000

Bit

Name

Function

7

JID

Japan Caller ID.

0 = Disable

1 = Enable

6

5

BTID

BT Caller ID Wetting Pulse D.

0 = Enable

1 = Disable

OFHE

Enable Off Hook.

Enable off hook in current limit mode for overcurrent protection.

0 = Disable

1 = Enable

4

3

2

1

0

OFHD

ONHD

CIDB

CIDU

PCM

Off Hook Intrusion Detect Method.

0 = Absolute

1 = Differential

On Hook Intrusion Detect Method.

0 = Absolute

1 = Differential

British Telecom Caller ID Decode.

0 = Disable

1 = Enable

BellCore Caller ID Decode.

0 = Disable

1 = Enable

PCM Data Mode.

Baud rate must be ≥ 228613, and flow control must be used.

0 = Disable

1 = Enable

42

Rev. 0.95

Si2400

Register 14. Modem Functions 4

Bit

Name MRCD UDF

Type R/W R/W

D7

D6

D5

D4

AOC

R/W

D3

D2

D1

D0

TEO

R/W

OD

NLD IND

RD

R/W R/W R/W R/W

Reset settings = 0000_0000

Bit

7

Name

MRCD

UDF

Function

Disable Modem Result Codes.

6

User Defined Frequency.

Enables user defined frequency detectors in A0 and !0 modes.

5

4

3

TEO

AOC

OD

TIES Escape Operation.

Enables TIES escape operation.

AutoOverCurrent Protection.

Enables AutoOverCurrent protection.

Overcurrent Detected.

Sticky.

2

1

0

NLD

IND

RD

No Phone Line Detected.

Intrusion Detected.

Ring Detected.

Rev. 0.95

43

Si2400

Register 15. Modem Link Control

Bit

Name ATPRE VCTE FHGE EGHE

Type R/W R/W R/W R/W

Reset settings = 1000_0100

D7

D6

D5

D4

D3

D2

BDA

R/W

D1

D0

NBE

R/W

STB

R/W

Bit

7

Name

ATPRE

VCTE

FHGE

EHGE

STB

Function

Answer Tone Phase Reversal Enable.

V.25 Calling Tone Enable.

550 Hz Guardtone Enable.

1800 Hz Guardtone Enable.

Stop Bits.

6

5

4

3

0 = 1 stop bit

1 = 2 stop bits

2:1

BDA

NBE

Bit Data.

00 = 6 bit data

01 = 7 bit data

10 = 8 bit data

11 = 9 bit data

0

Ninth Bit Enable.

Enable ninth bit as Escape and ninth bit function (register C).

44

Rev. 0.95

Si2400

Register 33. Modem Override

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

Type

DON

R/W

DOF

R/W

NAT TSAC

R/W R/W

Reset settings = 1000_0000

Bit

7

Name

Reserved

DON

Function

Read returns one.

6

On-Hook Intrusion Detect.

0 = Enable (default)

1 = Disable

5

DOF

Off-Hook Intrusion Detect.

0 = Enable (default)

1 = Disable

4:2

1

Reserved

NAT

Read returns zero.

No Answer Tone.

Enable no answer tone fast handshake.

0

TSAC

Transmit Scrambler Active.

Force transmit scrambler active once connected.

Rev. 0.95

45

Si2400

Register E0. Chip Functions 1

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

Type

ICTS

ND

SD

Reset settings = 0010_0010

Bit

7:6

5

Name

Reserved

ICTS

Function

Read returns zero.

Invert CTS pin.

0 = Inverted (CTS)

1 = Normal (CTS)

4

3

Reserved

ND

Read returns zero.

0 = 8N1

1 = 9N1 (hardware UART only)

2:0

SD

Serial Dividers.

0 = 300 bps serial link

1 = 1200 bps serial link

2 = 2400 bps serial link

3 = 9600 bps serial link

4 = 19200 bps serial link

5 = 228613 bps serial link (0.8% error to 230400 bps)

6 = 245760 bps serial link

7 = 307200 bps serial link

46

Rev. 0.95

Si2400

Register E1. Chip Functions 2

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

Type

MCKR

CLKD

Reset settings = 0100_0111

Bit

Name

Function

7:6

MCKR

Microcontroller Clock Rate.

0 = Fastest 9.8304 MHz (default)

1 = 4.9152 MHz

2 = 2.4576 MHz

3 = Reserved

Note: MCKR must be set to 0 when the UART baud rate is set to 228613 or greater

(SD = 5, 6, or 7).

5

Reserved

CLKD

Read returns zero.

4:0

CLK_OUT Divider.

0 = Disable CLK_OUT pin

CLK_OUT = 78.6432/(CLKD + 1) MHz

Rev. 0.95

47

Si2400

Register E2. Chip Functions 3

Bit

D7

GPIO4

R/W

D6

D5

GPIO3

R/W

D4

D3

GPIO2

R/W

D2

D1

D0

Name

Type

GPIO1

R/W

Reset settings = 0000_0000

Bit

Name

Function

7:6

GPIO4

GPIO4.

0 = Digital input

1 = Digital output (relay drive)

2 = Analog input

3 = ALERT function (digital output)

5:4

3:2

1:0

GPIO3

GPIO2*

GPIO1*

GPIO3.

0 = Digital input

1 = Digital output (relay drive)

2 = Analog input

3 = ESCAPE function (digital input)

GPIO2.

0 = Digital input

1 = Digital output (relay drive)

2 = Analog input

3 = Reserved

GPIO1.

0 = Digital input

1 = Digital output (relay drive)

2 = Analog input

3 = Reserved

*Note: To be used as analog input or GPIO pins; GPE (SE4.3) and TRSP (SE4.0) must both equal zero.

48

Rev. 0.95

Si2400

Register E3. Chip Functions 4

Bit

D7

AING

R/W

D6

D5

D4

D3

D2

D1

D0

Name

Type

GPD4 GPD3 GPD2 GPD1

R/W

Reset settings = 0000_0000

Bit

Name

Function

7:6

AING

AIN Gain Bits.

00 = 0 dB

01 = 6 dB

10 = 2.5 dB

11 = 12 dB

5:4

3

Reserved

GPD4

Read returns zero.

GPIO4 Data.

GPIO3 Data.

GPIO2 Data.

GPIO1 Data.

2

GPD3

1

GPD2

0

GPD1

Rev. 0.95

49

Si2400

Register E4. Chip Functions 5

Bit

Name NBCK SBCK

Type

Reset settings = 0000_0000

D7

D6

D5

D4

D3

GPE

R/W

D2

D1

D0

DRT

R/W

APO TRSP

R

R/W

Bit

7

Name

NBCK

SBCK

DRT

Function

9600 Baud Clock (Read Only).

600 Baud Clock (Read Only).

Data Routing

6

5:4

0 = Data mode, DSP output transmitted to line, line received to DSP input

1 = Voice mode, selected AIN transmitted to line, line received to AOUT

2 = Loopback mode, RXD through microcontroller (DSP) to TXD. AIN looped to AOUT.

3 = Codec mode, data from DSPOUT to AOUT, selected AIN to DSPIN

3

GPE*

GPIO1 Enable.

Enable GPIO1 to be HDLC end-of-frame flag.

2

1

Reserved

APO

Read returns zero.

Analog Power On.

Power on analog ADC and DAC.

0

TRSP*

TXD2/RXD2 Serial Port.

Enable TXD2/RXD2 serial port so that TXD2 is GPIO1 and RXD2 is GPIO2.

*Note: GPE and TRSP are mutually exclusive. Only one can be set at any one time, and they override the settings in registers

GPIO2 and GPIO1. Once TXD2 and RXD2 are enabled through TRSP = 1, the primary serial port TXD and RXD no

longer function and pins TXD2 and RXD2 control the Si2400. This feature allows a second microcontroller to control

the Si2400.

50

Rev. 0.95

Si2400

Register E5. (SE8 = 0x02) Read Only Definition

Bit

Name DDAV TDET

Type

Reset settings = 0000_0000

D7

D6

D5

D4

D3

D2

TONE

R

D1

D0

R

Bit

7

Name

DDAV

TDET

Function

DSP Data Available.

Tone Detected.

6

Indicates a TONE (any of type 0–25 below) has been detected.

0 = Not detected

1 = Detected

5

Reserved

TONE

Read returns zero.

4:0

Tone Type Detected.

When TDET goes high, TONE indicates which tone has been detected from the following:

TONE

0–15

16

17

18

19

20

21

22

Tone Type

Priority

DTMF 0–15 (DTMFE = 1) See Table 19 on page 31

Answer tone detected 2100 Hz (ANSE = 1)

Bell 103 answer tone detected 2225 Hz (ANSE = 1)

V.23 forward channel mark 1300 Hz (V23E = 1)

V.23 backward channel mark 390 Hz (V23E = 1)

User defined frequency 1 (USEN1 = 1)

User defined frequency 2 (USEN1 = 1)

Call progress filter A detected

1

2

3

4

6

5

6

23

24

25

User defined frequency 3 (USEN2 = 1)

User defined frequency 4 (USEN2 = 1)

Call progress filter B detected

Rev. 0.95

51

Si2400

Register E5. (SE8 = 0x02) Write Only Definition

Bit

D7

D6

D5

D4

D3

D2

D1

TONC

W

D0

Name

Type

DTM

W

Reset settings = 0000_0000

Bit

Name

Function

7

Reserved

DTM

Read returns zero.

6:3

DTMF tone (0–15) to transmit when selected by TONC (TONC = 1). See Table 19 on

page 31

2:0

TONC

Tone

Tone Type

0

1

2

3

4

5

6

Mute

DTMF

2225 Hz Bell mode answer tone with phase reversal

2100 Hz CCITT mode answer tone with phase reversal

2225 Hz Bell mode answer tone without phase reversal

2100 Hz CCITT mode answer tone without phase reversal

User-defined programmable frequency tone (UFRQ)

(see Table 20 on page 32, default = 1700 Hz)

1300 Hz V.25 calling tone

7

Register E6. (SE8 = 0x02) Write Only Definition

Bit

D7

CPSQ

W

D6

CPCA

W

D5

D4

USEN2

W

D3

USEN1

W

D2

V23E

W

D1

ANSE

W

D0

DTMFE

W

Name

Type

Reset settings = 0000_0000

Bit

Name

Function

7

CPSQ

1 = Enables a squaring function on the output of filter B before the input is input to A

(cascade mode only).

6

CPCD

0 = Call progress filter B output is input into call progress filter A. Output from filter A is

used in the detector.

1 = Cascade disabled. Two independent fourth order filters available (A and B). The

largest output of the two is used in the detector.

5

4

3

2

1

0

Reserved

USEN2

USEN1

V23E

Enables the reporting of user defined frequency tones 3 and 4 through TONE.

Enables the reporting of user defined frequency tones 1 and 2.

Enables the reporting of V.23 tones, 390 Hz and 1300 Hz.

Enables the reporting of answer tones.

ANSE

DTMFE

Enables the reporting of DTMF tones.

52

Rev. 0.95

Si2400

Register E7. DSPR3 Write Only

Bit

D7

D6

D5

D4

D3

D2

MLO

W

D1

REIN

W

D0

REEN

W

Name

Type

Reset settings = 0000_0000

Bit

7:3

2

Name

Reserved

MLO

Function

Read returns zero.

Modem Loopback.

1

REIN

Receiver Equalizer Inhibit.

Receiver Equalizer Enable.

0

REEN

Register EB. Timer and Power Down

Bit

D7

D6

D5

CWTI DWRC PDDE

R/W R/W R/W

D4

D3

D2

D1

D0

Name

Type

Reset settings = 0000_0000

Bit

7:6

5

Name

Reserved

CWTI

Function

Read returns zero.

Clear Watchdog Timer.

4

DWRC

PDDE

Disable Watchdog Reset Circuit.

Power Down DSP Engine.

3

0 = Power on

1 = Power down

2:0

Reserved

Read returns zero.

Rev. 0.95

53

Si2400

Register F0. DAA Low Level Functions 0

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

Type

LM

OFHK

Reset settings = 0000_0000

Bit

7:2

1

Name

Reserved

LM

Function

Read returns zero.

Hook Control/Status.^1,2,3

OFHK LM

LM0

0

1

0

1

0

1

0

1

Line Status Mode

On hook

0

OFHK

0

1

0

1

0

1

On hook with LVCS as voltage monitor

On hook line monitor mode (Si3014 compatible)

On hook line monitor mode (Si3015 compatible)

Off hook with LVCS as loop current monitor

Reserved

Notes:

1. See Register F7 on page 60 for LM0.

2. Under normal operation, the Si2400 internal microcontroller will automatically set these bits appropriately.

3. Force on hook supports caller ID type 2.

54

Rev. 0.95

Si2400

Register F1. DAA Low Level Functions 1

Bit

D7

D6

D5

D4

D3

RXE

R/W

D2

D1

AL

D0

DL

Name

Type

BTE

R/W

PDN

R/W

PDL

R/W

CPE

R/W

HBE

R/W

Reset settings = 0001_1100

Bit

Name

Function

7

BTE

Billing Tone Enable.

When the Si3015 detects a billing tone, BTD is set.

0 = Disable

1 = Enable

6

5

4

3

PDN

PDL

CPE

RXE

Power Down.

0 = Normal operation.

1 = Powers down the Si2400.

Power Down Line-Side Chip.

0 = Normal operation. Program the clock generator before clearing this bit.

1 = Places the Si3015 in lower power mode.

Charge Pump Enable.

0 = Charge pump off.

1 = Charge pump on.

Receive Path Enable.

0 = Disable

1 = Enable

2

1

HBE

AL

Hybrid Transmit Path Connect.

1 = Connects transmit path in hybrid

Analog Loopback.

1 = Enables external analog loopback mode.

0 = Analog loopback mode disabled.

0

DL

Isolation Digital Loopback.

1 = Enables digital loopback mode across isolation barrier. The line side must be

enabled prior to setting this mode.

0 = Digital loopback across isolation barrier disabled.

Rev. 0.95

55

Si2400

Register F2. DAA Low Level Functions 2

Bit

D7

D6

D5

D4

D3

FDT

R

D2

D1

D0

Name

Type

LCS

R

RDT

R/W

RDTN RDTP

R

Reset settings = 0000_0000

Bit

Name

Function

7:4

LCS

Loop Current Sense.

Four-bit value returning the loop current in 6-mA increments.

0 = Loop current < 0.4 mA.

1111 = Loop current > 155 mA. See “Loop Current Monitor” section.

3

2

FDT

RDT

Frame Detect.

1 = Indicates ISOcap frame lock has been established.

0 = Indicates ISOcap frame lock has not been established.

Ring Detect.

1 = Indicates a ring is occurring.

0 = Reset either 4.5–9 seconds after last positive ring is detected or when the system

executes an off-hook.

1

0

RDTN

RDTP

Ring Detect Signal Negative.

When set, a negative ring signal is occurring.

Ring Detect Signal Positive.

When set, a positive ring signal is occurring.

56

Rev. 0.95

Si2400

Register F4. DAA Low Level Functions 4

Bit

Name SQLH

Type R/W

Reset settings = 0000_1111

D7

D6

D5

ARG

R/W

D4

D3

D2

D1

D0

ARL

R/W

ATL

R/W

Bit

Name

Function

7

SQLH

Ring Squelch.

If the host implements a manual ring detect (bypassing the Si2400 micro), this bit must

be set, then cleared following a polarity reversal detection. Used to quickly recover offset

on RNG1/2 pins after polarity reversal.

0 = Normal

1 = Squelch

6:4

ARG

Analog Receive Gain.

Off-Hook

On-Hook

000 = 0 dB gain

001 = 3 dB gain

010 = 6 dB gain

011 = 9 dB gain

1xx = 12 dB gain

000 = 7 dB

001 = 6 dB

010 = 4.8 dB

011 = 3.5 dB

1xx = 2.0 dB

3:2

1:0

ARL

ATL

AOUT Receive—Path Level

DAA receive path signal AOUT gain.

0 = 0 dB

1 = –6 dB

2 = –12 dB*

3 = Mute

AOUT Transmit—Path Level

DAA transmit path signal AOUT gain.

0 = –18 dB

1 = –24 dB

2 = –30 dB*

3 = Mute

*Note: If ARL = 2 and ATL = 2, AOUT is muted.

Rev. 0.95

57

Si2400

Register F5. DAA Low Level Functions 5

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name FULLS DCTO

Type

OHS

ACT

DCT

RZ

RT

Reset settings = 0000_1000

Bit

Name

Function

7

FULLS

Full Scale.

0 = Default

1 = Modem codec fullscale > 3.2 dBm

6

DCTO

DC Termination Off.

Presents an 800 Ω impedance to the line.

0 = Enable DC termination

1 = Disable

5

4

OHS

ACT

DCT

On-Hook Speed.

0 = The Si2400 will execute a fast on-hook.

1 = The Si2400 will execute a slow, controlled on-hook.

AC Termination.

0 = Real impedance

1 = Complex impedance

3:2

DC Termination Voltage.

00 = Norway mode (maximum transmit level = –5 dBm)

01 = Japan mode (maximum transmit level = –3 dBm)

10 = USA mode (maximum transmit level = –1 dBm) (default)

11 = TBR21/France current limit mode (maximum transmit level = –1 dBm)

1

0

RZ

RT

Ringer Impedance Decrease.

Decreases ringer impedance.

0 = Disable (Rest of World)

1 = Enable (Korea, Poland, South Africa)

Ringer Threshold.

0 = 11–21 Vrms threshold

1 = 21–31 Vrms threshold

58

Rev. 0.95

Si2400

Register F6. DAA Low Level Functions 6

Bit

D7

D6

MCAL

R/W

D5

ACAL

R/W

D4

D3

FJM VDD3_TWK VOL

R/W R/W R/W

D2

D1

D0

Name

Type

FNM

R/W

Reset settings = 0000_0000

Bit

7

Name

Reserved

MCAL

Function

Read returns zero.

6

Manual Calibration Request.

0 = Normal

1 = Immediately calibrate

Note: Must disable autocalibration (ACAL) before using manual calibration.

5

ACAL

Automatic Calibration Disable.

0 = Enable (default)

1 = Disable

4

3

Reserved

FJM

Read returns zero.

Force Japan DC Termination.

0 = Normal mode

1 = Force Japan DC termination

2

VDD3_TWK

VDD3 Voltage Tweak.

0 = Nominal

1 = Forces VDD3 = 2.1 V when in USA or CTR21 DCT. This bit does not modify the DCT

bias voltage.

1

0

VOL

FNM

Line Voltage Tweak.

0 = Nominal

1 = Decreases DC termination voltage

Force Norway Mode.

0 = Default

1 = Norway DCT mode, same as DCT = 00 but without TX attenuation.

Rev. 0.95

59

Si2400

Register F7. DAA Low Level Functions 7

Bit

D7

D6

D5

D4

D3

LIM

R/W

D2

OVL_PROT

R/W

D1

D0

Name

Type

LM0

R/W

Reset settings = 0001_0000

Bit

7:5

4

Name

Reserved

LM0

Function

Read returns zero.

See LM0 in Register F0 page 54.

3

LIM

Current-Limiting Tweak Value.

0 = Disable

1 = Enable (CTR21 mode)

2

OVL_PROT

Reserved

Overload Protect.

0 = Disable

1 = Enable

1:0

Read returns zero.

Register F8. DAA Low Level Functions 8

Bit

D7

D6

D5

D4

D3

D2

D1

D0

Name

Type

LRV

R

Bit

Name

Function

7:4

LRV

Line-Side Chip Revision Number.

0001 = Si3014 Rev A

0010 = Si3014 Rev B

0011 = Si3014 Rev C

1001 = Si3015 Rev A

1010 = Si3015 Rev B

1011 = Si3015 Rev C

3:0

Reserved

Read returns indeterministic.

60

Rev. 0.95

Si2400

Register F9. DAA Low Level Functions 9 Read Only

Bit

D7

D6

OVL

R

D5

D4

VDD3_DROP

R

D3

BTD

R

D2

D1

ROV

R

D0

Name

Type

Reset settings = 0000_0000

Bit

7

Name

Reserved

OVL

Function

Read returns zero.

6

Receive Overload.

Same as ROV, except non-sticky.

Read returns zero.

5

4

Reserved

VDD3_DROP VDD3 Drop.

0 = Normal

1 = VDD3 drop detected

3

BTD

Billing Tone Detect (sticky).

0 = No billing tone detected

1 = Billing tone detected

2

1

Reserved

ROV

Read returns zero.

Receive Overload.

0 = No excessive level detected

1 = Excessive input level detected (sticky)

0

Reserved

Read returns zero.

Rev. 0.95

61

Si2400

APPENDIX A—DAA OPERATION

Introduction

This section describes the detailed functionality of the

DC Termination

integrated DAA included in the Si2400 chipset. This

specific functionality is generally transparent to the user

when using the on-chip controller in the Si2400 modem.

When bypassing the on-chip controller, the low-level

DAA functions of the Si3015 described in this section

can be controlled through S registers.

The Si2400 has three programmable DC termination

modes, selected with the DCT (SF5.3:2).

Japan Mode (DCT = 1), shown in Figure 13, is a lower

voltage mode and supports a transmit full-scale level of

–2.71 dBm. Higher transmit levels for DTMF dialing are

also supported. The low voltage requirement is dictated

by countries such as Japan and Singapore.

DAA Isolation Barrier

The Si2400 chipset consists of the Si3015 line-side USA Mode (DCT = 2), shown in Figure 14, is the default

device and the Si2400 modem device. The Si2400 DC termination mode and supports a transmit full scale

achieves an isolation barrier through a low-cost, high- level of –1 dBm at TIP and RING. This mode meets

voltage capacitor in conjunction with Silicon FCC requirements in addition to the requirements of

Laboratories’ proprietary ISOcap signal processing many other countries.

techniques. These techniques eliminate any signal

CTR21 Mode (DCT = 3), shown in Figure 15, provides

degradation due to capacitor mismatches, common

current limiting, while maintaining a transmit full scale

mode interference, or noise coupling. As shown in

level of –1 dBm at TIP and RING. In this mode, the DC

Figure 3 on page 9, the C1, C2, C24, and C25

termination will current limit before reaching 60 mA.

capacitors isolate the Si2400 (DSP side) from the

Si3015 (line side). All transmit, receive, and control data

are communicated through this barrier.

Japan DCT Mode

10.5

10

9.5

9

Emissions/Immunity

The Si2400 chipset and recommended DAA schematic

is fully compliant with and passes all international

electromagnetic emissions and conducted immunity

tests (includes FCC part 15,68; EN55022; EN50082-1).

Careful attention to the Si2400 bill of materials

(Table 9), schematic (Figure 3), and layout guidelines

(included in the Si2400URT-EVB data sheet) will ensure

compliance with these international standards. In

designs with difficult layout constraints, the addition of

the C31 and C32 capacitors to the C24 and C25

recommended capacitors may improve modem

performance on emissions and conducted immunity. For

such designs, a population option for C31 and C32 may

allow additional flexibility for optimization after the

printed circuit board has been completed.

8.5

8

7.5

7

6.5

6

5.5

.01

.05 .06

.09 .1 .11

.07 .08

.02 .03 .04

Loop Current (A)

Figure 13. Japan Mode I/V Characteristics

Also, under some layout conditions, C31 and C32 may

improve the immunity to telephone line transients. This

is most important for applications that use the voice

codec feature of the Si2400. Because line transients are

infrequent and high voltage in nature, they tend to be

more problematic in voice applications than in data

applications. An occasional pop in a voice application is

quite noticeable, whereas occasional bit errors are

easily corrected in a modem connection with an error-

correction protocol.

62

Rev. 0.95

Si2400

Manual Ring Detection

USA DCT Mode

12

11

The procedure for manual ring detection is as follows:

The ring signal is capacitively coupled from TIP and

RING to the RNG1 and RNG2 pins. The Si2400

supports either full- or half-wave ring detection. The ring

detection threshold is programmable with RT (SF5.0).

With full-wave ring detection, the designer can detect a

polarity reversal as well as a ring signal.

10

9

8

A manual ring requires using the register bits RDTP,

RDTN, and RDT in register F2.

7

6

The host must detect the frequency of the ring signal in

order to distinguish a ring from pulse dialing by

telephone equipment connected in parallel.

.01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11

Loop Current (A)

The ring detector mode is controlled by RFWE (SF6.4).

When the RFWE is 0 (default mode), the ring detector

operates in half-wave rectifier mode. In this mode, only

positive ringing signals are detected. A positive ringing

signal is defined as a positive voltage greater than the

ring threshold across RNG1-RNG2. RNG1 and RNG2

are pins 5 and 6 of the Si3015. Conversely, a negative

ringing signal is defined as a negative voltage less than

the negative ring threshold across RNG1-RNG2.

Figure 14. USA Mode Characteristics

CTR21 DCT Mode

45

40

35

30

25

When the RFWE is 1, the ring detector operates in full-

wave rectifier mode. In this mode, both positive and

negative ring signals are detected.

20

15

The RDTP and RDTN behavior is based on the RNG1-

RNG2 voltage. Whenever the signal RNG1-RNG2 is

above the positive ring threshold, the RDTP bit is set.

Whenever the signal RNG1-RNG2 is below the

negative ring threshold, the RDTN bit is set. When the

signal RNG1-RNG2 is between these thresholds,

neither bit is set.

10

5

.015

.055 .06

.02 .025 .03 .035 .04 .045 .05

Loop Current (A)

Figure 15. CTR21 Mode Characteristics

AC Termination

The RD behavior is also based on the RNG1-RNG2

voltage. When RFWE is a 0 or a 1, a positive ringing

signal will set the RD bit for a period of time. The RD bit

will not be set for a negative ringing signal.

The Si2400 has two AC termination impedances,

selected with the ACT bit (SF5.4).

ACT=0 is a real, nominal 600 Ω termination which

satisfies the impedance requirements of FCC part 68,

JATE, and other countries. This real impedance is set

by circuitry internal to the Si2400 chipset as well as the

resistor R2 connected to the Si3015 REXT pin.

The RD bit acts as a one-shot. Whenever a new ring

signal is detected, the one-shot is reset. If no new ring

signals are detected prior to the one-shot counter

counting down to zero, then the RD bit will return to

zero. The length of this count (in seconds) is 65536

divided by the sample rate (9600 Hz). The RD will also

be reset to zero by an off-hook event.

ACT=1 is a complex impedance which satisfies the

impedance requirements of Australia, New Zealand,

South Africa, CTR21 and some European NET4

countries such as the UK and Germany. This complex

impedance is set by circuitry internal to the Si2400

chipset as well as the network connected to the Si3015

REXT2 pin.

Ringer Impedance

The ring detector in a typical DAA is AC coupled to the

line with a large, 1 uF, 250 V decoupling capacitor. The

ring detector on the Si2400 is also capacitively coupled

to the line, but it is designed to use smaller, less

expensive 1.8 nF capacitors. Inherently, this network

produces a very high ringer impedance to the line on

Rev. 0.95

63

Si2400

the order of 800 to 900 kΩ. This value is acceptable for Increased distortion may be observed, which is

most countries, including FCC and CTR21.

acceptable during DTMF dialing. After DTMF dialing is

complete, the attenuation should be enabled by setting

the Japan DC termination mode DCT. The FJM bit has

no effect in Japan DC termination mode.

Several countries, including the Czech Republic,

Poland, South Africa and South Korea, require a

maximum ringer impedance. For Poland, South Africa

and South Korea, the maximum ringer impedance

specification can be met with an internally synthesized

impedance by setting the RZ bit (SF5.1).

Pulse Dialing

Pulse dialing is accomplished by going off and on hook

to generate make and break pulses. The nominal rate is

10 pulses per second. Some countries have very tight

specifications for pulse fidelity, including make and

break times, make resistance, and rise and fall times. In

a traditional solid-state DC holding circuit, there are a

number of issues in meeting these requirements.

For official Czech Republic designs, an additional

network comprising C15, R14, Z2, and Z3 is required.

See Figure 16. This network is not required for any

other countries. However, if this network is installed, the

RZ bit should not be set for any countries.

The Si2400 DC holding circuit has active control of the

on-hook and off-hook transients to maintain pulse

dialing fidelity.

TIP

C15

Spark quenching requirements in countries such as

Italy, Netherlands, South Africa and Australia deal with

the on-hook transition during pulse dialing. These tests

provide an inductive DC feed, resulting in a large

voltage spike. This spike is caused by the line

inductance and the sudden decrease in current through

the loop when going on-hook. The traditional way of

dealing with this problem is to put a parallel RC shunt

across the hookswitch relay. The capacitor is large

(~1 uF, 250 V) and expensive. In the Si2400, OHS

(SF5.6:5) can be used to slowly ramp down the loop

current to pass these tests without requiring additional

components.

R14

From

Line

To

DAA

Z2

Z3

RING

Figure 16. Ring Z

Billing Tone Detection

Table 23. Ringer Impedance Component Values

“Billing tones” or “Metering Pulses” generated by the

central office can cause modem connection difficulties.

The billing tone is typically either a 12 KHz or 16 KHz

signal and is sometimes used in Germany, Switzerland,

and South Africa. Depending on line conditions, the

billing tone can be large enough to cause major errors

related to the modem data. The Si2400 chipset has a

feature which allows the device to remain off-hook

during billing tones and provide feedback to the host as

to whether a billing tone has occurred and when it ends.

See Figure 17.

Component

Reference

Value

Suppliers

C15

1 µF, 250 V,

X7R, ±20%

Venkel, Johanson,

Panasonic

R14

7.5 kΩ, 1/4 W,

±5%

Z2,Z3

Zener Diode,

5.6 V

Vishay, Motorola,

Rohm

Billing tone detection is enabled by setting the BTE bit

(SF1.7). When a billing tone of sufficient amplitude

occurs, the DC termination is released and the line is

presented with an 800 Ω DC impedance. This is

sufficient to maintain an off-hook condition.

Simultaneously, the following bits will be set:

DTMF Dialing

In Japan DC termination mode (DCT[1:0]=01b), the

Si2400 device attenuates the transmit output by 1.7 dB

to meet headroom requirements. This attenuation must

be removed to meet the –6 dB/–8 dB DTMF dialing

levels specified in Singapore, which requires the Japan

DC termination mode. When in the US, DC termination

mode, the FJM bit (SF6.3) will enable the Japan DC

termination mode without the 1.7 dB attenuation.

! BTD—Billing Tone Detect (SF9.3)

! ROV—Receive Overload (SF9.6)

! OVL—Overload Detected (SF9.1)

64

Rev. 0.95

Si2400

In applications that might be susceptible to billing tones, In FCC and Japan DC termination modes, an offhook

the OVL bit should be monitored (polled). When it LCVS value of 63 means the loop current is greater

returns to zero indicating that the billing tone has than 120 mA indicating the DAA is drawing excessive

passed, the BTD bit should be written to zero to return loop current.

the DC termination to its original state. BTD and ROV

In CTR21 mode, 120 mA of loop current is not possible

are sticky bits which must be written to zero to reset

due to the current limit circuit. The LCVS bits can be

them. It will take approximately one second to return to

used to detect excessive line voltage in this mode. They

normal operating conditions. Although the DAA will

will report a value of 63 in an overvoltage condition.

remain off-hook during a billing tone event, the received

Gain Control

data from the line will be corrupted when a billing tone

occurs.

The Si2400 supports multiple receive gain settings. The

If the user wishes to receive data through a billing tone, receive path can support gains of 0, 3, 6, 9, and 12 dB,

an external LC filter must be added. A modem as selected by ARG (SF4.6:4).

manufacturer can provide this filter to users in the form

In-Circuit Testing

of a dongle that connects on the phone line before the

DAA. This keeps the manufacturer from having to The Si2400’s advanced design provides the system

include a costly LC filter internal to the modem when it manufacturer with increased ability to determine system

may only be necessary to support only a few countries. functionality during production line tests, as well as

support for end-user diagnostics. In addition to the local

Alternatively, when a billing tone is detected, the host

echo, three loopback modes exist allowing increased

software may notify the user that a billing tone has

coverage of system components. For two of the test

occurred. This notification can be used to prompt the

modes, a line-side power source is needed. While a

user to contact the telephone company to have the

standard phone line can be used, the test circuit in

billing tones disabled.

Figure 1 on page 5 is adequate. In addition, an off-hook

sequence must be performed to connect the power

source to the line-side chip.

To test communication with the Si2400 across the

UART, the local echo may by used immediately after

powerup. All other test modes except the analog

loopback mode require setting the UART to a high baud

rate and enabling PCM mode (set PCM (S13.0)=1), as

described in "PCM Data Mode‚" on page 19.

The DSP loopback test mode tests the functionality and

data transfer from the host across the UART RXD pin,

to the Si2400 microcontroller, to the Si2400 DSP filters,

back through the microcontroller, and back across the

UART TXD pin to the host. To enable this mode, set the

UART to PCM mode and set DRT (SE4.5:4) = 2. This

path will introduce approximately 0.9 dB of attenuation

from the RXD received to the TXD. In addition, as

shown in Figure 10C, the ADC from AIN connects

directly through the DAC to AOUT for testing of the

voice codec.

The remaining test modes requires the Si2400 to be off-

hook in order to operate. To force the Si2400 off-hook,

set OFHK (SF0.0) = 1. Before running the test mode,

Figure 17. Billing Tone Filter

the user must wait 4806/Fs (500 ms) to allow the

Si2400 calibration to occur.

Overload Detection

The Si2400 can detect if an overload condition is The ISOcap digital loopback mode allows the host to

present which may damage the DAA circuit. The DAA provide a digital test pattern on RXD and receive that

may be damaged if excessive line voltage or loop test pattern on TXD. To enable this mode, set DL

current is sustained.

(SF1.0) = 1. In this mode, the isolation barrier is actually

Rev. 0.95

65

Si2400

being tested. The digital stream is delivered across the

isolation capacitor, C1 of Figure 3 on page 9, to the line

side device and returned across the same barrier. Note

that in this mode, the 0.9 dB attenuation also exists.

The final testing mode, internal analog loopback, allows

the system to test the basic operation of the transmit

and receive paths on the line-side chip and the external

components in Figure 3 on page 9. In this test mode, the

host provides a digital test waveform on RXD. This data

is passed across the isolation barrier, transmitted to and

received from the line, passed back across the isolation

barrier, and presented to the host on TXD. To enable

this mode, clear HBE (SF1.2).

When the HBE bit is cleared, this will cause a DC offset

which affects the signal swing of the transmit signal. In

this test mode, it is recommended that the transmit

signal be 12 dB lower than normal transmit levels. This

lower level will eliminate clipping caused by the DC

offset which results from disabling the hybrid. It is

assumed in this test that the line AC impedance is

nominally 600 Ω.

Note: All test modes are mutually exclusive. If more than one

test mode is enabled concurrently, the results are

unpredictable.

66

Rev. 0.95

Si2400

APPENDIX B—TYPICAL MODEM APPLICATIONS EXAMPLES

Introduction

c – connect

Appendix B outlines the steps required to configure the

Si2400 for modem operation under typical examples.

The ISOmodem has been designed to be both easy to

use and flexible. The Si2400 has many features and

modes, which add to the complexity of the device, but

are not required for a typical modem configuration. The

goal of this appendix is to help the user to quickly make

a modem connection and begin evaluation of the

Si2400 under various operational examples.

6. Next byte after “c” is modem data!

Example 4: Bell 103 in Australia with

Parallel Phone Detect

1. Power on reset

2. Set Host UART to 2400 bps

3. ATS07=01 (set for FSK 300 bps)

4. ATSF5=78 (set DAA for Australia)

5. ATSE2=C0 (enable ALERT pin)

Example 1: V.22bis in FCC countries

1. Power on reset

6. ATDT18005551212<CR>

Si2400 may echo the following:

R – Ringback

2. Set Host UART to 2400 bps

3. ATS07=06 set for QAM 2400 bps

b – busy tone

N – No carrier

c – connect

4. ATDT18005551212<CR>

Si2400 may echo the following:

R – Ringback

7. Next byte after “c” is modem data!

b – busy tone

N – No carrier

c – connect

d – connect at 1200bps

Example 5: Bell 212A in South Korea with

Japanese caller ID

1. Power on reset

5. Next byte after “c” or “d” is modem data!

2. Set Host UART to 2400 bps

3. ATS07=00 (set for DPSK 1200 bps)

4. ATSF5=06(set DAA for South Korea)

Example 2: V.22 in CTR21 countries

1. Power on reset

2. Set Host UART to 2400 bps

3. ATS07=02 (set for DPSK 1200 bps)

4. ATSF5=1C (set DAA for CTR21)

5. ATSF7=1C (set DAA for CTR21)

5. ATS13=80 (set caller ID to Japanese format)

When caller ID data is detected, Si2400 will echo “f”

indicating the line reversal, “m” indicating the mark, and

then caller ID data will follow.

6. ATDT18005551212<CR>

-Si2400 may echo:

R – Ringback

6. ATDT18005551212<CR>

Si2400 may echo the following:

R – Ringback

b – busy tone

N – No carrier

c – connect

b – busy tone

N – No carrier

c – connect

7. Next byte after “c” is modem data!

Example 6: Security Application Example—

SIA P3 Pulse Format in CTR21 Countries

Example 3: Bell 103 in Australia

1. Power on reset

1. Power On Reset

2. Set Host UART to 2400 bps

3. ATS07=01 (set for FSK 300 bps)

4. ATSF5=78 (set DAA for Australia)

2. ATSF5=1C<CR> (Si3015 DAA set ringer threshold, AC

termination, etc. for CTR21)

3. ATSF7=1C<CR>

5. ATDT18005551212<CR>

Si2400 may echo the following:

R – Ringback

4. ATDT149109933!322292229<CR>

b – busy tone

N – No carrier|

Rev. 0.95

67

Si2400

APPENDIX C—UL1950 3RD EDITION

Designs using the Si2400 pass all overcurrent and over- on the protected side of the sidactor (RV1). For this

voltage tests for UL1950 3rd Edition compliance with a

couple of considerations.

design, the ferrite beads can be rated at 200 mA.

In a cost-optimized design, it is important to remember

that compliance to UL1950 does not always require

overvoltage tests. It is best to plan ahead and know

which overvoltage tests will apply to your system.

System-level elements in the construction, such as fire

enclosure and spacing requirements, need to be

considered during the design stages. Consult with your

Professional Testing Agency during the design of the

product to determine which tests apply to your system.

Figure 18 shows the designs that can pass the UL1950

overvoltage tests, as well as electromagnetic

emissions. The top schematic of Figure 18 shows the

configuration in which the ferrite beads (FB1, FB2) are

on the unprotected side of the sidactor (RV1). For this

configuration, the current rating of the ferrite beads

must be 6 A.

The bottom schematic of Figure 18 shows the

configuration in which the ferrite beads (FB1, FB2) are

C24

75 Ω @ 100 MHz, 6 A

1.25 A

Fuse/PTC

FB1

TIP

75 Ω @ 100 MHz, 6 A

RV1

FB2

RING

Note: In this configuration, C24 and C25 are

used for emissions testing.

C25

1000 Ω @ 100 MHz, 200 mA

C24

FB1

1.25 A

Fuse/PTC

TIP

RV1

1000 Ω @ 100 MHz, 200 mA

FB2

RING

C25

Figure 18. Circuits that Pass all UL1950 Overvoltage Tests

68

Rev. 0.95

Si2400

GPIO3

GPIO4

General Purpose Input/Output 3—This

pin can be either a GPIO pin (analog in,

digital in, digital out) or the ESC pin.

Default is digital in. When programmed as

ESC, a positive edge on this pin will cause

the modem to go from online (connected)

mode to the offline (command) mode.

Pin Descriptions—Si2400

1

2

3

4

5

6

7

8

XTALI

XTALO

CLKOUT

V_D

GPIO1

GPIO2

GPIO3

ISOB

16

15

14

13

12

11

10

9

General Purpose Input/Output 4—This

pin can be either a GPIO pin (analog in,

digital in, digital out) or the ALERT pin.

Default is digital in. When programmed as

ALERT, this pin provides two functions.

While the modem is connected, it will

normally be low, but will go high if the

carrier is lost or if an intrusion event has

been detected. The ALERT pin is sticky,

and will stay high until the host clears it by

writing to the correct S register.

TXD

GND

RXD

C1A

CTS

GPIO4

AOUT

RESET

Serial Interface

XTALI/XTALO Crystal Oscillator Pins—These pins

provide support for parallel resonant,

AT cut crystals. XTALI also acts as an

input in the event that an external clock

source is used in place of a crystal.

XTALO serves as the output of the

crystal amplifier. A 4.9152 MHz crystal

is required or a 4.9152 MHz clock on

XTALI.

Control Interface

CTS

Clear to Send—Clear to send output used

by the Si2400 to signal that the device is

ready to receive more digital data on the

receive data pin.

CLKOUT

Clock Output—This signal is typically

used to clock an output system

microcontroller. The frequency is

RESET

Reset Input—An active low input that is

used to reset all control registers to a

defined, initialized state. Also used to bring

the Si2400 out of sleep mode.

78.6432 MHz/(N+1), where

N

is

programmable from 0 to 31. N defaults

to 7 on power up. Setting N = 0 stops

the clock.

Miscellaneous Signals

RXD

Receive Data—Serial communication AOUT

data input.

Analog Speaker Output—Provides an

analog output signal for monitoring call

progress tones or to output voice data to a

speaker.

TXD

Transmit Data—Serial communication

data output.

C1A

Isolation Capacitor 1A—Connects to one

side of the isolation capacitor C1.

GPIO1

General Purpose Input Output 1— This

pin can be either a GPIO pin (analog in,

digital in, digital out) or the TXD2 pin. ISOB

Default is digital. The user can program

this pin to function as TXD2 if the

Isolink Bias Voltage—This pin should be

connected to a .1 µf cap to ground.

Power Signals

secondary serial interface is enabled. This

pin can also be programmed to function as V_D

the EOFR (end of frame receive) signal for

HDLC framing.

Digital Supply Voltage—Provides the

digital supply voltage to the Si2400.

Nominally either 5 V or 3.3 V.

GPIO2

General Purpose Input Output 2—This

pin can be either a GPIO pin (analog in,

digital in, digital out) or the RXD2 pin.

Default is digital in. The user can program

this pin to function as RXD2 if the

secondary serial interface is enabled.

GND

Ground—Connects to the system digital

ground.

Rev. 0.95

69

Si2400

Isolation

Pin Descriptions—Si3015

C1B

Isolation Capacitor 1B—Connects to one

side of isolation capacitor C1.

QE2

DCT

IGND

C1B

FILT2

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

IGND

Isolated Ground—Connects to ground on

the line-side interface. Also connects to

capacitor C2.

FILT

RX

REXT

REXT2

REF

RNG1

RNG2

QB

Miscellaneous

VREG

Voltage Regulator—Connects to an

external capacitor to provide bypassing for

an internal power supply.

VREG2

VREG

QE

VREG2

Voltage Regulator 2—Connects to an

external capacitor to provide bypassing for

an internal power supply.

Line Interface

FILT

FILT2

RX

Filter—Sets the time constant for the DC

termination circuit.

Filter 2—Sets the time constant for the DC

termination circuit.

Receive Input—Serves as the receive

side input from the telephone network.

DCT

DC

Termination—Provides

DC

termination to the telephone network and

input for line voltage monitors.

REXT

REXT2

RNG1

External Resistor—Sets the real AC

termination impedance.

External Resistor 2—Sets the complex

AC termination impedance.

Ring 1—Connects through a capacitor to

the TIP lead of the telephone line.

Provides the ring and caller ID signals to

the Si2400.

RNG2

Ring 2—Connects through a capacitor to

the RING lead of the telephone line.

Provides the ring and caller ID signals to

the Si2400.

QB

Transistor Base—Connects to the base

of transistor Q3.

QE

Transistor Emitter—Connects to the

emitter of transistor Q3.

QE2

REF

Transistor Emitter 2—Connects to the

emitter of Q4.

Reference—Connects to an external

resistor to provide

reference current.

a

high accuracy

70

Rev. 0.95

Si2400

Ordering Guide

Table 24. Ordering Guide

Chipset

Si2400

Region

Power Supply

Digital

Line

Temperature

0°C to 70°C

Global

3.3/5 V Digital

Si2400-KS

Si2400-BS

Si3015-KS

Si3015-BS

–40°C to 85°C

Rev. 0.95

71

Si2400

Package Outline

Figure 19 illustrates the package details for the Si2400 and Si3015. Table 25 lists the values for the dimensions

shown in the illustration.

Figure 19. 16-pin Small Outline Plastic Package (SOIC)

Table 25. Package Diagram Dimensions

Controlling Dimension: mm

Symbo

l

Inches

Millimeters

Min

Max

Min

Max

A

A1

A2

b

0.053

0.004

0.051

0.013

0.007

0.386

0.150

0.050 BSC

0.228

0.016

0.042 BSC

—

0.069

0.010

0.059

0.020

0.010

0.394

0.157

—

1.35

0.10

1.75

0.25

1.50

0.51

0.25

10.01

4.00

—

1.30

0.330

0.19

c

D

E

9.80

3.80

e

1.27 BSC

5.80

H

L

0.244

0.050

—

6.20

1.27

—

0.40

L1

γ

1.07 BSC

—

0.004

8°

0.10

8°

θ

0°

72

Rev. 0.95

Si2400

Rev 0.9 to Rev 0.95 Change List

! The Power Supply Current numbers in Table 3 have

been updated.

! The Power Supply Current numbers in Table 4 have

been updated.

! The TBDs in Table 5 have been updated.

! Table 6 has been updated.

! The Typical Application Schematic has been

updated.

! The Bill of Materials has been updated.

Rev. 0.95

73

Si2400

Si2400 Silicon Rev. B to Rev. C Change List

Note: The change from Si2400 rev. B to Si2400 rev. C is a

Neither of these software workarounds are required

in the Si2400 rev. C.

ROM change only.

! In PCM data mode, when using the UART 9th-bit

escape feature or the GPIO3 escape pin, an escape

when off-hook causes the Si2400 rev. B to go back

on-hook. This errata has been eliminated in the

Si2400 rev. C.

! For the Si2400 rev. B, register 0x3B must be set to

0x03 to improve caller ID in Australia. This is not

required for the Si2400 rev. C.

! For the Si2400 rev. B, when using the Analog

Monitor Mode of operation (ATDT###!0 or ATA0), the

host must wait for a ',' result code and then send the

ATSE4=12A0 command, or the host must send the

command ATSF4=00SE4=12 after a connection is

made. Neither of these workarounds are required

with the Si2400 rev. C.

! The following command, 'SF5=0AS09=50', is

required by the Si2400 rev. B upon initialization to

improve ring detection. The Si2400 rev. C does not

require this command.

! The S01 register defaults to 0x01 in rev. B and has

changed to a default of 0x03 in rev. C. This default

value of 0x03 seconds is needed for JATE

compliance during blind dialing.

! For the Si2400 rev. C, the definition of register 0x0B

has changed from Minimum Ring ON time to

Minimum Ring OFF time, and the default is set to

0x28.

! The S08 register defaults to 0x0F in rev. B and has

changed to a default of 0x0A in rev. C. This default

value of 0x0A corresponds to a setting which allows

for CTR21 ring-frequency compliance.

! FCC Part 68 requires that answering modems have

a two second delay from off hook to answer tone

generation. Implementations that use that auto-

answer mode with the Si2400 rev. B must instead

issue the command 'ATDT,,;ATA' immediately after

ring detection to answer an incoming call. This

command is not required for the Si2400 rev. C.

! In order to force the modem to stay off hook when

using the 'ATA0' command, the 'ATSB3=66SB2=00'

command is required before the 'ATA0' command for

the Si2400 rev. B. This command is not required for

the Si2400 rev. C.

! For the Si2400 rev. B, after caller ID data has been

received by the Si2400, the Si2400 does not

respond to an ATA <CR> command until after a

second ring has been received. In order to answer

the call before the second ring, a hidden register, the

S84.7 bit, must be cleared prior to issuing the

ATA<CR> command. Clearing this bit is not required

on the Si2400 rev. C.

! For the Si2400 rev. B, under certain loop conditions,

the Si2400 indicates a false off-hook intrusion event

and asserts ALERT (if enabled) when the Si2400

goes off-hook. The workaround for Rev B is to clear

the GPIO4 data bit after going off hook to force the

negation of the ALERT pin. Instead of using an

ATDT####<CR> sequence to originate a call, the

sequence ATDT,;ATSE3=00DT####<CR> is used.

Instead of using automatic answer (ATS00=01) to

answer a call, the ATDT,;ATSE3=00A<CR> is used

after a ring has been detected via the 'R' result code.

74

Rev. 0.95

Si2400

NOTES:

Rev. 0.95

75

Si2400

Contact Information

Silicon Laboratories Inc.

4635 Boston Lane

Austin, TX 78735

Tel: 1+(512) 416-8500

Fax: 1+(512) 416-9669

Toll Free: 1+(877) 444-3032

Email: productinfo@silabs.com

Internet: www.silabs.com

The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.

Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from

the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features

or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-

resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-

quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to

support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-

sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-

plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.

Silicon Laboratories, Silicon Labs, ISOcap, and ISOmodem are trademarks of Silicon Laboratories Inc.

Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders

76

Rev. 0.95


型号：	SI2400
厂家：	ETC
描述：	V.22BIS ISOMODEM⑩ WITH INTEGRATED GLOBAL DAA 与全球综合DAA的V.22bis ISOMODEM⑩
文件：	总76页 (文件大小：1381K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SI2400 [ETC]

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