SPC122A [ETC]
SOUND CONTROLLER WITH 128KB FLASH MEMORY; 声音控制器具有128KB闪存
| 型号： | SPC122A |
| 厂家： | 
ETC |
| 描述： | SOUND CONTROLLER WITH 128KB FLASH MEMORY |
| 文件： | 总20页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary
SPC122A
SOUND CONTROLLER WITH 128KB FLASH MEMORY
GENERAL DESCRIPTION
The SPC122A is a CPU based two-channel speech/melody synthesizer including CMOS 8-bit microprocessor
with 69 instructions, 128K-bytes of Flash ROM for speech and melody data (Speech is compressed by a 4-bit
ADPCM with approx. 36 sec speech duration @ 7KHz sampling rate) and 128-byte working SRAM. Its
external memory is capable of being extended up to 256K. It provides Multi-Duty-Cycle output that can be
implemented for remote-control purposes. It includes two Timer/Counters, 28 Software Selectable I/Os, 2
audio current D/A outputs (or one PWM audio output) and serial interface I/O port. Volume control is also
provided. For audio processing, melody and speech can be mixed into one output. It operates over a wide
voltage range of 2.4V - 5.5V. In addition, the SPC122A has a Clock Stop mode for power savings. The power
savings mode saves the RAM contents, but freezes the oscillator, causing all other chip functions to be
inoperative. The Max. CPU clock frequency is 6.0MHz. It has an Instruction Cycle Rate of 2 clock cycles
(min.) – 6 clock cycles (max.). The SPC122A includes, not only the latest technology, but also the full
commitment and technical support of Sunplus.
FEATURES
ꢀ 8-bit microprocessor
ꢀ Multi-Duty-Cycle outputs (1/2, 1/3, 1/4 duty)
ꢀ Provides 128K-byte Flash ROM for program
and audio data
ꢀ 128-byte working SRAM
BLOCK DIAGRAM
ꢀ Software-based audio processing
ꢀ Wide operating voltage: 2.4V – 3.4V @ 2.0MHz
3.6V – 5.5V @ 6.0MHz
128K-byte
flash
ROM
XI
8-Bit
RISC
controller
Timer
TimeBase
INT Control
Rosc
XO
128-byte
SRAM
ꢀ Supports Crystal Resonator or Rosc
(with bonding option)
A17
Two
8-bit D/A
(current)
or
AUD1
AUD2
A16-0
ROMOE
D7-0
BURN
SPOP
Serial
interface
I/O
flash
program
controller
ꢀ Max. CPU clock: 2.0MHz @ 3V, 6.0MHz @ 5V
ꢀ Standby mode (Clock Stop mode) for power
savings. Max. 2ꢁA @ 5V
PWM output
CE
28
PINS GENERAL I/O PORT
IOC7-0
(I/O)
IOA3-0
(I/O)
IOB7-0
(I/O)
IOD7-0
(I/O)
ꢀ 500ns instruction cycle time @ 4.0MHz CPU clock
ꢀ Provides 28 general I/Os
APPLICATION FIELD
ꢀ Two 12-bit timer/counters
ꢀ Intelligent education toys
ꢀ 6 INT sources
Ex. Pattern to voice (animal, car, color, etc.)
Spelling (English or Chinese)
Math
ꢀ Key wake-up function
ꢀ Approx. 36 sec speech
@ 7KHz sampling rate with ADPCM
ꢀ Two 8-bit D/A output
ꢀ High end toy controller
ꢀ Talking instrument controller
ꢀ General speech synthesizer
ꢀ Industrial controller
ꢀ One PWM audio output (single speaker)
ꢀ Volume control function
ꢀ Sunplus Technology Co., Ltd.
1
Rev.: 0.3 1999.11.18
Preliminary
SPC122A
FUNCTION DESCRIPTIONS
ꢀ CPU
The SPC122A 8-bit microprocessor is a high performance processor equipped with Accumulator, Program
Counter, X Register, Stack pointer and Processor Status Register (this is the same as the 6502 instruction
structure). SPC122A is able to perform with 6.0MHz (max.) depending on the application specifications.
ꢀꢀꢀ OSCILLATOR
The SPC122A supports AT-cut parallel resonant oscillated Crystal / Resonator or RC Oscillator or external clock
sources by using the bonding option (select one from those three types). The design of application circuit
should follow the vendors’ specifications or recommendations. The diagrams listed below are typical
X’TAL/ROSC circuits for most applications:
SPC122A
SPC122A
XI/R
XO
XI/R
XO
VDD
Rosc
20 pf
20 pf
(a) Crystal or
(b) RC Oscillator
Connections
Ceramic Resonator
Connections
ꢀ BONDING OPTION
The SPC122A has the following bonding option:
ꢀSupports Crystal Resonator or Rosc (with bonding option).
ꢀ ROM AREA
The SPC122A provides a 122AK-byte of Flash ROM that can be defined as the program area, audio data area,
or both. To access ROM, users should program the BANK SELECT Register, choose bank, and access
address to fetch data. The combination of CE and Burn pins is capable of programming the Flash ROM as
parallel mode. In contrast, using CE and STOP pins can program the Flash ROM as serial mode. In addition,
pin AD17 and CE can be used to extend the memory from 128K to 256K with external memory.
ꢀ RAM AREA
The SPC122A total RAM consists of 128 bytes (including Stack) at locations from $80 through $FF.
ꢀ Sunplus Technology Co., Ltd.
2
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
ꢀ MAP OF MEMORY AND I/Os
*I/O PORT:
*MEMORY MAP (From ROM view)
$00000
- PORT IOA $0002
IOB $0003
HW register, I/Os
IOC $0004
IOD $0005
$00100
$00200
- I/O CONFIG $0000
USER RAM and STACK
UNUSED
$0001
*NMI SOURCE:
- INTA (from TIMER A)
$00600
$08000
*INT SOURCE:
SUNPLUS TEST PROGRAM
- INTA (from TIMER A)
- INTB (from TIMER B)
- CPU CLK / 1024
- CPU CLK / 8192
- CPU CLK / 65536
- EXT INT
USER’S PROGRAM &
DATA AREA
ROM BANK #0
$1FFFF
- Capable of being extended to 256K with external memory
ꢀ Sunplus Technology Co., Ltd.
3
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
ꢀ I/O PORT CONFIGURATION*
Input/Output IOA port : IOA3 - 0
Input/Output IOB port : IOB2 - 0
input data
V
DD
logic_1
control
90K
OD-NMOS
or buffer
output
output
data
data
buffer or
OD-NMOS
60K
logic_2
control
input data
OD : Open Drain
OD : Open Drain
Input/Output IOB port : IOB5 - 4
input data
Input/Output IOC port : IOC3 - 0
V
DD
logic_4
control
90K
OD-NMOS
or buffer
output
data
output
data
buffer or
OD-NMOS
60K
logic_3
control
input data
OD : Open Drain
OD : Open Drain
Input/Output IOD port : IOD3 - 0
input data
Input/Output IOD port : IOD7 - 4
input data
OD-PMOS
or buffer
OD-PMOS
or buffer
output
data
output
data
60K
60K
logic_5
logic_6
control
control
OD : Open Drain
OD : Open Drain
*Values shown are for VDD = 5.0V test conditions only.
ꢀ Sunplus Technology Co., Ltd.
4
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
ꢀ POWER SAVINGS MODE
The SPC122A provides a power savings mode (Standby mode) for those applications that require very low
stand-by current. To enter standby mode, the Wake-Up Register should be enabled and then stop the CPU
clock by writing the STOP CLOCK Register. The CPU will then go to the stand-by mode. In such a mode,
RAM and I/Os will remain in their previous states until being awakened. Port IOD7-0 is the only wake-up
source in the SPC122A. After the SPC122A is awakened, the internal CPU will go to the RESET State (Tw ꢀ
65536 x T1) and then continue processing the program. Wakeup Reset will not affect RAM or I/Os (See
FIG.1).
Sleep
Wake-up
T1
CPU
CLK
T
w
Reset
FIG. 1
T1 = 1 / ( FCPU ), Tw ꢀ 65536 x T1
ꢀ MULTI-DUTY CYCLE MODE
The SPC122A provides three output waveforms, 1/2, 1/3, and 1/4 duty cycles. The Control Register should be
used to select 1/2, 1/3, or 1/4 duty cycle and the IOA2 should be programmed as the multi-duty cycle output port.
Users can use the combinations of these duty cycles for remote-control purpose.
ꢀ 1/2, 1/3, 1/4 DUTY CYCLE OUTPUTS
Clock
1/2 duty cycle
1/3 duty cycle
1/4 duty cycle
ꢀ SERIAL INTERFACE I/O
The SPC122A provides serial interface I/O mode for those applications required large ROM/RAM. Serial
Interface I/O Port can be used to read/write data from/to extra memory. The interface I/O Register is the
control register for programming interface I/O.
ꢀ Sunplus Technology Co., Ltd.
5
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
ꢀ TIMER/COUNTER
The SPC122A contains two 12-bit timer/counters, TMA and TMB respectively. TMA can be specified as a
timer or a counter, but TMB can only be used as a timer. In the timer mode, TMA and TMB are re-loaded up-
counters. When timer overflows from $0FFF to $0000, the carry signal will make the timer automatically reload
to the user’s pre-set value and be up-counted again. At the same time, the carry signal will generate the INT
signal if the corresponding bit is enabled in the INT ENABLE Register. If TMA is specified as a counter, users
can reset by loading #0 into the counter. After the counter has been activated, the value of the counter can
also be read from the counters at the same time.
Timer/Counter Clock source can be selected as follows:
Timer/Counter
12-BIT TIMER
Clock Source
CPU CLOCK (T) or T/4
TMA
TMB
12-BIT COUNTER
12-BIT TIMER
T/64, T/8192, T/65536 or EXT CLK
T or T/4
MODE SELECT REGISTER
TIMER CLOCK SELECTOR
TMA only, select timer or counter
Select T or T/4
ꢀ SPEECH AND MELODY
Since the SPC122A provides a large ROM and wide range of CPU operation speeds, it is most suitable for
speech and melody synthesis.
For speech synthesis, the SPC122A can provide NMI for accurate sampling frequency. Users can record or
synthesize the sound and digitize it into the ROM. The sound data can be played back in the sequence of the
control functions as designed by the user's program. Several algorithms are recommended for high fidelity and
compression of sound including PCM, LOG PCM, and ADPCM.
For melody synthesis, the SPC122A provides the dual tone mode. After selecting the dual tone mode, users
only need to fill either TMA or TMB, or both TMA and TMB to generate expected frequency for each channel.
The hardware will toggle the tone wave automatically without entering into an interrupt service routine. Users
are able to simulate musical instruments or sound effects by simply controlling the envelope of tone output.
ꢀ VOLUME CONTROL FUNCTION
The SPC122A contains a volume control function that provides an 8-step volume controller to control current
D/A or PWM output. A volume control function selector (Enable/Disable) register and controller register is
provided.
ꢀ Sunplus Technology Co., Ltd.
6
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
Differences between SPC121A and SPC122A
SPC121A
SPC122A
1. Work range
2. ROM type
3. ROM SIZE
4. I/O port
2.4V - 5.5V
3.6V - 5.5V
Mask
120K
21
ꢁ
Flash
128K
28
5. SIO
ꢂ
6. PWM Output
7. Multiphase Output
8. Volume Control
ꢁ
ꢂ
ꢁ
ꢂ
ꢁ
ꢂ
ꢀ Sunplus Technology Co., Ltd.
7
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
PIN DESCRIPTIONS*
Mnemonic PIN No.
Type
Description
Positive supply for logic and I/O pins
VDD
5
I
29
34
45
57
17
27
50
66
32
VSS
I
I
Ground reference for logic and I/O pins
XI
Oscillator crystal input or RESISTOR (Resistor should be connected to
VDD)
XO
OPT*
BURN
CE
31
30
15
16
14
18
4
O
I
Oscillator crystal output
For ROSC option, OPT should be connected to VDD.
Burn, This pin is an active high to select the flash ROM program function
This pin is an active low to select this chip as a 1Mbits memory
Data Output enable
I
I
ROMOE
I/O
I
SPOP
A17
Serial program option
O
I
Extended Memory Enable
RESET
TEST
AUD1
AUD2
19
36
33
35
This pin is an active low reset to the chip.
TEST MODE
I
O
O
AUDIO OUTPUT
D7 – 0
A13 – 0
A16 – 14
6-13
74-60
3-1
I/O
I/O
Data Bus
Address Bus
Port A is an 8-bit bi-directional programmable Input / Output port with
Pull-high or Open-drain option. As inputs, Port A can be in either the
Pure or Pull-high states. As outputs, Port A can be either Buffer or
Open-drain NMOS types (Sink current).
IOA0
IOA1
IOA2
IOA3
46
47
48
49
I/O
I/O
I/O
I/O
IOA0: Serial programming clock output
IOA2: Multi-duty cycle output
**See note 1 and 2 below.
ꢀ Sunplus Technology Co., Ltd.
8
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
Mnemonic PIN No.
Type
Description
Port B is an 8-bit bi-directional Input / Output port with Pull-low or Open-
drain option. As inputs, Port B can be in either the Pure or Pull-low
states. As outputs, Port B can be either Buffer or Open-drain NMOS
types (Sink current).
IOB0
IOB1
IOB2
IOB4
IOB5
IOB6
IOB7
59
58
56
54
53
52
51
I/O
I/O
I/O
I/O
I/O
I/O
I/O
**See note 1 and 2 below.
Port C is an 8-bit bi-directional Input / Output port with Pull-high or Open-
drain option. As inputs, Port C can be in either the Pure or Pull-high
states. As outputs Port C can be a Buffer or Open-drain NMOS type
(sink current).
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
28
26
25
24
23
22
21
20
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IOC0: Serial programming Data
IOC1: EXT INT PIN
IOC2: EXT COUNT IN
**See note 1 and 2 below.
Port D is an 8-bit bi-directional Input / Output port with Pull-low or Open-
drain option. As inputs, Port D can be either Pure or Pull-low states.
As outputs, Port D can be either Buffer or Open-drain PMOS (send
current). (Port D can be software programmed for wake up I/O)
IOD0
IOD1
IOD2
IOD3
IOD4
IOD5
IOD6
IOD7
44
43
42
41
40
39
38
37
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
**See note 1 and 2 below.
* Refer to SPC Programming Guide for complete information.
**Note: 1.) Two input states can be specified; Pure Input, Pull-High or Pull Low.
2.) Three output states can be specified as Buffer output, Open Drain PMOS output (send), or Open
Drain NMOS output (sink).
***OPT is the selection pin for ROSC or X’TAL using the bonding option. The shape
looks like the figure at the right. When ROSC is selected, OPT is connected to
VDD
OPT
VDD. If X’TAL is selected, OPT is floating. The reason OPT is near VDD is that
when ROSC is selected, it is easy to make the connection between VDD and OPT.
ꢀ Sunplus Technology Co., Ltd.
9
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
ABSOLUTE MAXIMUM RATINGS
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
< 7V
Input Voltage Range
Operating Temperature
Storage Temperature
-0.5V to V+ + 0.5V
0ꢁ to +60ꢁ
TA
-50ꢁ to +150ꢁ
TSTO
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or
damage to the device. For normal operational conditions see AC/DC Electrical Characteristics.
AC CHARACTERISTICS ( TA = 25 ꢁ)
Limit
Characteristics
Symbol
Unit
Test Condition
VDD = 3V
Min.
Typ.
Max.
-
-
-
1.0
4.0
-
2.0
6.0
6.0
MHz
MHz
MHz
OSC Frequency
CPU Clock
FCPU
VDD = 5V
FCPU
FCPU = FOSC2 @5V
DC CHARACTERISTICS ( TA = 25 ꢁ, VDD = 5V )
Limit
Characteristics
Symbol
Unit
Test Condition
Min.
Typ.
Max.
5.5
8.0
2.0
-
Operating Voltage
Operating Current
Standby Current
Audio output current
Input high level
Input Low level
Output high I
VDD
IOP
3.6
-
V
mA
ꢁA
mA
V
For 3-battery
FCPU = 4.0MHz@5V, no load
VDD = 5V
-
6.5
ISTBY
IAUD
VIH
-
-
-
-3.0
VDD = 5V
3.0
-
-
-
-
VDD = 5V
VIL
0.8
V
VDD = 5V
VDD = 5V
IOH
-1.0
4.0
-
-
-
-
-
-
mA
mA
IOA, IOB, IOD
VOH = 4.2V
VDD = 5V
Output sink I
IOL
IOA, IOB, IOD
VOL = 0.8V
Input resistor
Pull Low
RIN
60
kohm
IOA, IOB, IOC, IOD
VDD = 5V
ꢀ Sunplus Technology Co., Ltd.
10
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
The relationship between the Rosc and the Fosc
VDD = 3.0V , Ta = 25ꢁ
VDD = 4.5V , Ta = 25ꢁ
6.0
5.0
4.0
3.0
2.0
1.0
0.0
4.0
3.0
2.0
1.0
0.0
0
200
400
600
800
0
200
400
600
800
Rosc ( Kohms )
Rosc ( Kohms )
Frequency vs. Temperature
Frequency vs. VDD
Frequency normalized to 25
1.04
1.02
1.00
0.98
0.96
4.0
3.0
2.0
1.0
Rosc=100Kohms
Rosc = 91 Kohms
V
DD=4.5V
Rosc = 470 Kohms
V
DD=3.0V
0.0
2.0
3.0
4.0
5.0
VDD ( Volts )
0
10 20 30 40 50 60 70
Temperature ( )
Operating current vs. Frequency vs. VDD
5.0
VDD = 4.5V
4.0
3.0
2.0
VDD = 3V
1.0
0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0
FCPU ( MHz )
ꢀ Sunplus Technology Co., Ltd.
11
Rev.: 0.3
1999.11.18
X’TAL/CERAMIC
VDD
OSC
VDD
VDD
C4
C3
R1
Speaker
Speaker
Resistor
20p
20p
VDD
Q1
8050D
Q1
8050D
XI
OPT
XO
XI
OPT
XO
C1
+
C1
+
A17
A17
IOA3 ~ 0
IOC7 ~ 0
IOA3 ~ 0
IOC7 ~ 0
A16-A0
A16-A0
ROMOE
D7-0
-
-
IOA (I/O)
IOA (I/O)
0.47ꢁF
0.47ꢁF
ROMOE
D7-0
AUD1
AUD1
IOC (I/O)
IOC (I/O)
VDD
VDD
SPC122A
SPC122A
IOB7 ~ 0
IOD7 ~ 0
IOB7 ~ 0
IOD7 ~ 0
VDD
VDD
IOB(I/O)
IOB(I/O)
AUD2
AUD2
220 F
220 F
C4
C6
0.1ꢁ
0.1ꢁ
IOD (I/O)
0.1
0.1
IOD (I/O)
Speaker
Speaker
VSS
RESET
RESET
Q2
8050D
Q2
8050D
C2
+
C2
+
C5
C3
-
-
RESET
RESET
0.47ꢁF
0.47ꢁF
0.1ꢁ
0.1ꢁ
SPC122A Application circuit (D/A Output)
X’TAL/CERAMIC
VDD
OSC
VDD
VDD
C4
C3
R1
Speaker
Speaker
Resistor
20p
20p
VDD
VDD
Q1
8050D
Q1
8050D
XO
A17
XI
OPT
IOA0
IOA1
IOA2
IOA3
XO
A17
XI
OPT
VDD
C1
+
C1
+
VDD
SCL
CS
IOA0
SCL
CS
A16-A0
ROMOE
D7-0
A16-A0
SPRS
256A
IOA1
IOA2
IOA3
SPRS
256A
-
-
ROMOE
SDA
0.47ꢁF
0.47ꢁF
SDA
D7-0
VSS
VSS
IOC0
AUD1
AUD1
IOC0
IOC7~1
IOB7~0
IOC7~1
IOB7~0
SPC122A
SPC122A
IOC(I/O)
VDD
VDD
IOC(I/O)
VDD
AUD2
VDD
IOB(I/O)
IOB(I/O)
AUD2
220 F
220 F
C4
C6
0.1ꢁ
IOD7~0
IOD7~0
0.1ꢁ
0.1
0.1
Speaker
IOD (I/O)
IOD (I/O)
Speaker
VSS
VSS
RESET
RESET
Q2
8050D
Q2
8050D
C2
+
C2
+
C5
C3
-
-
RESET
RESET
0.47ꢁF
0.47ꢁF
0.1ꢁ
0.1ꢁ
SPC122A Application circuit with Serial Interface I/O Application
X’TAL/CERAMIC
VDD
OSC
C4
C3
R1
Resistor
20p
20p
VDD
XO
XO
XI
XI
OPT
A17
A17
OPT
IOA3 ~ 0
IOC7 ~ 0
IOA3 ~ 0
IOC7 ~ 0
A16-A0
ROMOE
D7-0
A16-A0
IOA (I/O)
IOA (I/O)
ROMOE
D7-0
AUD1
AUD1
IOC (I/O)
IOC (I/O)
Speaker
~16
Speaker
~16
SPC122A
SPC122A
AUD2
IOB7 ~ 0
IOD7 ~ 0
IOB7 ~ 0
IOD7 ~ 0
VDD
AUD2
VDD
VDD
IOB(I/O)
IOB(I/O)
VDD
0.1
220 F
0.1
220 F
IOD (I/O)
IOD (I/O)
VSS
VSS
RESET
RESET
C5
C3
RESET
RESET
0.1ꢁ
0.1ꢁ
SPC122A Application circuit (PWM Output)
X’TAL/CERAMIC
VDD
OSC
C4
C3
R1
Resistor
20p
20p
VDD
VDD
XI
XO
XO
XI
A17
A17
OPT
IOA0
IOA1
IOA2
IOA3
OPT
VDD
VDD
SCL
A16-A0
IOA0
IOA1
IOA2
IOA3
A16-A0
SCL
CS
SPRS
SPRS
256A
CS
ROMOE
D7-0
ROMOE
D7-0
256A SDA
SDA
VSS
AUD1
VSS
IOC0
AUD1
IOC0
Speaker
~16
Speaker
~16
SPC122A
IOC7~1
IOC7~1
SPC122A
IOC(I/O)
IOC(I/O)
AUD2
AUD2
VDD
VDD
VDD
IOB7~0
IOD7~0
VDD
IOB7~0
IOD7~0
IOB(I/O)
IOB(I/O)
0.1
220 F
0.1
220 F
IOD (I/O)
VSS
IOD (I/O)
VSS
RESET
RESET
C5
C3
RESET
RESET
0.1ꢁ
0.1ꢁ
SPC122A Application circuit with Serial Interface I/O Application
X’TAL/CERAMIC
VDD
OSC
C4
C3
R1
Resistor
20p
20p
VDD
VDD
VDD
VDD
VDD
D7~0
D7~0
XI
OPT
XO
XI
OPT
XO
128K
Memory
A16~0
128K
Memory
A16~0
D7-0
D7-0
IOA3~0
IOC7~0
IOA3~0
IOC7~0
OE
CE
OE
CE
A16-A0
A16-A0
ROMOE
IOA(I/O)
IOA(I/O)
ROMOE
A17
VSS
VSS
A17
AUD1
AUD1
IOC(I/O)
Speaker
~16
IOC(I/O)
IOB(I/O)
IOD (I/O)
Speaker
~16
SPC122A
SPC122A
IOB7~0
IOD7~0
IOB7~0
IOD7~0
AUD2
AUD2
VDD
VDD
IOB(I/O)
VDD
VDD
0.1
220 F
IOD (I/O)
0.1
220
F
VSS
VSS
RESET
RESET
C5
C3
RESET
RESET
0.1ꢁ
0.1ꢁ
SPC122A Application circuit with extension memory from 128K to 256K
Preliminary
SPC122A
ꢀ Application Circuit Note (6)
ꢀ Sunplus Technology Co., Ltd.
17
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
PAD ASSIGNMENT AND LOCATIONS
ꢀꢀꢀ PAD Assignment
Chip Size: 3250ꢁm x 3500ꢁm
This IC substrate should be connected to VSS
Note: To ensure that the IC function properly, bond all VDD, VSS, AVDD and AVSS pins.
Ordering Information
Product Number
Package Type
SPC122A-nnnnV-C
Chip form
Note1: Code number (nnnnV) is assigned for customer.
Note2: Code number (nnnn = 0000 - 9999); version (A = A - Z).
NOTE: SUNPLUS TECHNOLOGY CO., LTD reserves the right to make changes at any time without notice in
order to improve the design and performance and to supply the best possible product.
ꢀ Sunplus Technology Co., Ltd.
18
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
ꢀꢀꢀ PAD Locations
Pad No
Pad Name
X
Y
Pad No
Pad Name
X
Y
1
A14
A15
A16
A17
VDD
D7
-1429
-1429
-1429
-1429
-1424
-1429
-1429
-1429
-1429
-1429
-1429
-1429
-1429
-1429
-1417
-1417
-1417
-1397
-1401
-1422
-1433
-1424
-1134
-994
1538
1388
1247
1107
956
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
68
69
70
71
XO
XI
81
-1542
-1542
-1574
-1574
-1574
-1542
-1320
-1182
-1038
-906
-759
-620
-485
-342
-197
-43
2
247
3
AUD1
VDD
AUD2
TEST
IOD7
IOD6
IOD5
IOD4
IOD3
IOD2
IOD1
IOD0
VDD
IOA0
IOA1
IOA2
IOA3
VSS
IOB7
IOB6
IOB5
IOB4
IOB3
IOB2
VDD
IOB1
IOB0
A0
508
4
847
5
1186
1441
1426
1432
1432
1434
1426
1427
1427
1424
1416
1433
1433
1426
1428
1400
1432
1437
1432
1443
1440
1426
1421
1113
972
6
806
7
D6
666
8
D5
525
9
D4
385
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
61
62
63
64
D3
245
D2
104
D1
-36
D0
-176
-316
-466
-641
-791
-979
-1126
-1285
-1412
-1570
-1568
-1557
-1558
-1559
-1547
-1562
-1549
-1541
1547
1547
1547
1547
ROMOE
BURN
CE
VSS
SPOP
RESET
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
VSS
IOC0
VDD
OPT
A1
98
238
381
564
754
895
1040
1164
1303
1441
1582
1547
1547
1547
1547
1547
1547
1547
-851
-699
-573
-416
-259
-81
816
675
A7
-309
-458
-598
-739
A2
535
A8
A3
394
A9
A4
254
A10
ꢀ Sunplus Technology Co., Ltd.
19
Rev.: 0.3
1999.11.18
Preliminary
SPC122A
Pad No
Pad Name
X
Y
Pad No
Pad Name
X
Y
65
66
67
A5
VSS
A6
113
-29
1547
1537
1547
72
73
74
A11
A12
A13
-879
-1020
-1160
1547
1547
1547
-169
DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification
provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by
description regarding the information in this publication or regarding the freedom of the described chip(s) from
patent infringement. FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF MERCHANTABILITY OR
FITNESS FOR ANY PURPOSE. SUNPLUS reserves the right to halt production or alter the specifications and
prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for
use in normal commercial applications.
Applications involving unusual environmental or reliability
requirements, e.g. military equipment or medical life support equipment, are specifically not recommended
without additional processing by SUNPLUS for such applications. Please note that application circuits
illustrated in this document are for reference purposes only.
ꢀ Sunplus Technology Co., Ltd.
20
Rev.: 0.3
1999.11.18
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