SY10101422-3MCF [ETC]
256 x 4 ECL RAM; 256 ×4 ECL RAM
| 型号： | SY10101422-3MCF |
| 厂家： | 
ETC |
| 描述： | 256 x 4 ECL RAM |
| 文件： | 总10页 (文件大小：205K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
256 x 4 ECL RAM
SYNERGY
SEMICONDUCTOR
FEATURES
DESCRIPTION
■ Address access time, tAA: 3/4/5/7ns max.
■ Block select access time, tAB: 2ns max.
■ Write pulse width, tWW: 3ns min.
■ Edge rate, tr/tf: 500ps typ.
The Synergy SY10/100/101422 are 1024-bit Random
Access Memories (RAMs), designed with advanced Emitter
Coupled Logic (ECL) circuitry. The devices are organized
as 256-words-by-4-bits and meet the standard 10K/100K
family signal levels. The SY100422 is also supply voltage-
compatible with 100K ECL, while the SY101422 operates
from 10K ECL supply voltage (–5.2V). All feature on-chip
voltage and temperature compensation for improved noise
margin.
■ Write recovery times under 5ns
■ Power supply current, IEE: –250mA, –200mA
for –5/7ns
■ Superior immunity against alpha particles provides
The SY10/100/101422 employ proprietary circuit design
techniques and Synergy’s proprietary ASSET advanced
bipolar technology to achieve extremely fast access, write
pulse width and write recovery times. ASSET uses
proprietary technology concepts to achieve significant
reduction in parasitic capacitance while improving device
packing density. Synergy’s circuit design techniques, coupled
with ASSET, result not only in ultra-fast performance, but
also allow device operation at reduced power levels with
virtually no soft error sensitivity and with outstanding device
reliability in volume production.
virtually no soft error sensitivity
■ Built with advanced ASSET™ technology
■ Fully compatible with industry standard 10K/100K
ECL I/O levels
■ Noise margins improved with on-chip voltage and
temperature compensation
■ Open emitter output for easy memory expansion
■ Includes popular Block Select function allowing
individual read/write control over blocks
■ ESD protection of 2000V
■ Available in 24-pin flatpack and 28-pin PLCC and
MLCC packages
BLOCK DIAGRAM
A
0
A
5
A
6
A7
Y-Decoder/Driver
Memory Cell Array
A
A
A
A
1
2
3
4
WE
SA/WA*
SA/WA
SA/WA
SA/WA
DI
0
DI
1
DI
2
DI3
BS0
BS1
BS2
BS3
DO
0
DO
1
DO
2
DO3
*
SA = Sense Amplifier
WA = Write Amplifier
Rev.: E
Amendment:/0
© 1999 Micrel-Synergy
Issue Date: August,1999
1
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
PIN CONFIGURATIONS
2
4
3
1 28 27 26
25
24 23 22 21 20 19
DO1
5
DO
BS
DI
NC
DI
2
A
3
4
2
1
2
3
4
5
6
18
A5
BS
1
0
A
6
24
23
22
21
20
19
2
17
16
15
14
13
WE
Top View
DI
7
3
DI
Top View
Flatpack
F24-1
DI
DI
1
MLCC (M28-1)
or
NC
DI
WE
DI
BS
DO
3
8
0
PLCC (J28-1)
1
9
2
2
BS
1
10
11
A
A
4
DO
1
2
7
8
9 10 11 12
A
5
3
12 13 14 15 16
18
17
PIN NAMES
TRUTH TABLE
Input
Label
A0 - A7
BS0 - BS3
WE
Function
BS
WE
X
DIN
X
Output
Mode
Disabled
Write “H”
Write “L”
Read
Address Inputs
H
L
L
Block Select (BS)
Write Enable
L
L
L
H
L
L
L
DI0 - DI3
DO0 - DO3
VCC
Data Input (DIN)
L
H
X
DOUT
Data Output (DOUT)
GND (0V)
NOTE:
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care
VCCA
Output GND (0V)
Supply Voltage
VEE
2
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
FUNCTIONAL DESCRIPTION
The Synergy SY10/100/101422 are 1024-bit RAMs two, three or all four of the input data bits. In order to
organized as four 256-by-1-bit blocks with each block having perform a read operation, WE is held high, the Block Select
its own Block Select (BS) control signal that functions (BS) associated with each of the four output blocks is held
essentially like a unique chip select for the Block. The four low, and the non-inverted output data at the addressed
blocks and Block Selects together make the device a 256 x location is transferred to DOUT (DO0 through DO3) to be
4-bit RAM. Memory cell selection is achieved by using the read out. This allows control of the Read operation to any
8
8 address bits designated as A0 through A7. Each of the 2
one, two, three or all four of the output blocks. Open emitter
possible input address combinations corresponds to a unique outputs are provided for maximum flexibility and memory
word location in memory. The active low Block Select (BS) expansion by allowing output wire-OR connections. External
control signals are provided for memory expansion and for termination of 50Ω to –2.0V or an equivalent circuit must be
independent control of each of the four 256 x 1-bit blocks of used to provide the specified output levels.
memory. The active low Write Enable (WE) controls the
All outputs are forced to a logic LOW level when the
read and write operation on the selected block or blocks. RAM is being written into (WE = LOW). The output (or
Data resident on the DIN inputs (DI0 through DI3) is written outputs) associated with a block (or blocks) of memory can
into the addressed location only when WE and the Block be forced to a logic LOW low level by deselecting that block
Select (BS) associated with each of the DIN bits is held (or blocks) with its respective Block Select input (BS0 – BS3
LOW. This allows control of the Write operation to any one, = HIGH).
ABSOLUTE MAXIMUM RATINGS(1)
GUARANTEED OPERATING CONDITIONS
Symbol
Rating
Value
Unit
Parameter
Symbol Min. Typ. Max. Unit
Supply Voltage(1)
Case Temperature
10K
VEE
TC
–5.46 –5.2 –4.94
75
–4.8 –4.5 –4.2
85
–5.46 –5.2 –4.94
85
V
°C
V
VEE
VEE Pin Potential
to VCC Pin
+0.5 to –7.0
V
0
—
VIN
Input Voltage
+0.5 to VEE
–30
V
Supply Voltage(1) 100K
Case Temperature
VEE
TC
IOUT
DC Output Current
(Output High)
mA
0
—
°C
V
Supply Voltage(1) 101K
Case Temperature
VEE
TC
TC
Temperature Under
Bias
–55 to +125
–65 to +150
°C
°C
0
—
°C
NOTE:
Tstore
Storage Temperature
1. Referenced to VCC.
NOTE:
1. PermanentdevicedamagemayoccurifABSOLUTEMAXIMUMRATINGS
are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections
ofthisdatasheet. ExposuretoABSOLUTEMAXIMUMRATlNGconditions
for extended periods may affect device reliability.
RISE AND FALL TIME
CAPACITANCE
Code(1) Symbol Min. Typ. Max. Unit
Parameter
Symbol
Min.
Typ.
Max.
Unit
Parameter
Input Pin
Capacitance
CIN
—
4
—
pF
Output Rise Time
F
S
tr
—
500
1500
—
ps
Output Pin
Capacitance
COUT
—
5
—
pF
Output Fall Time
F
S
tf
—
500
1500
—
ps
NOTE:
1. F = Fast Edge Rate
S = Standard Edge Rate
3
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
10K DC ELECTRICAL CHARACTERISTICS
VCC = 0V; TC = 0°C to +75°C; VEE = –5.2V; Airflow > 2.5m/s; Output Load = 50Ω to –2.0V
Symbol
Parameter
TC
Min.
Max.
Unit
Condition
VOH
Output High Voltage
0°C
+25°C
+75°C
–1000
–960
–900
–840
–810
–720
mV
VIN = VIH Max. or VIL Min.
VIN = VIH Max. or VIL Min.
VIN = VIH Min. or VIL Max.
VIN = VIH Min. or VIL Max.
VOL
VOHC
VOLC
VIH
Output Low Voltage
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
0°C
+25°C
+75°C
–1870
–1850
–1830
–1665
–1650
–1625
mV
mV
mV
mV
mV
0°C
+25°C
+75°C
–1020
–980
–920
—
—
—
0°C
+25°C
+75°C
—
—
—
–1645
–1630
–1605
0°C
+25°C
+75°C
–1145
–1105
–1045
–840
–810
–720
Guaranteed Input Voltage High
for All Inputs
VIL
0°C
+25°C
+75°C
–1870
–1850
–1830
–1490
–1475
–1450
Guaranteed Input Voltage Low
for All Inputs
IIH
IIL
Input High Current
0°C to+ 75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
0.0
–2
30
40
–2
0.0
20
2
µA
µA
µA
µA
µA
µA
VIN = VIH Max.
VIN = VIL Min.
VIN = VIL Min.
VIN = VIH Max.
VIN = VIL Min.
VIN = VIH Max.
Input Low Current
IIL
BS Input Low Current
BS Input High Current
WE Input Low Current
WE Input High Current
170
220
35
IIH
IIL
IIH
IEE
60
Power Supply
Current
-3ns, -4ns
-5ns, -7ns
–250
–200
—
—
mA
All Inputs and Outputs Open
0°C to +75°C
100K/101K DC ELECTRICAL CHARACTERISTICS
VCCA = 0V
VCC = 0V
VEE = –4.5V (100K)
VEE = –5.2V (101K)
TC = 0°C to +85°C
Airflow > 2.5m/s
Output Load = 50Ω to –2.0V
Symbol
VOH
Parameter
Min.
–1025
–1810
–1035
—
Max.
–880
–1620
—
Unit
mV
mV
mV
mV
mV
Condition
VIN = VIH Max. or VIL Min.
VIN = VIH Max. or VIL Min.
VIN = VIH Min. or VIL Max.
VIN = VIH Min. or VIL Max.
Output High Voltage
VOL
Output Low Voltage
Output High Voltage
Output Low Voltage
Input High Voltage
VOHC
VOLC
VIH
–1610
–880
–1165
Guaranteed Input Voltage High
for All Inputs
VIL
Input Low Voltage
–1810
–1475
mV
Guaranteed Input Voltage Low
for All Inputs
IIH
IIL
Input High Current
0.0
–2
30
40
–2
0.0
20
2
µA
µA
µA
µA
µA
µA
VIN = VIH Max.
VIN = VIL Min.
VIN = VIL Min.
VIN = VIH Max.
VIN = VIL Min.
VIN = VIH Max.
Input Low Current
IIL
BS Input Low Current
BS Input High Current
WE Input Low Current
WE Input High Current
170
220
35
IIH
IIL
IIH
IEE
60
Power Supply
Current
-3ns, -4ns
-5ns, -7ns
–250
–200
—
—
All Inputs and Outputs Open
mA
4
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
AC ELECTRICAL CHARACTERISTICS
AC TEST CONDITIONS
VCC = VCCA = 0V
VEE = –5.2V ± 5%(10K)
VEE = –4.5V ± 0.3V(100K) TC = 0°C to +85°C (100K/101K)
VEE = –5.2V ± 5%(101K) Airflow > 2.5m/s
Output Load = 50Ω to –2.0V
TC = 0°C to +75°C (10K)
TC
VIH
VIL
10K
0°C
+25°C
+75°C
–0.933V
–0.90V
–0.863V
–1.733V
–1.70V
–1.663V
100/101K
0°C to +85°C
–0.90V
–1.70V
Loading Condition
GND
Input Pulse
V
IH
80%
20%
V
CCA
VCC
OUT
V
IL
V
EE
EE
t
r
tf
R
L
CL
tr = tf = 1.0ns typ.
OUTPUT LOAD: RL
CL
=
=
50Ω
5pF* (typ.)
0.01µF
* (Modeled as 50Ω transmission line
terminated to –2V.)
V
–2.0V
NOTE: All timing measurements referenced to 50% input levels.
READ CYCLE
SY10422-3
SY100422-3
SY101422-3
SY10422-4
SY100422-4
SY101422-4
SY10422-5
SY100422-5
SY101422-5
SY10422-7
SY100422-7
SY101422-7
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
ns
tAA TAVQV
tAB TBSLQV
tRB TBSHQL
Address Access Time
—
3
—
4
—
5
—
7
Block Select Access Time
Block Select Recovery Time
—
—
2
2
—
—
2
2
—
—
3
3
—
—
3
3
ns
ns
READ CYCLE TIMING DIAGRAM
BS
50%
Address
50%
t
AB
t
RB
tAA
80%
50%
20%
DOUT
50%
DOUT
t
r
tf
5
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
READ CYCLE
SY10422-3
SY100422-3
SY101422-3
SY10422-4
SY100422-4
SY101422-4
SY10422-5
SY100422-5
SY101422-5
SY10422-7
SY100422-7
SY101422-7
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
—
4
Min.
Max.
—
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
tWW TWLWH
tWS TWLQL
tWR TWHQV
tSA TAVWL
tSB TBSLWL
tSD TDVWL
tHA TWHAX
tHB TWHBSX
tHD TWHDX
Write Pulse Width
3
—
4
—
5
—
—
1
5
—
—
1
Write Disable Time
Write Recovery Time
Address Set-Up Time
Block Select Set-Up Time
Data Set-Up Time
—
—
1
3
—
—
1
4
3
4
4
4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
1
1
0
0
1
1
Address Hold Time
Block Select Hold Time
Data Hold Time
1
1
1
1
1
1
1
1
1
1
1
1
WRITE CYCLE TIMING DIAGRAM
BS
Address
DIN
t
SD
tHD
WE
t
SA
t
WW
tHB
DOUT
50%
t
SB
t
WS
tWR
6
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
PRODUCT ORDERING CODE
Edge
Rate
Package
Type
Operating
Range
Speed (ns)
Ordering Code
3
SY10/100/101422-3FCF
SY10/100/101422-3MCF
Fast
Fast
F24-1
M28-1
Commercial
Commercial
4
5
7
SY10/100/101422-4FCF
SY10/100/101422-4MCF
Fast
Fast
F24-1
M28-1
Commercial
Commercial
SY10/100/101422-5FCS
SY10/100/101422-5JCS
Standard
Standard
F24-1
J28-1
Commercial
Commercial
SY10/100/101422-7FCS
SY10/100/101422-7JCS
Standard
Standard
F24-1
J28-1
Commercial
Commercial
7
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
24 LEAD CERPACK (F24-1)
8
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
SYNERGY
SEMICONDUCTOR
28 LEAD PLASTIC LEADED CHIP CARRIER (J28-1)
9
WWW.ALLDATASHEET.COM
Copyright © Each Manufacturing Company.
All Datasheets cannot be modified without permission.
This datasheet has been download from :
www.AllDataSheet.com
100% Free DataSheet Search Site.
Free Download.
No Register.
Fast Search System.
www.AllDataSheet.com
相关型号：
©2020 ICPDF网 联系我们和版权申明