SY101474-3MCF [ETC]
1K x 4 ECL RAM; 1K ×4 ECL RAM型号: | SY101474-3MCF |
厂家: | ETC |
描述: | 1K x 4 ECL RAM |
文件: | 总10页 (文件大小:176K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SY10474-3/4/5/7
SY100474-3/4/5/7
SY101474-3/4/5/7
1K x 4 ECL RAM
SYNERGY
SEMICONDUCTOR
FEATURES
DESCRIPTION
■ Address access time, tAA: 3/4/5/7ns max.
■ Chip select access time, tAC: 2ns max.
■ Write pulse width, tWW: 3ns min.
■ Edge rate, tr/tf: 500ps typ.
The Synergy SY10/100/101474 are 4096-bit Random
Access Memories (RAMs), designed with advanced Emitter
Coupled Logic (ECL) circuitry. The devices are organized
as 1024-words-by-4-bits and meet the standard 10K/100K
family signal levels. The SY100474 is also supply voltage-
compatible with 100K ECL, while the SY101474 operates
from 10K ECL supply voltage (–5.2V). All feature on-chip
voltage and temperature compensation for improved noise
margin.
■ Power supply current, IEE: –300mA, –220mA
for –5/7ns
■ Superior immunity against alpha particles provides
virtually no soft error sensitivity
The SY10/100/101474 employ proprietary circuit design
techniques and Synergy’s proprietary ASSET advanced
bipolar technology to achieve extremely fast access, write
pulse width and write recovery times. ASSET uses
proprietary technology concepts to achieve significant
reduction in parasitic capacitance while improving device
packing density. Synergy’s circuit design techniques, coupled
with ASSET, result not only in ultra-fast performance, but
also allow device operation with virtually no soft error
sensitivity and with outstanding device reliability in volume
production.
■ Built with advanced ASSET™ technology
■ Fully compatible with industry standard 10K/100K
ECL I/O levels
■ Noise margins improved with on-chip voltage and
temperature compensation
■ Open emitter output for easy memory expansion
■ ESD protection of 2000V
■ Available in 24-pin Flatpack and 28-pin PLCC and
MLCC packages
BLOCK DIAGRAM
A
0
A1
A2
A3
Y-Decoder/Driver
Memory Cell Array
A4
A5
A6
A7
A8
A9
CS
SA/WA*
SA/WA
SA/WA
SA/WA
WE
DI
0 DO0 DI1 DO1 DI2 DO2 DI3 DO3
*
SA = Sense Amplifier
WA = Write Amplifier
Rev.: D
Amendment:/1
© 1999 Micrel-Synergy
Issue Date: December 1999
1
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
PIN CONFIGURATIONS
2
4
1 28 27 26
25
3
24 23 22 21 20 19
A
A
A
0
1
2
5
DI
3
2
1
WE
CS
1
2
3
4
5
6
18
17
16
15
14
13
A
A
A
A
A
A
5
4
3
2
1
0
6
24
23
22
21
20
19
DI
DI
Top View
MLCC (M28-1)
or
7
Top View
Flatpack
F24-1
DI
DI
DI
DI
0
1
2
3
NC
NC
DI
8
PLCC (J28-1)
9
A3
0
A
4
5
10
11
CS
A
WE
7
8 9 10 11 12
12 13 14 15 16 17 18
PIN NAMES
TRUTH TABLE
Input
Label
A0 - A9
CS
Function
Address Inputs
Chip Select
CS
WE
X
DIN
X
Output
Mode
H
L
L
Disabled
Write “H”
Write “L”
Read
L
L
L
H
WE
Write Enable
Data Input (DIN)
L
L
L
DI0 - DI3
DO0 - DO3
VCC
L
H
X
DOUT
Data Output (DOUT)
GND (0V)
NOTE:
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care
VCCA
VEE
Output GND (0V)
Supply Voltage
No Connect
NC
2
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
FUNCTIONAL DESCRIPTION
The Synergy SY10/100/101474 are 4096-bit RAMs and the non-inverted output data at the addressed location
organized as 1024-words-by-4-bits. Memory cell selection is transferred to DOUT (DO0 through DO3) to be read out.
is achieved by using the 10 address bits designated as A0 Open emitter outputs are provided for maximum flexibility
10
through A9. Each of the 2
possible input address and memory expansion by allowing output wire-OR
combinations corresponds to a unique word location in connections. External termination of 50Ω to –2.0V or an
memory. The active low Chip Select (CS) is provided for equivalent circuit must be used to provide the specified
memory expansion. The active low Write Enable (WE) output levels.
controls the read and write operation. Data resident on the
The outputs are brought to a logical low level when the
DIN inputs (DI0 through DI3) is written into the addressed RAM is being written into (WE = LOW) or when the device
location only when WE and CS are held low. In order to is deselected via the active low chip select pin (CS = HIGH).
perform a read operation, WE is held high, CS is held low
(1)
ABSOLUTE MAXIMUM RATINGS
GUARANTEED OPERATING CONDITIONS
Parameter
Supply Voltage(1)
Case Temperature
Symbol Min. Typ. Max. Unit
Symbol
Rating
Value
Unit
10K
VEE
TC
–5.46 –5.2 –4.94
75
–4.8 –4.5 –4.2
85
–5.46 –5.2 –4.94
85
V
°C
V
VEE
VEE Pin Potential
to VCC Pin
+0.5 to –7.0
V
0
—
VIN
Input Voltage
+0.5 to VEE
V
Supply Voltage(1) 100K
Case Temperature
VEE
TC
IOUT
DC Output Current
(Output High)
–30
mA
0
—
°C
V
Supply Voltage(1) 101K
Case Temperature
VEE
TC
TC
Temperature Under Bias
Storage Temperature
–55 to +125
–65 to +150
°C
°C
0
—
°C
Tstore
NOTE:
NOTE:
1. Referenced to VCC.
1. PermanentdevicedamagemayoccurifABSOLUTEMAXIMUMRATINGS
are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections
ofthisdatasheet. ExposuretoABSOLUTEMAXIMUMRATlNGconditions
for extended periods may affect device reliability.
RISE AND FALL TIME
CAPACITANCE
Parameter
Code(1) Symbol Min. Typ. Max. Unit
Parameter
Symbol
Min.
Typ.
Max.
Unit
Output Rise
Time
F
S
tr
—
—
500
1500
—
—
ps
Input Pin
Capacitance
CIN
—
4
—
pF
Output Fall
Time
F
S
tf
—
—
500
1500
—
—
ps
Output Pin
Capacitance
COUT
—
5
—
pF
NOTE:
1. F = Fast Edge Rate
S = Standard Edge Rate
3
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
10K DC ELECTRICAL CHARACTERISTICS
VCC = 0V; TC = 0°C to +75°C; VEE = –5.2V; Airflow > 2.5m/s; Output Load = 50Ω to –2.0V
Symbol
Parameter
TC
Min.
Max.
Unit
Condition
VOH
Output High Voltage
0°C
+25°C
+75°C
–1000
–960
–900
–840
–810
–720
mV
VIN = VIH Max. or VIL Min.
VIN = VIH Max. or VIL Min.
VIN = VIH Min. or VIL Max.
VIN = VIH Min. or VIL Max.
VOL
VOHC
VOLC
VIH
Output Low Voltage
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
0°C
+25°C
+75°C
–1870
–1850
–1830
–1665
–1650
–1625
mV
mV
mV
mV
mV
0°C
+25°C
+75°C
–1020
–980
–920
—
—
—
0°C
+25°C
+75°C
—
—
—
–1645
–1630
–1605
0°C
+25°C
+75°C
–1145
–1105
–1045
–840
–810
–720
Guaranteed Input Voltage High
for All Inputs
VIL
0°C
+25°C
+75°C
–1870
–1850
–1830
–1490
–1475
–1450
Guaranteed Input Voltage Low
for All Inputs
IIH
IIL
Input High Current
0°C to +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
0.0
–2
30
40
–2
0.0
20
2
µA
µA
µA
µA
µA
µA
VIN = VIH Max.
VIN = VIL Min.
VIN = VIL Min.
VIN = VIH Max.
VIN = VIL Min.
VIN = VIH Max.
Input Low Current
IIL
CS Input Low Current
CS Input High Current
WE Input Low Current
WE Input High Current
Power Supply -3ns, -4ns
170
220
35
IIH
IIL
IIH
IEE
60
–300
–220
—
mA
All Inputs and Outputs Open
0°C to +75°C
Current
-5ns, -7ns
100K/101K DC ELECTRICAL CHARACTERISTICS
VCCA = 0V
VCC = 0V
VEE = –4.5V (100K)
VEE = –5.2V (101K)
TC = 0°C to +85°C
Airflow > 2.5m/s
Output Load = 50Ω to –2.0V
Symbol
VOH
VOL
VOHC
VOLC
VIH
VIL
Parameter
Min.
–1025
–1810
–1035
—
Max.
–880
–1620
—
Unit
Condition
Output High Voltage
mV
mV
mV
mV
mV
mV
µA
µA
µA
µA
µA
µA
VIN = VIH Max. or VIL Min.
VIN = VIH Max. or VIL Min.
VIN = VIH Min. or VIL Max.
VIN = VIH Min. or VIL Max.
Guaranteed Input Voltage Highfor All Inputs
Guaranteed Input Voltage Lowfor All Inputs
VIN = VIH Max.
Output Low Voltage
Output High Voltage
Output Low Voltage
Input High Voltage
–1610
–880
–1475
20
–1165
–1810
0.0
Input Low Voltage
IIH
Input High Current
IIL
Input Low Current
–2
2
VIN = VIL Min.
IIL
CS Input Low Current
CS Input High Current
WE Input Low Current
WE Input High Current
Power Supply 3ns, 4ns
30
170
VIN = VIL Min.
IIH
40
220
VIN = VIH Max.
IIL
–2
35
VIN = VIL Min.
IIH
0.0
60
VIN = VIH Max.
IEE
–300
–220
—
mA
All Inputs and Outputs Open
Current
-5ns, -7ns
4
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
AC ELECTRICAL CHARACTERISTICS
AC TEST CONDITIONS
VCC = VCCA = 0V
VEE = –5.2V ± 5%(10K)
VEE = –4.5V ± 0.3V(100K) TC = 0°C to +85°C (100K/101K)
VEE = –5.2V ± 5%(101K) Airflow > 2.5m/s
Output Load = 50Ω to –2.0V
TC = 0°C to +75°C (10K)
TC
VIH
VIL
10K
0°C
+25°C
+75°C
–0.933V
–0.90V
–0.863V
–1.733V
–1.70V
–1.663V
100/101K
0°C to +85°C
–0.90V
–1.70V
Loading Condition
GND
Input Pulse
V
IH
80%
20%
V
CCA
VCC
OUT
V
IL
V
EE
EE
t
r
tf
R
L
CL
tr = tf = 1.0ns typ.
OUTPUT LOAD: RL
CL
=
=
50Ω
5pF* (typ.)
0.01µF
* (Modeled as 50Ω transmission line
terminated to –2V.)
V
–2.0V
NOTE: All timing measurements referenced to 50% input levels.
READ CYCLE
SY10474-3
SY100474-3
SY101474-3
SY10474-4
SY100474-4
SY101474-4
SY10474-5
SY100474-5
SY101474-5
SY10474-7
SY100474-7
SY101474-7
Symbol
Parameter
Min.
Max.
Min.
—
Max.
Min.
—
Max.
Min.
—
Max.
Unit
ns
tAA TAVQV Address Access Time
—
—
—
3
2
2
4
2
2
5
3
3
7
3
3
tAC TSLQV Chip Select Access Time
tRC TSHQL Chip Select Recovery Time
—
—
—
ns
—
—
—
ns
READ CYCLE TIMING DIAGRAM
CS
50%
Address
50%
t
AC
t
RC
tAA
80%
50%
20%
DOUT
50%
DOUT
t
r
tf
5
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
WRITE CYCLE
SY10474-3
SY100474-3
SY101474-3
SY10474-4
SY100474-4
SY101474-4
SY10474-5
SY100474-5
SY101474-5
SY10474-7
SY100474-7
SY101474-7
Symbol
Parameter
Min.
3
Max.
—
2
Min.
4
Max.
—
2
Min.
Max.
—
3
Min.
Max.
—
4
Units
ns
tWW
tWS
tWR
tSA
TWLWH
TWLQL
TWHQV
TAVWL
TSLWL
TDVWL
TWHAX
TWHSX
TWHDX
Write Pulse Width
Write Disable Time
Write Recovery Time
Address Set-up Time
Chip Select Set-up Time
Data Set-up Time
5
—
—
1
5
—
—
1
—
—
1
—
—
1
ns
3
4
5
5
ns
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
tSC
tSD
tHA
tHC
tHD
0
0
0.5
0.5
1
1
ns
0
0
1
ns
Address Hold Time
Chip Select Hold Time
Data Hold Time
1
1
1
ns
1
1
1
1
ns
1
1
1
1
ns
WRITE CYCLE TIMING DIAGRAM
CS
Address
DIN
t
SD
tHD
WE
t
SA
t
WW
tHC
DOUT
50%
t
SC
t
WS
tWR
6
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
PRODUCT ORDERING CODE
Edge
Rate
Package
Type
Operating
Range
Speed (ns)
Ordering Code
3
SY10/100/101474-3FCF
SY10/100/101474-3MCF
Fast
Fast
F24-1
M28-1
Commercial
Commercial
4
5
SY10/100/101474-4FCF
SY10/100/101474-4MCF
Fast
Fast
F24-1
M28-1
Commercial
Commercial
SY10/100/101474-5FCS
SY10/100/101474-5JCS
SY10/100/101474-5JCSTR
Standard
Standard
Standard
F24-1
J28-1
J28-1
Commercial
Commercial
Commercial
7
SY10/100/101474-7FCS
SY10/100/101474-7JCS
SY10/100/101474-7JCSTR
Standard
Standard
Standard
F24-1
J28-1
J28-1
Commercial
Commercial
Commercial
7
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
24 LEAD CERPACK (F24-1)
8
SY10/100/101474-3
SY10/100/101474-4
SY10/100/101474-5
SY10/100/101474-7
SYNERGY
SEMICONDUCTOR
28 LEAD PLASTIC LEADED CHIP CARRIER (J28-1)
9
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