T24C08A [ETC]

T24C02A;


型号：	T24C08A
厂家：	ETC
描述：	T24C02A
文件：	总14页 (文件大小：340K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Shenzhen First-Rank Technology Co., Ltd

深圳市广

子有限公司

http://www.liveic.cn

http://ghcom.dzsc.com

系人：

,叶

： 0755-82534577,13686868407

系

SPECIFICATION

T24C02A/T24C04A/T24C08A/T24C16A

Version 1.1

reserves the right to change this documentation without prior notice.

Shenzhen First- Rank Technology Co., Ltd

Version: 1.1

Date: 02, Jul. 2007

Page: 1 of 15

▉Pin Descriptions

Table 1: Pin Configuration

Pin Designation

A0 - A2

SDA

Type

I/O & Open-drain

Name and Functions

Address Inputs

Serial Data

SCL

GND

Serial Clock Input

Write Protect

Ground

VCC

Power Supply

No Connect

▉Block Diagram

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▉Pin Descriptions

DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs

that are hard wired for the T24C02A. Eight 2K devices may be addressed on a single bus system

(device addressing is discussed in detail under the Device Addressing section).

The T24C04A uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may

be addressed on a single bus system. The A0 pin is a no connect and can be connected to ground.

The T24C08A only uses the A2 input for hardwire addressing and a total of two 8K devices may be

addressed on a single bus system. The A0 and A1 pins are no connects and can be connected to

ground.

The T24C16A does not use the device address pins, which limits the number of devices on a single

bus to one. The A0, A1 and A2 pins are no connects and can be connected to ground.

SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain

driven and may be wire-ORed with any number of other open-drain or open- collector devices.

SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM

device and negative edge clock data out of each device.

WRITE PROTECT (WP): The T24C02A/T24C04A/T24C08A/T24C16A has a Write Protect pin

that provides hardware data protection. The Write Protect pin allows normal read/write operations

when connected to ground (GND). When the Write Protect pin is connected to VCC, the write

protection feature is enabled and operates as shown in the following Table 2.

Table 2: Write Protect

Part of the Array Protected

WP Pin Status

T24C02A

T24C04A

T24C08A

T24C16A

At VCC

At GND

Full (2K) Array

Full (4K) Array

Full (8K) Array

Full (16K) Array

Normal Read/Write Operations

▉Memory Organization

T24C02A, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K

requires an 8-bit data word address for random word addressing.

T24C04A, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K

requires a 9-bit data word address for random word addressing.

T24C08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K

requires a 10-bit data word address for random word addressing.

T24C16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K

requires an 11-bit data word address for random word addressing.

▉Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device.

Data on the SDA pin may change only during SCL low time periods (see to Figure 1 on page 5). Data

changes during SCL high periods will indicate a start or stop condition as defined below.

START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which

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must precede any other command (see to Figure 2 on page 5).

STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a

read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 2 on

page 5).

ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM

in 8-bit words. The EEPROM sends a "0" to acknowledge that it has received each word. This

happens during the ninth clock cycle.

STANDBY MODE: The T24C02A/T24C04A/T24C08A/T24C16A features a low-power standby

mode which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the

completion of any internal operations.

MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part

can be reset by following these steps:

1. Clock up to 9 cycles.

2. Look for SDA high in each cycle while SCL is high.

3. Create a start condition.

●

Figure 1: Data Validity

Figure 2: Start and Stop Definition

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● Figure 3: Output Acknowledge

▉Device Addressing

The 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device address word following a start

condition to enable the chip for a read or write operation (see to Figure 4 on page 8).

The device address word consists of a mandatory "1", "0" sequence for the first four most significant

bits as shown. This is common to all the Serial EEPROM devices.

The next 3 bits are the A2, A1 and A0 device address bits for the 2K EEPROM. These 3 bits must

compare to their corresponding hardwired input pins.

The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory page

address bit. The two device address bits must compare to their corresponding hardwired input pins.

The A0 pin is no connect.

The 8K EEPROM only uses the A2 device address bit with the next 2 bits being for memory page

addressing. The A2 bit must compare to its corresponding hard-wired input pin. The A1 and A0 pins

are no connect.

The 16K does not use any device address bits but instead the 3 bits are used for memory page

addressing. These page addressing bits on the 4K, 8K and 16K devices should be considered the most

significant bits of the data word address which follows. The A0, A1 and A2 pins are no connect.

The eighth bit of the device address is the read/write operation select bit. A read operation is initiated

if this bit is high and a write operation is initiated if this bit is low.

Upon a compare of the device address, the EEPROM will output a "0". If a compare is not made, the

chip will return to a standby state.

▉Write Operations

BYTE WRITE: A write operation requires an 8-bit data word address following the device address

word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a "0"

and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will

output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence

with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, to the

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nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond

until the write is complete (see Figure 5 on page 7).

PAGE WRITE: The 2K EEPROM is capable of an 8-byte page write, and the 4K, 8K and 16K

devices are capable of 16-byte page writes.

A page write is initiated the same as a byte write, but the microcontroller does not send a stop

condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of

the first data word, the microcontroller can transmit up to seven (2K) or fifteen (4K, 8K, 16K) more

data words. The EEPROM will respond with a "0" after each data word received. The microcontroller

must terminate the page write sequence with a stop condition (see Figure 6 on page 8).

The data word address lower three (2K) or four (4K, 8K, 16K) bits are internally incremented

following the receipt of each data word. The higher data word address bits are not incremented,

retaining the memory page row location. When the word address, internally generated, reaches the

page boundary, the following byte is placed at the beginning of the same page. If more than eight (2K)

or sixteen (4K, 8K, 16K) data words are transmitted to the EEPROM, the data word address will "roll

over" and previous data will be overwritten.

ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the EEPROM

inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition

followed by the device address word. The read/write bit is representative of the operation desired.

Only if the internal write cycle has completed will the EEPROM respond with a "0", allowing the read

or write sequence to continue.

▉Read Operations

Read operations are initiated the same way as write operations with the exception that the read/write

select bit in the device address word is set to "1". There are three read operations: current address read,

random address read and sequential read.

CURRENT ADDRESS READ: The internal data word address counter maintains the last address

accessed during the last read or write operation, incremented by one. This address stays valid between

operations as long as the chip power is maintained. The address "roll over" during read is from the last

byte of the last memory page to the first byte of the first page. The address "roll over" during write is

from the last byte of the current page to the first byte of the same page.

Once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the

EEPROM, the current address data word is serially clocked out. The microcontroller does not respond

with an input "0" but does generate a following stop condition (see Figure 7 on page 8).

RANDOM READ: A random read requires a "dummy" byte write sequence to load in the data word

address. Once the device address word and data word address are clocked in and acknowledged by the

EEPROM, the microcontroller must generate another start condition. The microcontroller now

initiates a current address read by sending a device address with the read/write select bit high. The

EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller

does not respond with a "0" but does generate a following stop condition (see Figure 8 on page 9).

SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random

address read. After the microcontroller receives a data word, it responds with an acknowledge. As

long as the EEPROM receives an acknowledge, it will continue to increment the data word address

and serially clock out sequential data words. When the memory address limit is reached, the data word

address will "roll over" and the sequential read will continue. The sequential read operation is

terminated when the microcontroller does not respond with a "0" but does generate a following stop

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condition (see Figure 9 on page 9).

l Figure 4: Device Address

Figure 5: Byte Write

Figure 6: Page Write

Figure 7: Current Address Read

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Figure 8: Random Read

Figure 9: Sequential Read

▉Electrical Characteristics

Absolute Maximum Stress Ratings

DC Supply Voltage . . . . . . . . . . . . . . . . .-0.3V to +6.5V

Input / Output Voltage . . . . . . . .GND-0.3V to VCC+0.3V

Operating Ambient Temperature . . . . . -40℃ to +85℃

Storage Temperature . . . . . . . . . . . . -65℃ to +150℃

Comments

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this

device. These are stress ratings only. Functional operation of this device at these or any other

conditions above those indicated in the operational sections of this specification is not implied or

intended. Exposure to the absolute maximum rating conditions for extended periods may affect device

reliability.

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▉DC Electrical Characteristics

Applicable over recommended operating range from: TA = -40℃ to +85℃, VCC = +1.8V to +5.5V

(unless otherwise noted)

Parameter

Supply Voltage

Supply Current Vcc=5.0V

Standby Current

Input Leakage Current

Output Leakage Current

Input Low Level

Symbol

Vcc

Icc1

Icc2

ISB

ILI

Min.

1.8

Typ.

Max.

5.5

1.0

3.0

1.0

3.0

Vcc×0.3

Vcc + 0.5

Unit

Condition

0.4

2.0

Read @100KHz

Write @100KHz

Vin=Vcc or GND

Vout=Vcc or GND

ILO

VIL

0.05

-0.6

Input High Level

VIH

Vcc×0.7

Output Low Level Vcc=5.0V

Output Low Level Vcc=3.0V

Output Low Level Vcc=1.8V

VOL3

VOL2

VOL1

0.4

0.2

IOL=3.0mA

IOL=2.1mA

IOL=0.15mA

▉Pin Capacitance

Applicable over recommended operating range from TA = 25℃, f = 1.0 MHz, VCC = +1.8V

Parameter

Input/Output Capacitance (SDA)

Input Capacitance (A0, A1, A2, SCL)

Symbol

CI/O

CIN

Min.

Typ.

Max.

Unit

Condition

VI/O = 0V

VIN = 0V

▉AC Electrical Characteristics

Applicable over recommended operating range from TA = -40℃ to +85℃, VCC = +1.8V to +5.5V,

CL = 1 TTL Gate and 100 pF (unless otherwise noted)

1.8-volt

Typ.

5.0-volt

Typ.

Parameter

Symbol

Units

KHz

Min.

Max.

400

Min.

Max.

1000

Clock Frequency, SCL

Clock Pulse Width Low

Clock Pulse Width High

Noise Suppression Time

Clock Low to Data Out Valid

Time the bus must be free before

a new transmission can start

Start Hold Time

SCL

LOW

HIGH

1.2

0.6

0.4

0.9

0.05

0.55

BUF

HD.STA

SU.STA

HD.DAT

SU.DAT

1.2

0.5

0.6

0.25

Start Setup Time

0.25

Data In Hold Time

Data In Setup Time

Inputs Rise Time(1)

Inputs Fall Time(1)

Stop Setup Time

100

0.3

300

0.3

100

0.25

0.6

SU.STO

Data Out Hold Time

Write Cycle Time

5.0V, 25℃, Byte Mode

Endurance

Write Cycles

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Note

1. This parameter is characterized and is not 100% tested.

2. AC measurement conditions: RL (connects to VCC): 1.3 kΩ (2.5V, 5V), 10 kΩ (1.8V)

Input pulse voltages: 0.3 VCC to 0.7 VCC

Input rise and fall time: ≤50 ns

Input and output timing reference voltages: 0.5 VCC

The value of RL should be concerned according to the actual loading on the user's system.

▉Bus Timing

Figure 10: SCL: Serial Clock, SDA: Serial Data I/O

▉Write Cycle Timing

Figure 11: SCL: Serial Clock, SDA: Serial Data I/O

Note

1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the

internal clear/write cycle.

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▉Ordering Information

Code Number

Part Number

XXX

1.Prefix

2.Series Name

4. Voltage

A=1.8V-5.5V

24:Two-wire(I2C) Interface

3.EEPROM Density

C02=2K bits

C04=4K bits

C08=8K bits

C16=16K bits

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▉Packaging Information

1. SOP

MILLIMETER

SYMBOL

MIN

NOM

MAX

1.77

0.28

1.60

0.75

0.48

0.43

0.26

0.21

5.10

6.20

4.10

－

0.08

1.20

0.55

0.39

0.38

0.21

0.19

4.70

5.80

3.70

0.18

1.40

0.65

－

0.41

－

0.20

4.90

6.00

3.90

1.27BSC

0.50

0.65

0.80

1.05BSC

－

8°

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2. PDIP

MILLIMETER

SYMBOL

MIN

3.60

0.51

3.10

1.50

0.44

0.43

NOM

3.80

－

MAX

4.00

－

3.30

1.60

－

3.50

1.70

0.53

0.48

0.46

1.52BSC

－

0.25

0.24

9.05

6.15

0.31

0.26

9.45

6.55

0.25

9.25

6.35

2.54BSC

7.62BSC

－

7.62

9.50

0.94

－

3.00

－

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com/

3. SOT23-5

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