UCC283TD-5TR [ETC]
Positive Fixed Voltage Regulator ; 正固定电压稳压器\n
| 型号： | UCC283TD-5TR |
| 厂家： | 
ETC |
| 描述： | Positive Fixed Voltage Regulator
|
| 文件： | 总11页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SLUS215A – OCTOBER 1998 – REVISED JUNE 2000
TO–263–3 TD PACKAGE
(FRONT VIEW)
TO–263–5 TD PACKAGE
(FRONT VIEW)
D
D
D
D
Precision Positive Linear Series Pass
Voltage Regulation
5
4
3
2
1
VOUT
0.45 V Dropout at 3 A
3
2
1
VOUT
GND
VIN
ADJ
GND
CT
50 mV Dropout at 10 mA
Quiescent Current Under 650 µA
Irrespective of Load
VIN
D
Adjustable (5-Lead) Output Voltage Version
TO–220–5 T PACKAGE
(FRONT VIEW)
D
Fixed (3-Lead) Versions for 3.3-V and 5-V
Outputs
5
4
3
2
1
VOUT
ADJ
GND
CT
D
D
Logic Shutdown Capability
+
Short-Circuit Power Limit of
(3% × V × I
)
VIN
IN
SHORT
D
Low V
to V Reverse Leakage
OUT IN
D
Thermal Shutdown
TO–220–3 T PACKAGE
(FRONT VIEW)
description
VOUT
GND
VIN
3
2
The UCC283–3/–5/–ADJ family of positive linear
+
series pass voltage regulators are tailored for
low-drop-out applications where low quiescent
power is important. Fabricated with a BiCMOS
technology ideally suited for low input-to-output
differential applications, the UCC283–5 passes
3 A while requiring only 0.45 V of typical input
voltage headroom (ensured 0.6-V dropout).
1
These regulators include reverse voltage sensing that prevents current in the reverse direction. Quiescent
current is always less than 650 µA. These devices have been internally compensated in such a way that the
need for a minimum output capacitor has been eliminated.
UCC283–3 and UCC283–5 versions are in 3-lead packages and have preset outputs at 3.3 V and 5.0 V
respectively. The output voltage is regulated to 1.5% at room temperature. The UCC283–ADJ version, in a
5-lead package, regulates the output voltage programmed by an external resistor ratio.
Short-circuit current is internally limited. The device responds to a sustained overcurrent condition by turning
off after a t
time delay. The device then stays off for a period, t
, that is 32 times the t
delay. The device
ON
OFF
ON
then begins pulsing on and off at the t /(t +t
) duty cycle of 3%. This drastically reduces the power
ON ON OFF
dissipation during short-circuit and means heat sinks need only accommodate normal operation. On the
3-leaded versions of the device t is fixed at 750 µs, on the adjustable 5-leaded versions an external capacitor
ON
sets the on time. The off time is always 32 × t . The external timing control pin, CT, on the 5-leaded versions
ON
also serves as a shutdown input when pulled low.
Internal power dissipation is further controlled with thermal overload protection circuitry. Thermal shutdown
occurs if the junction temperature exceeds 165°C. The chip remains off until the temperature has dropped 20°C.
The UCC283 series is specified for operation over the industrial range of –40°C to 85°C, and the UCC383 series
is specified from 0°C to 70°C. These devices are available in 3- and 5-pin TO–220 and TO–263 power packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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UCC 3 83 - ADJ
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SLUS215A – OCTOBER 1998 – REVISED JUNE 2000
AVAILABLE OPTIONS
PACKAGE DEVICES
OUTPUT VOLTAGE (V)
TO–263–3
TO–263–5
TO–220–3
TO–220–5
T
A
MIN
3.22
TYP
3.3
MAX
3.58
TD
T
UCC283TD–3
UCC283TD–5
—
—
UCC283T–3
UCC283T–5
—
—
—
4.875
5.00
ADJ
3.3
5.125
—
–40°C to 85°C
0°C to 70°C
UCC283TD–ADJ
UCC283T–ADJ
3.22
3.58
UCC383TD–3
UCC383TD–5
—
—
—
UCC383T–3
UCC383T–5
—
—
—
4.875
5.00
ADJ
5.125
UCC383TD–ADJ
UCC383T–ADJ
†
All package types are available taped and reeled. Add TR suffix to device type (e.g. UCC283TD–3TR) to order quantities of 3000 devices per
reel.
functional block diagram
*5 LEADED VERSION ONLY (ADJ)
VIN
VOUT
ADJ*
V
PUMP
CURRENT LIMIT
R2
4 A/ 7 A CURRENT
REFERENCE
+
+
0.65 V
R1
1.25 V
3% DUTY CYCLE
CURRENT LIMIT TIMER
SD/CT*
GND
REVERSE VOLTAGE
SENSE
R2
0
R1
OPEN
50k
UCC283–ADJ
UCC283–3
UCC283–5
UVLO
THERMAL
SHUTDOWN
82k
150k 50k
UDG–98133
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLUS215A – OCTOBER 1998 – REVISED JUNE 2000
electrical characteristics T = 0°C to 70°C for the UCC383–x series, T = –40°C to 85°C for the
A
A
UCC283–x, V
= V
+ 1.5 V, I
= 10 mA, C = 10 F, C
= 22 F. For the UCC283–ADJ, V
VIN
VOUT
OUT
IN
OUT VIN
= 6.5 V, V
= 5.0 V, C = 750 pF, T = T unless otherwise stated
OUT
T
J
A
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
UCC283–5 Fixed 5 V, 3 A Family
T = 25°C
4.925
4.875
5
2
5.075
5.125
10
V
V
J
Output voltage
Over temperature
Line regulation
Load regulation
V
= 5.15 V to 9 V
= 10 mA to 3 A
mV
mV
V
VIN
OUT
OUT
OUT
OUT
I
I
I
I
10
0.4
0.2
50
20
= 3 A,
V
= 4.85 V
= 4.85 V
= 4.85 V
0.6
OUT
OUT
OUT
= 1.5 A,
= 10 mA,
V
V
0.45
150
10
V
Dropout voltage, V
Peak current limit
= V
– V
VOUT
DROPOUT
VIN
mV
A
V
= 0 V
4
3
7
VOUT
Overcurrent threshold
Current limit duty cycle
4
5.5
A
V
V
= 0 V
= 0 V
3%
750
400
5%
VOUT
Overcurrent time out, t
Quiescent current
400
1400
650
µs
ON
VOUT
No load
1 V < V
µA
< V
,
VIN
≤ 5.1 V, at V
VOUT
Reverse leakage current
30
75
3
µA
V
VOUT
VOUT
Undervoltage lockout
VIN where VOUT passes current
2.5
2.8
V
UCC283–3 Fixed 3.3 V, 3 A Family
T = 25°C
3.25
3.22
3.3
3.35
3.38
7
V
V
J
Output voltage
Over temperature
Line regulation voltage
Load regulation voltage
V
= 3.45 V to 9 V
= 10 mA to 3 A
= 3A,
2
7
mV
mV
V
VIN
OUT
OUT
OUT
OUT
I
I
I
I
15
VOUT = 3.15 V
VOUT = 3.15 V
VOUT = 3.15 V
0.5
0.25
50
1
= 1.5A,
0.6
150
10
V
Dropout voltage, V
Peak current limit
= V
VIN
– V
VOUT
DROPOUT
= 10mA,
mV
A
V
= 0 V
4
3
7
VOUT
Overcurrent threshold
Current limit duty cycle
4
5.5
5%
1400
650
A
V
V
= 0 V
= 0 V
3%
750
400
VOUT
Overcurrent time out, t
400
µs
ON
VOUT
Quiescent current
No load
1 V < V
µA
< V
,
VIN
≤ 3.35 V at V
VOUT
Reverse leakage current
Undervoltage lockout
30
75
3
µA
V
VOUT
VOUT
VIN where VOUT passes current
2.5
2.8
V
3
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SLUS215A – OCTOBER 1998 – REVISED JUNE 2000
electrical characteristics T = 0°C to 70°C for the UCC383–x series, T = –40°C to 85°C for the
A
A
UCC283–x, V
= V
+ 1.5 V, I
= 10 mA, C = 10 F, C
= 22 F. For the UCC283–ADJ, V
VIN
VOUT
OUT
IN
OUT VIN
= 6.5 V, V
= 5.0 V, C = 750 pF, T = T unless otherwise stated
OUT
T J A
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
UCC283–ADJ Adjustable Output, 3 A Family
TJ = 25°C
Over temperature
1.23
1.25
1.27
1.28
3
V
V
Regulating voltage at ADJ pin
1.22
Line regulation voltage, at ADJ input
Load regulation voltage, at ADJ input
V
= V
+ 150 mV to 9 V
= 10 mA to 3 A
1
2
mV
mV
V
VIN
VOUT
I
5
OUT
V
V
V
V
= 4.85 V,
= 4.85 V,
= 4.85 V,
I
I
I
= 3 A
0.4
0.2
50
7
0.6
0.45
150
10
OUT
OUT
OUT
VOUT
OUT
OUT
OUT
= 1.5 A
= 10 mA
V
Dropout voltage, V
Peak current limit
= VIN – VOUT
DROPOUT
mV
A
= 0 V
4
3
Overcurrent threshold
Current limit duty cycle
4
5.5
5
A
V
V
= 0 V
= 0 V
3
%
VOUT
Overcurrent time out, t
ON
300
575
1200
µs
VOUT
1 V < V
VIN
VOUT
< V
VOUT
Reverse leakage current
30
100
µA
V
≤ 9 V, at V
VOUT
Bias current at ADJ input
Quiescent current
20
400
0.65
40
250
650
nA
µA
V
No load
At CT input
= 9 V
Shutdown threshold
Quiescent current in shutdown
UVLO
0.25
2.5
V
75
3
µA
V
VIN
VIN where VOUT passes current
2.8
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Input voltage
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 V
CT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 3 V
ADJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 9 V
Storage Temperature, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
J
Junction Temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Lead Temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
4
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pin descriptions
ADJ: Adjust pin for the UCC283–ADJ version only. Feedback pin for the linear regulator. Program the output
voltage with R1 connected from ADJ to GND and R2 connected from VOUT to ADJ. Output voltage is given
by:
(
R1
)
1.25 V R1 ) R2
V
+
OUT
CT: Short-circuit timing capacitor and shutdown input for the UCC283–ADJ version. Pulling CT below 0.25 V
turns off the regulator and places it in a low quiescent-current mode. A timing capacitor, C, from CT to GND
programs the duration of the pulsed short-circuit on-time. On-time, t , is approximately given by:
ON
t
+ 750 k C
ON
GND: Reference ground.
VIN: Input voltage, This pin must be bypassed with a low ESL/ESR 1-µF or larger capacitor to GND. VIN can
range from (VOUT + V
from VOUT to VIN is less than 75µA.
) to 9 V. If VIN is reduced to zero while VOUT is held high, the reverse leakage
DROPOUT
VOUT: Regulated output voltage. A bypass capacitor is not required at VOUT, but may be desired for good
transient response. The bypass capacitor must not exceed a maximum value in order to insure the regulator
can start.
APPLICATION INFORMATION
overview
The UCC383 family of low dropout linear (LDO) regulators provide a regulated output voltage for applications
with up to 3 A of load current. The regulators feature a low dropout voltage and short-circuit protection, making
their use ideal for demanding high-current applications requiring fault protection.
short-circuit-protection
The UCC383 provides unique short-circuit protection circuitry that reduces power dissipation during a fault.
When an overload situation is detected, the device enters a pulsed mode of operation at 3% duty cycle reducing
the heat sink requirements during a fault. The UCC383 has two current thresholds that determine its behavior
during a fault as shown in Figure 1. When the regulator current exceeds the overcurrent threshold for a period
longer than t , the UCC383 shuts off for a period (t
) which is 32 × t . During an overload, the regulator
ON
OFF
ON
actively limits the maximum current to the peak current limit value. The peak current limit is nominally 3 A
greater than the overcurrent threshold. The regulator continues in pulsed mode until the fault is cleared as
illustrated in Figure 1.
5
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UCC 3 83 - ADJ
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SLUS215A – OCTOBER 1998 – REVISED JUNE 2000
APPLICATION INFORMATION
PEAK
CURRENT
OVERLOAD
LIMIT
OUTPUT
CURRENT
OVER–
CURRENT
THRESHOLD
IO (NOM)
V
(NOM)
O
R
I
OLCL
OUTPUT
VOLTAGE
T
32 T
ON
T
32 T
ON
T
ON
32 T
ON
ON
ON
Figure 1. UCC383 Short-Circuit Timing
A capacitive load on the regulator’s output appears as a short-circuit during start-up. If the capacitance is too
large, the output voltage does not come into regulation during the initial t period and the UCC383 enters
ON
pulsed mode operation. The peak current limit, t
period, and load characteristics determine the maximum
ON
value of output capacitor that can be charged. For a constant current load the maximum output capacitance is
given as follows:
t
ON
+ ǒICL
Ǔ
C
* I
Farads
OUT(max)
LOAD
V
OUT
(1)
For worst case calculations, the minimum values of on time (t ) and peak current limit (I ) should be used.
ON
CL
The adjustable version allows the t
time to be adjusted with a capacitor on the CT pin:
ON
( )
+ 750, 000 C m Farad microseconds
t
ON(adj)
For a resistive load (R
(2)
) the maximum output capacitor can be estimated from:
LOAD
t
ON(sec)
Farads
C
+
OUT(max)
ȡ
ȏn
ȧ
ȣ
1
R
ȧ
LOAD
VOUT
R
1*
I
Ȣ
LOADȤ
CL
(3)
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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APPLICATION INFORMATION
dropout performance
Referring to the Block Diagram, the dropout voltage of the UCC383 is equal to the minimum voltage drop (V
IN
to V
) across the N-channel MOSFET. The dropout voltage is dependent on operating conditions such as
OUT
load current, input and load voltages, as well as temperature. The UCC383 achieves a low Rds(on) through the
use of an internal charge-pump (V ) that drives the MOSFET gate. Figure 2 depicts typical dropout voltages
PUMP
versus load current for the 3.3-V and 5-V versions of the part, as well as the adjustable version programmed
to 3.0 V.
Figure 3 depicts the typical dropout performance of the adjustable version with various output voltages and load
currents.
Operating temperatures also affect the Rds(on) and dropout voltage of the UCC383. Figure 4 graphs the typical
dropout for the 3.3-V and 5-V versions with a 3-A load over temperature.
TYPICAL DROPOUT VOLTAGE
TYPICAL DROPOUT VOLTAGE
vs.
vs.
LOAD CURRENT
I
AND V
OUT
OUT
0.5
0.4
0.3
0.2
0.1
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
V
OUT
= 3.3 V
V
OUT
= 3 V
I
= 3 A
OUT
V
OUT
= 5 V
I
= 1.5 A
OUT
I
= 1 A
OUT
0
0
1
1.5
2
2.5
3
3
3.5
4
4.5
5
I
(A)
V
(V)
OUT
OUT
Figure 2
Figure 3
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APPLICATION INFORMATION
voltage programming and shutdown feature for adjustable version
A typical application circuit based on the UCC383 adjustable version is shown in Figure 5. The output voltage
is externally programmed through a resistive divider at the ADJ pin.
TYPICAL DROPOUT VOLTAGE
vs.
CASE TEMPERATURE WITH A 3-A LOAD
0.6
0.5
V
= 3.3 V
OUT
0.4
0.3
0.2
V
= 5 V
OUT
–40
10
60
Temperature ( C)
Figure 4
ǒ
R2Ǔ
Volts
V
+ 1.25 1 )
OUT
R1
(4)
The maximum programmed output voltage is constrained by the 9-V absolute rating of the IC (this includes the
charge pump voltage) and its ability to enhance the N-channel MOSFET. Unless the load current is below the
3-A rating of the device, output voltages above 7 V are not recommended. The minimum output voltage can
be programmed down to 1.25 V. However, the input voltage must always be greater than the UVLO of the part.
The adjustable version includes a shutdown feature, limiting quiescent current to 40 µA typical. The UCC383
is shut down by pulling the CT pin to below 0.25 V. As shown in Figure 5, a small logic level MOSFET or BJT
transistor in parallel with the timing capacitor can be driven with a digital signal, putting the device in shutdown.
If the CT pin is not pulled low, the IC internally pulls up the pin enabling the regulator. The CT pin should not
be forced high, as this interferes with the short-circuit-protection feature. Selection of the timing capacitor is
explained in Short-Circuit-Protection.
The adjustable version can be used in applications requiring remote voltage sensing (i.e. monitoring a voltage
other than or not directly tied to the VOUT pin). This is possible since the inverting input of the error-voltage
amplifier (see Block Diagram) is brought out to the ADJ pin.
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APPLICATION INFORMATION
thermal design
The Package Information section of the Power Supply Control Products Data Book, Volume 3 (Literature
No. SLUD003) contains reference material for the thermal ratings of various packages. The section also
includes an excellent article Thermal Characteristics of Surface Mount Packages, that is the basis of the
following discussion.
Thermal design for the UCC383 family of linear regulators includes two modes of operation, normal and pulsed
mode. In normal operation, the linear regulator and heat sink must dissipate power equal to the maximum
forward voltage drop multiplied by the maximum load current. Assuming a constant current load, the expected
heat rise at the regulator’s junction can be calculated as follows:
°C
ǒq caǓ
) q
t
(q) + P
RISE
DISS
jc
(5)
Where theta, (θ) is thermal resistance and P
is the power dissipated. The thermal resistance of both the
DISS
TO–220 and TO–263 packages (junction to case) is 3°C per Watt. In order to prevent the regulator from going
into thermal shutdown, the case to ambient theta must keep the junction temperature below 150°C. If the LDO
is mounted on a 5-square inch pad of 1-ounce copper, for example, the thermal resistance from junction to
ambient becomes 60°C per Watt. If a lower thermal resistance is required by the application, the device heat
sinking would need to be improved.
When the UCC383 regulator is in pulsed mode due to an overload or short-circuit in the application, the
maximum average power dissipation is calculated as follows:
t
ON
+ ǒVIN
Ǔ
I
P
* V
Watts
PULSE(avg)
OUT
CL
33 t
ON
(6)
As seen in Equation 6, the average power during a fault is reduced dramatically by the duty cycle, allowing the
heat sink to be sized for normal operation. Although the peak power in the regulator during the t period can
ON
be significant, the thermal mass of the package generally keeps the junction temperature from rising unless the
period is increased to tens of milliseconds.
t
ON
ripple rejection
Even though the UCC383 family of linear regulators are not optimized for fast transient applications (Refer to
the UC182 Fast LDO Linear Regulator), they do offer significant power supply rejection at lower frequencies.
Figure 6 depicts ripple rejection performance in a typical application. The performance can be improved with
additional filtering.
9
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APPLICATION INFORMATION
UCC383–ADJ
VIN
VOUT
5
4
1
2
V
INPUT
10µF
10µF
R
LOAD
R2
R1
CT
ADJ
SHUTDOWN
GND
3
Figure 5. Typical Application for 5-Pin Adjustable Version
Figure 6. Ripple Rejection vs. Frequency
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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Copyright 2000, Texas Instruments Incorporated
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