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UT621024(E) [ETC]

ASYNCHRONOUS STATIC RAM- High Speed ; 异步静态RAM-高速\n
UT621024(E)
型号： UT621024(E)
厂家： ETC    ETC
描述：

ASYNCHRONOUS STATIC RAM- High Speed
异步静态RAM-高速\n
文件： 总14页 (文件大小：110K)
中文：  中文翻译
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UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
REVISION HISTORY  
REVISION  
DESCRIPTION  
DATE  
Rev. 0.9  
Rev. 1.0  
Original.  
1. The Operating Temperature is revised from Industrial temperature to  
Jan.2001  
Jun 18,2001  
： ℃ ℃  
Extended temperature -20 ~80  
2. The symbols CE1#,OE# and WE# are revised as  
Add order information for lead free product  
,
and  
CE1 OE WE  
Rev. 1.1  
May 15,2003  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
1
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
GENERAL DESCRIPTION  
Rev. 1.1  
FEATURES  
The UT621024(E) is a 1,048,576-bit low power  
CMOS static random access memory organized as  
131,072 words by 8 bits. It is fabricated using high  
performance, high reliability CMOS technology.  
Access time : 35/55/70ns (max.)  
ꢀ
Low power consumption :  
ꢀ
Operating : 60/50/40 mA (typical)  
Standby : 2µA (typical) L-version  
1µA (typical) LL-version  
The UT621024(E) is designed for low power  
application. It is particularly well suited for battery  
back-up nonvolatile memory application.  
Single 5V power supply  
ꢀ
All inputs and outputs TTL compatible  
ꢀ
Fully static operation  
Three state outputs  
Data retention voltage : 2V (min.)  
OperatingTemperature :  
ꢀ
The UT621024(E) operates from a single 5V power  
supply and all inputs and outputs are fully TTL  
compatible.  
ꢀ
ꢀ
ꢀ
℃ ℃  
Extended : -20 ~80  
Package : 32-pin 600 mil PDIP  
32-pin 450 mil SOP  
ꢀ
PIN CONFIGURATION  
32-pin 8mmx20mm TSOP-1  
32-pin 8mmx13.4mm STSOP  
NC  
Vcc  
A15  
1
2
32  
A16  
31  
30  
29  
CE2  
A14  
A12  
3
FUNCTIONAL BLOCK DIAGRAM  
4
WE  
A13  
A8  
5
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A7  
A6  
6
1024 X 1024  
MEMORY  
ARRAY  
A5  
A4  
A9  
7
A0-A16  
DECODER  
A11  
8
A3  
9
OE  
A2  
A10  
10  
11  
Vcc  
Vss  
A1  
CE  
A0  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
12  
13  
14  
15  
16  
I/O1  
I/O2  
I/O3  
Vss  
I/O DATA  
CIRCUIT  
I/O1-I/O8  
COLUMN I/O  
PDIP / SOP  
A11  
A9  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
OE  
A10  
CE  
A8  
CE  
3
CE2  
OE  
CONTROL  
CIRCUIT  
A13  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
Vss  
I/O3  
I/O2  
I/O1  
A0  
4
5
WE  
CE2  
WE  
6
A15  
Vcc  
NC  
A16  
A14  
A12  
A7  
7
8
UT621024(E)  
PIN DESCRIPTION  
9
10  
11  
12  
13  
14  
15  
16  
SYMBOL  
A0 - A16  
I/O1 - I/O8  
DESCRIPTION  
Address Inputs  
Data Inputs/Outputs  
Chip enable 1,2 Inputs  
A6  
A1  
A2  
A3  
A5  
,CE2  
CE  
A4  
Write Enable Input  
Output Enable Input  
WE  
OE  
TSOP-I/STSOP  
VCC  
VSS  
NC  
Power Supply  
Ground  
No Connection  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
2
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
ABSOLUTE MAXIMUM RATINGS*  
PARAMETER  
Terminal Voltage with Respect to Vss  
Operating Temperature  
SYMBOL  
VTERM  
TA  
RATING  
-0.5 to +7.0  
-20 to +80  
UNIT  
V
℃
Extended  
Storage Temperature  
TSTG  
-65 to +150  
℃
Power Dissipation  
DC Output Current  
Soldering Temperature (under 10 sec)  
PD  
IOUT  
Tsolder  
1
50  
260  
W
mA  
℃
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this  
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.  
TRUTH TABLE  
MODE  
I/O OPERATION SUPPLY CURRENT  
CE  
CE2  
WE  
OE  
X
X
H
L
Standby  
Standby  
Output Disable  
Read  
H
X
L
L
L
X
L
H
H
H
X
X
H
H
L
High - Z  
High -Z  
High - Z  
DOUT  
ISB,ISB1  
ISB,ISB1  
ICC  
ICC  
Write  
X
DIN  
ICC  
Note: H = VIH, L=VIL, X = Don't care.  
±
℃
℃
DC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, TA = -20 to 80 )  
PARAMETER  
SYMBOL TEST CONDITION  
MIN.  
2.2  
- 0.5  
- 1  
TYP.  
MAX.  
VCC+0.5  
0.8  
UNIT  
V
V
*1  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
VIH  
-
-
-
*2  
VIL  
IIL  
≦ ≦  
VSS VIN VCC  
A
µ
1
Output Leakage Current IOL  
≦ ≦  
VSS VI/O VCC  
=VIH or CE2 = VIL or  
A
µ
CE  
- 1  
-
1
= VIH or  
= VIL  
OE  
WE  
Output High Voltage  
Output Low Voltage  
Average Operating  
Power Supply Courrent  
VOH  
VOL  
ICC  
IOH = - 1mA  
IOL= 4mA  
Min.Cycle, 100% Duty,  
2.4  
-
-
-
-
V
V
0.4  
-35  
-55  
-70  
-
-
-
60  
50  
40  
100  
85  
mA  
mA  
mA  
=VIL, CE2 = VIH,  
CE  
II/O = 0mA  
70  
ICC1  
Cycle time = 1 s, 100% Duty,  
µ
-
-
-
-
10  
3
mA  
mA  
≦
≧
.
I
0.2V,CE2 VCC-0.2V,  
CE  
I/O = 0Ma  
Standby Power  
Supply Current  
ISB  
=VIH or CE2 = VIL  
CE  
ISB1  
200  
40*4  
100  
15*4  
≧
VCC-0.2V or  
CE  
- L  
-
-
2
1
A
µ
≦
.CE2 0.2V  
A
µ
- LL  
Notes:  
1. Overshoot : Vcc+2.0v for pulse width less than 10ns.  
2. Undershoot : Vss-2.0v for pulse width less than 10ns.  
3. Overshoot and Undershoot are sampled, not 100% tested.  
4. Those parameters are for reference only under 50  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
3
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
℃
CAPACITANCE (T =25 , f=1.0MHz)  
A
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
Note : These parameters are guaranteed by device characterization, but not production tested.  
SYMBOL  
MIN.  
MAX.  
8
10  
UNIT  
pF  
pF  
CIN  
CI/O  
-
-
AC TEST CONDITIONS  
Input Pulse Levels  
0V to 3.0V  
5ns  
1.5V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
CL=100pF, IOH/IOL=-1mA/4mA  
±
℃
℃
AC ELECTRICAL CHARACTERISTICS (VCC = 5V 10% , TA = -20 to 80 )  
(1) READ CYCLE  
PARAMETER  
SYMBOL  
UT621024(E)  
-35  
UT621024(E) UT621024(E) UNIT  
-55  
-70  
MIN.  
MAX.  
MIN.  
MAX.  
MIN. MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z tOLZ  
Chip Disable to Output in High-Z tCHZ  
Output Disable to Output in High-Z tOHZ  
Output Hold from Address Change tOH  
tRC  
tAA  
tACE  
tOE  
tCLZ  
35  
-
-
-
55  
-
-
-
70  
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
35  
35  
25  
-
55  
55  
30  
-
70  
70  
35  
-
-
-
-
*
*
*
*
10  
5
-
-
5
10  
5
-
-
5
10  
5
-
-
5
-
-
-
25  
25  
-
30  
30  
-
35  
35  
-
(2) WRITE CYCLE  
PARAMETER  
SYMBOL UT621024(E)  
-35  
UT621024(E) UT621024(E) UNIT  
-55  
-70  
MIN.  
35  
30  
30  
0
25  
0
20  
0
MAX.  
MIN.  
55  
50  
50  
0
40  
0
25  
0
MAX.  
MIN. MAX.  
Write Cycle Time  
tWC  
tAW  
tCW  
tAS  
tWP  
tWR  
tDW  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
70  
60  
60  
0
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write-Time tDH  
Output Active from End of Write  
Write to Output in High-Z  
-
45  
0
-
-
30  
0
-
-
tOW  
tWHZ  
*
*
5
-
5
-
5
-
15  
20  
-
25  
*These parameters are guaranteed by device characterization, but not production tested.  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
4
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled)  
(1,2)  
tRC  
Address  
tAA  
tOH  
tOH  
Previous data valid  
Dout  
Data Valid  
READ CYCLE 2 (  
and CE2 and  
Controlled)  
tRC  
(1,3,4,5)  
CE  
OE  
Address  
CE  
tAA  
tACE  
CE2  
OE  
tCHZ  
tOHZ  
tOH  
tOE  
tCLZ  
tOLZ  
Dout  
High-Z  
High-Z  
Data Valid  
Notes :  
1.  
is high for read cycle.  
WE  
2.Device is continuously selected  
=low,  
=low, CE2=high.  
CE  
OE  
3.Address must be valid prior to or coincident with  
=low, CE2=high; otherwise tAA is the limiting parameter.  
CE  
±
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL=5pF. Transition is measured 500mV from steady state.  
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ  
.
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
5
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
WRITE CYCLE 1 (  
Controlled)  
(1,2,3,5,6)  
WE  
tWC  
Address  
CE  
tAW  
tCW  
CE2  
tAS  
tWP  
tWR  
WE  
tWHZ  
(4)  
tOW  
High-Z  
Dout  
Din  
(4)  
tDW  
tDH  
Data Valid  
WRITE CYCLE 2 (  
and CE2 Controlled)  
(1,2,5,6)  
CE  
tWC  
Address  
tAW  
CE  
tWR  
tAS  
tCW  
CE2  
WE  
tWP  
tWHZ  
High-Z  
(4)  
Dout  
Din  
tDW  
tDH  
Data Valid  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
6
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
Notes :  
1.  
,
must be high or CE2 must be low during all address transitions.  
WE CE  
2.A write occurs during the overlap of a low  
, high CE2, low  
.
WE  
CE  
3. During a  
controlled write cycle with  
OE  
low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be  
WE  
placed on the bus.  
4.During this period, I/O pins are in the output state, and input signals must not be applied.  
5. If the low transition and CE2 high transition occurs simultaneously with or after low transition, the outputs remain in a high  
CE  
impedance state.  
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.  
WE  
±
℃
℃
DATA RETENTION CHARACTERISTICS (TA = -20 to +80 )  
PARAMETER  
Vcc for Data Retention  
SYMBOL TEST CONDITION  
VDR  
MIN.  
2.0  
TYP.  
-
MAX.  
-
UNIT  
V
≧
VCC-0.2V or  
CE  
CE2 ≤ 0.2V  
Data Retention Current  
IDR  
Vcc=3V  
- L  
-
-
80  
20*  
40  
µA  
µA  
1
- LL  
≧
V
CC-0.2V or  
CE  
0.5  
10*  
-
CE2 ≤ 0.2V  
See Data Retention  
Waveforms (below)  
Chip Disable to Data  
Retention Time  
Recovery Time  
tCDR  
tR  
0
-
-
ns  
ns  
tRC*  
-
tRC* = Read Cycle Time  
℃
*Those parameters are for reference only under 50  
DATA RETENTION WAVEFORM  
Low Vcc Data Retention Waveform (1) (  
controlled)  
CE  
≧
VDR 2V  
VCC  
Vcc(min.)  
Vcc(min.)  
tCDR  
tR  
≧
CE  
VCC-0.2V  
VIH  
VIH  
CE  
Low Vcc Data Retention Waveform (2) (CE2 controlled)  
≧
VDR 2V  
VCC  
VCC(min.)  
VCC(min.)  
t
CDR  
t
R
≦
CE2  
0.2V  
CE2  
VIL  
VIL  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
7
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
PACKAGE OUTLINE DIMENSION  
32 PIN 600 mil PDIP Package Outline Dimension  
UNIT  
INCH(BASE)  
0.010(MIN)  
MM(REF)  
SYMBOL  
A1  
A2  
B
0.254(MIN)  
±
±
3.810 0.127  
±
0.457 0.127  
0.150 0.005  
±
0.018 0.005  
±
±
41.910 0.127  
D
1.650 0.005  
±
±
15.240 0.254  
E
0.600 0.010  
±
±
E1  
e
0.544 0.004  
13.818 0.102  
0.100 (TYP)  
2.540 (TYP)  
±
±
16.256 0.508  
±
3.302 0.254  
eB  
L
0.640 0.020  
±
0.130 0.010  
±
±
1.905 0.254  
S
0.075 0.010  
±
±
1.778 0.127  
Q1  
0.070 0.005  
NOTE:  
1. D/E1/S dimension do not include mold flash.  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
8
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
32 pin 450mil SOP Package Outline Dimension  
UNIT  
INCH(BASE)  
MM(REF)  
SYMBOL  
A
A1  
A2  
b
D
E
0.118 (MAX)  
0.004 (MIN)  
0.111 (MAX)  
0.016 (TYP)  
0.817 (MAX)  
2.997 (MAX)  
0.102 (MIN)  
2.82 (MAX)  
0.406 (TYP)  
20.75 (MAX)  
±
±
11.303 0.127  
0.445 0.005  
±
±
E1  
e
0.555 0.012  
14.097 0.305  
0.050 (TYP)  
1.270 (TYP)  
±
±
0.881 0.203  
L
0.0347 0.008  
±
±
L1  
S
y
Θ
0.055 0.008  
1.397 0.203  
0.026 (MAX)  
0.004 (MAX)  
0o ~10o  
0.660 (MAX)  
0.101 (MAX)  
0o ~10o  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
9
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
32 pin TSOP-I Package Outline Dimension  
HD  
C
L
1
32  
16  
17  
y
Seating Plane  
"A"  
D
17  
16  
GAUGE PLANE  
SEATING PLANE  
32  
1
"A" DETAIL VIEW  
L1  
UNIT  
INCH(BASE)  
0.047 (MAX)  
MM(REF)  
SYMBOL  
A
1.20 (MAX)  
±
±
0.10 0.05  
A1  
A2  
0.004 0.002  
±
±
0.039 0.002  
1.00 0.05  
0.008 + 0.002  
- 0.001  
0.20 + 0.05  
-0.03  
b
±
±
18.40 0.10  
D
E
0.724 0.004  
±
±
0.315 0.004  
8.00 0.10  
e
0.020 (TYP)  
0.50 (TYP)  
±
±
20.00 0.20  
HD  
L1  
y
0.787 0.008  
±
±
0.0315 0.004  
0.80 0.10  
0.003 (MAX)  
0.076 (MAX)  
o
o
Θ
∼
∼
0
5o  
0
5o  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
10  
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
32 pin 8mm x 13.4mm STSOP Package Outline Dimension  
HD  
c
L
32  
1
17  
16  
"A"  
y
Seating Plane  
D
16  
17  
GAUGE PLANE  
0
SEATING PLANE  
L1  
"A" DATAIL VIEW  
1
32  
UNIT  
INCH(BASE)  
0.047 (MAX)  
MM(REF)  
SYMBOL  
A
A1  
A2  
b
1.20 (MAX)  
±
±
0.10 0.05  
±
1.00 0.05  
±
0.200 0.025  
0.004 0.002  
±
0.039 0.002  
±
0.008 0.001  
±
±
11.800 0.100  
D
0.465 0.004  
±
±
E
0.315 0.004  
8.000 0.100  
e
0.020 (TYP)  
0.50 (TYP)  
±
±
13.40 0.20.  
HD  
L1  
y
0.528 0.008  
±
±
0.0315 0.004  
0.80 0.10  
0.003 (MAX)  
0.076 (MAX)  
o
o
Θ
∼
∼
0
5o  
0
5o  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
11  
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
ORDERING INFORMATION  
PART NO.  
ACCESS TIME  
STANDBY CURRENT  
PACKAGE  
32 PIN PDIP  
32 PIN PDIP  
32 PIN SOP  
(ns)  
35  
35  
35  
35  
35  
35  
35  
35  
55  
55  
55  
55  
55  
55  
55  
55  
70  
70  
70  
70  
70  
70  
70  
70  
(µA)  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
UT621024PC-35LE  
UT621024PC-35LLE  
UT621024SC-35LE  
UT621024SC-35LLE  
UT621024LC-35LE  
UT621024LC-35LLE  
UT621024LS-35LE  
UT621024LS-35LLE  
UT621024PC-55LE  
UT621024PC-55LLE  
UT621024SC-55LE  
UT621024SC-55LLE  
UT621024LC-55LE  
UT621024LC-55LLE  
UT621024LS-55LE  
UT621024LS-55LLE  
UT621024PC-70LE  
UT621024PC-70LLE  
UT621024SC-70LE  
UT621024SC-70LLE  
UT621024LC-70LE  
UT621024LC-70LLE  
UT621024LS-70LE  
UT621024LS-70LLE  
32 PIN SOP  
32 PIN TSOP-I  
32 PIN TSOP-I  
32 PIN STSOP  
32 PIN STSOP  
32 PIN PDIP  
32 PIN PDIP  
32 PIN SOP  
32 PIN SOP  
32 PIN TSOP-I  
32 PIN TSOP-I  
32 PIN STSOP  
32 PIN STSOP  
32 PIN PDIP  
32 PIN PDIP  
32 PIN SOP  
32 PIN SOP  
32 PIN TSOP-I  
32 PIN TSOP-I  
32 PIN STSOP  
32 PIN STSOP  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
12  
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
ORDERING INFORMATION (for lead free product)  
PART NO.  
ACCESS TIME  
STANDBY CURRENT  
PACKAGE  
32 PIN PDIP  
32 PIN PDIP  
32 PIN SOP  
(ns)  
35  
35  
35  
35  
35  
35  
35  
35  
55  
55  
55  
55  
55  
55  
55  
55  
70  
70  
70  
70  
70  
70  
70  
70  
(µA)  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
200  
100  
UT621024PCL-35LE  
UT621024PCL-35LLE  
UT621024SCL-35LE  
UT621024SCL-35LLE  
UT621024LCL-35LE  
UT621024LCL-35LLE  
UT621024LSL-35LE  
UT621024LSL-35LLE  
UT621024PCL-55LE  
UT621024PCL-55LLE  
UT621024SCL-55LE  
UT621024SCL-55LLE  
UT621024LCL-55LE  
UT621024LCL-55LLE  
UT621024LSL-55LE  
UT621024LSL-55LLE  
UT621024PCL-70LE  
UT621024PCL-70LLE  
UT621024SCL-70LE  
UT621024SCL-70LLE  
UT621024LCL-70LE  
UT621024LCL-70LLE  
UT621024LSL-70LE  
UT621024LSL-70LLE  
32 PIN SOP  
32 PIN TSOP-I  
32 PIN TSOP-I  
32 PIN STSOP  
32 PIN STSOP  
32 PIN PDIP  
32 PIN PDIP  
32 PIN SOP  
32 PIN SOP  
32 PIN TSOP-I  
32 PIN TSOP-I  
32 PIN STSOP  
32 PIN STSOP  
32 PIN PDIP  
32 PIN PDIP  
32 PIN SOP  
32 PIN SOP  
32 PIN TSOP-I  
32 PIN TSOP-I  
32 PIN STSOP  
32 PIN STSOP  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
13  
UTRON  
UT621024(E)  
128K X 8 BIT LOW POWER CMOS SRAM  
Rev. 1.1  
THIS PAGE IS LEFT BLANK INTENTIONALLY.  
UTRON TECHNOLOGY INC.  
P80037  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
14  

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UT621024LC-35L

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