W-1/2 [ETC]
Fuse ; 保险丝\n型号: | W-1/2 |
厂家: | ETC |
描述: | Fuse
|
文件: | 总18页 (文件大小:211K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Preliminary W81181D/AD
USB HUB CONTROLLER
W81181D/AD
USB HUB Controller
Publication Release Date: October 1999
Revision A1
- 1 -
Preliminary W81181D/AD
W81181D Data Sheet Revision History
Pages
Dates
Version Version
on Web
Main Contents
1
2
N.A.
10/01/98
3/15/99
0.50
0.60
0.61
0.62
0.63
0.64
0.65
0.66
N.A.
First published.
Add pin configuration and pin description
Modify pin configuration & pin description
Modify reference schematic
3
3/30/99
4
5/4/99
5
5/13/99
Modify pin 12 description
6
5/26/1999
7/09/1999
7/12/1999
Modify feature HUB spec Rev 1.1
Add 48 MHz clock input pinout
7
8
Modify 48 MHz (W81181AD) Schematic
9
10
Please note that all data and specifications are subject to change without notice. All the trade
marks of products and companies mentioned in this data sheet belong to their respective
owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where
malfunction of these products can reasonably be expected to result in personal injury.
Winbond customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Winbond for any damages resulting from such
improper use or sales.
- 2 -
Preliminary W81181D/AD
Table of Contents-
1. GENERAL DESCRIPTION....................................................................................................................... 4
2. FEATURES................................................................................................................................................ 4
3. USB BLOCK DIAGRAM .......................................................................................................................... 5
4. PIN CONFIGURATION............................................................................................................................. 6
W81181D (12 MHZ CLOCK INPUT) ............................................................................................................. 6
W81181AD (48 MHZ CLOCK INPUT)...........................................................................................................7
5. PIN DESCRIPTION...................................................................................................................................8
W81181D:................................................................................................................................................... 8
W81181AD:..............................................................................................................................................10
IO TYPE: ..................................................................................................................................................12
6. ABSOLUTE MAXIMUM RATINGS........................................................................................................12
7. ELECTRICAL CHARACTERISTICS.....................................................................................................13
8. TYPICAL APPLICATION .......................................................................................................................15
W81181D:.................................................................................................................................................15
W81181AD:..............................................................................................................................................16
10. PACKAGE DIMENSIONS....................................................................................................................18
Publication Release Date: October 1999
- 3 -
Revision A1
Preliminary W81181D/AD
1. GENERAL DESCRIPTION
W81181D, an high integrated 4 port USB hub controller which integrates a microcontroller,
implements a medium speed (12 MHz) and slow speed (1.5 MHz) Universal Serial Bus (USB) hub
control interface. It supports one upstream, four downstream ports and a serial interface. W81181D
can be act as multifunction USB device. For example, the whole system can be designed as an USB
HUB plus an USB mouse or an USB HUB plus an IR receiver, and no down stream port be occupied
as well as no other component needed.
W81181D acts as an USB hub controller and a hub repeater at the direction of an internal
microcontroller. W81181D controls the traffic among the host, four downstream ports, and the
microprocessor. As a hub controller, it can enable/disable ports, send and receive resets, and detect
devices of high or low speeds. The W81181D contains three function endpoints and two hub
endpoints to allow both USB Control and Interrupt Transfers between the host and microcontroller.
W81181D is a compound USB device (hub with embedded function attached) with totally five
downstream ports. W81181D can be used as a hub controller in a standalone hub with attached
function or a microcontroller based USB device with hub function.
Ordering Information
PART NO.
W81181D
W81181AD
INPUT CLOCK Freq.
12 MHz
PACKAGE
48-LQFP
48-LQFP
48 MHz
2. FEATURES
·
·
·
·
·
·
·
·
·
·
·
Full compliance with USB spec Rev 1.1 and HID Class Definition Rev 1.0
Compliance with USB Hub spec Rev 1.1
Support multiple endpoints for standalone hub with attached function
Embedded microprocessor--8052 ( 6K ROM + 256 Byte RAM)
Support auto-detected two power source mode between bus power mode and self power mode.
12-MHz crystal/oscillator input to lower EMI (W81181D)
48-Mhz oscillator input for motherboard application (W81181AD)
Support Suspend and Resume operation
Four downstream ports with per port overcurrent protection
Two endpoints for hub (Control and Interrupt)
LED display supports bright/blinking alternative for port enable and OCP(over current protection)
flags
·
·
·
·
·
·
Single 5V supplied with embedded 5V-3.3V regulator
Three endpoints for attached device (one Control and two Interrupt)
Provides the external pull-up resistor control for the up-stream connection.
Perport/Global downstream port power control optional
Packaged in 48-pin LQFP
5V CMOS device
- 4 -
Preliminary W81181D/AD
3. USB BLOCK DIAGRAM
The Serial Interface Engine (SIE) controls the USB data flow between the uCs and the USB bus. Port0
is a high speed (HS) transceiver for the upstream data path. The Hub Repeater is the traffic controller
which directs the bus data to and from the correct paths. The hub Controller and Function Controller
determines what data is to be written to or read from the various FIFOs. The Bus Controller directs the
interface between the uC and Hub/Function Controller.
UPSTREAM PORT
TRANCEIVER
PORT 0
SERIAL
INTERFACE
ENGINE
HUB
HUB
FUNCTION
REPEATER
CONTROLLER
CONTROLLER
USB FIFOs
BUS
TRANCEIVER
PORT 1
TRANCEIVER
PORT 2
TRANCEIVER
PORT 3
TRANCEIVER
PORT 4
CONTROLLER
DOWNSTREAM DEVICES
uC
Publication Release Date: October 1999
Revision A1
- 5 -
Preliminary W81181D/AD
4. PIN CONFIGURATION
W81181D (12 MHz Clock Input)
36
25
DP4
DM4
DP3
DM3
37
24
OCP4_
EXTPUEN
VDD
XTAL2
XTAL1
GND3V
DP2
GND
W81181D
DM2
LEDEN1_
DP1
DM1
LEDEN2_
LEDEN3_
LEDEN4_
LEDEN5_
P1[1]/SSTB
GND3V
DP0
DM0
48
13
1
12
- 6 -
Preliminary W81181D/AD
W81181AD (48 MHz Clock Input)
36
25
DP4
DM4
DP3
DM3
37
24
OCP4_
EXTPUEN
VDD
48CLKIN
GND
GND3V
DP2
LEDEN1_
W81181AD
DM2
48CLKEN_
DP1
DM1
LEDEN2_
LEDEN3_
LEDEN4_
LEDEN5_
P1[1]/SSTB
GND3V
DP0
DM0
48
13
1
12
Publication Release Date: October 1999
Revision A1
- 7 -
Preliminary W81181D/AD
5. PIN DESCRIPTION
W81181D
PIN
NUMBER
PAD
NAME
I/O TYPE
PIN FUNCTION
PULL UP/
DOWN
1
VDD3V
Power1
3.3V Regulator output. Supply voltage for all
transceivers.
-
2
3
4
VDDA
GNDA
VBUS
Power1
Power0
IUD2T
Analog power.
Analog ground.
-
-
-
Input of upstream power status. On self-power mode,
connection should be controlled by VBUS status.
5
6
LEDOC4_
LEDOC3_
LEDOC2_
LEDOC1_
VDD
IOU2P
IOU2P
IOU2P
IOU2P
Power1
IUD2T
IOUD2
Flag of port4 over-current. To drive LED directly
Flag of port3 over-current. To drive LED directly
Flag of port2 over-current. To drive LED directly
Flag of port1 over-current. To drive LED directly
Digital supply voltage.
O
O
O
O
-
7
8
9
10
11
RESET
P3[3]/
Master reset input. Active high.
-
Normally, this pin is P33/INT1_ and used as bi-
directional serial data (SDATA) for embedded function
serial port.
U
INT1_
12
13
P1[0]/
SACK/
INDIV
IOUD2
IOUD2
Normally, this pin is P10 and used as bi-directional
serial data ACK (SACK) for embedded function serial
port. If no embedded function this pin is INDIVIDUAL
(default) or GANGED mode setting for downstream
power control.
U
U
P1[1]/
SSTB
Normally, this pin is P11 and used as bi-directional
serial data Strobe (SSTB) for embedded function
serial port.
14
15
16
17
18
LEDEN5_
LEDEN4_
LEDEN3_
LEDEN2_
LEDEN1_
IOU2P
IOU2P
IOU2P
IOU2P
IOU2P
Downstream port5 LED. Active low to drive
bright/blinking LED when port5 enable.
O
O
O
O
O
Downstream port4 LED. Active low to drive
bright/blinking LED when port4 enable.
Downstream port3 LED. Active low to drive
bright/blinking LED when port3 enable.
Downstream port2 LED. Active low to drive
bright/blinking LED when port2 enable.
Downstream port1 LED. Active low to drive
bright/blinking LED when port1 enable.
19
20
GND
Power0
OSCM
Digital ground
-
-
XTAL1
Crystal IN. For 12 MHz oscillation.
- 8 -
Preliminary W81181D/AD
Pin Description ( W81181D ), continued
PIN
NUMBER
PAD NAME
I/O
TYPE
PIN FUNCTION
PULL UP/
DOWN
21
22
23
24
25
26
27
28
XTAL2
VDD
OSCM
Crystal OUT. For 12 MHz oscillation.
-
Power1 Digital supply voltage.
EXTPUEN
OCP4_
O2
IUD2T
O2
External pull-up connection control.
O
-
Downstream port4 over-current status. Active low.
Downstream port4 power control. Active low.
Downstream port3 over-current status. Active low.
Downstream port3 power control. Active low.
PWEN4_
OCP3_
O
-
IUD2T
O2
PWEN3_
LEDEN0_
O
O
IOU2P
Upstream port0 LED. Active low to drive
bright/blinking LED when upstream port0 enable.
29
30
31
32
33
34
35
OCP2_
PWEN2_
GND
IUD2T
O2
Downstream port2 over-current status. Active low.
Downstream port2 power control. Active low.
-
O
Power0 Digital ground.
OCP1_
PWEN1_
FWKP5
IUD2T
O2
Downstream port1 over-current LED. Active low.
-
Downstream port1 power control. Active low.
Embedded function wake-up input.
O
D
IUD2
IOUD2
P1[2]/
Normally, this pin is a P12 and used as embedded
function suspend control. If no embedded function
this pin is self-powered (High) or bus-powered
(Low) hub setting.
FSUSP5/
PWRDET
GND3V
36
37
38
39
40
41
42
43
44
45
46
47
48
Power0 Ground of port3 and port4 transceivers.
-
-
-
-
-
-
-
-
-
-
-
-
-
DP4
DM4
AIO
AIO
AIO
AIO
USB D+ for downstream port4.
USB D- for downstream port4.
USB D+ for downstream port3.
USB D- for downstream port3.
DP3
DM3
GND3V
DP2
Power0 Ground of port1 and port2 transceivers.
AIO
AIO
AIO
AIO
USB D+ for downstream port2.
USB D- for downstream port2.
USB D+ for downstream port1.
USB D- for downstream port1.
DM2
DP1
DM1
GND3V
DP0
Power0 Ground of port0 transceivers.
AIO
AIO
USB D+ for upstream port0.
USB D- for upstream port0.
DM0
Publication Release Date: October 1999
Revision A1
- 9 -
Preliminary W81181D/AD
W81181AD
PIN
NUMBER
PAD NAME
I/O
TYPE
PIN FUNCTION
PULL UP/
DOWN
1
VDD3V
Power1 3.3V Regulator output. Supply voltage for all
transceivers.
-
2
3
4
VDDA
GNDA
VBUS
Power1 Analog power.
Power0 Analog ground.
-
-
-
IUD2T
Input of upstream power status. On self-power
mode, connection should be controlled by VBUS
status.
5
6
LEDOC4_
LEDOC3_
LEDOC2_
LEDOC1_
VDD
IOU2P
IOU2P
IOU2P
IOU2P
Flag of port4 over-current. To drive LED directly
Flag of port3 over-current. To drive LED directly
Flag of port2 over-current. To drive LED directly
Flag of port1 over-current. To drive LED directly
O
O
O
O
-
7
8
9
Power1 Digital supply voltage.
10
11
RESET
P3[3]/
IUD2T
IOUD2
Master reset input. Active high.
-
Normally, this pin is P33/INT1_ and used as bi-
directional serial data (SDATA) for embedded
function serial port.
U
INT1_
12
13
P1[0]/
SACK/
INDIV
IOUD2
IOUD2
Normally, this pin is P10 and used as bi-directional
serial data ACK (SACK) for embedded function
serial port. If no embedded function this pin is
INDIVIDUAL (default) or GANGED mode setting for
downstream power control.
U
U
P1[1]/
SSTB
Normally, this pin is P11 and used as bi-directional
serial data Strobe (SSTB) for embedded function
serial port.
14
15
16
17
18
19
20
LEDEN5_
LEDEN4_
LEDEN3_
LEDEN2_
48CLKEN_
LEDEN1_
GND
IOU2P
IOU2P
IOU2P
IOU2P
IUD2
Downstream port5 LED. Active low to drive
bright/blinking LED when port5 enable.
O
O
O
O
U
O
-
Downstream port4 LED. Active low to drive
bright/blinking LED when port4 enable.
Downstream port3 LED. Active low to drive
bright/blinking LED when port3 enable.
Downstream port2 LED. Active low to drive
bright/blinking LED when port2 enable.
High enable embedded DPLL (12 MHz to 48 MHz).
It should be kept to Low when using 48Mhz clock.
IOU2P
Downstream port1 LED. Active low to drive
bright/blinking LED when port1 enable.
Power0 Digital ground
- 10 -
Preliminary W81181D/AD
Pin Description ( W81181AD ), continued
PIN
NUMBER
PAD NAME
I/O
TYPE
PIN FUNCTION
PULL UP/
DOWN
21
22
23
24
25
26
27
28
48CLKIN
VDD
OSCM
Clock input for 48 MHz oscillation.
-
Power1 Digital supply voltage.
EXTPUEN
OCP4_
O2
IUD2T
O2
External pull-up connection control.
O
-
Downstream port4 over-current status. Active low.
Downstream port4 power control. Active low.
Downstream port3 over-current status. Active low.
Downstream port3 power control. Active low.
PWEN4_
OCP3_
O
-
IUD2T
O2
PWEN3_
LEDEN0_
O
O
IOU2P
Upstream port0 LED. Active low to drive
bright/blinking LED when upstream port0 enable.
29
30
31
32
33
34
35
OCP2_
PWEN2_
GND
IUD2T
O2
Downstream port2 over-current status. Active low.
Downstream port2 power control. Active low.
-
O
Power0 Digital ground.
OCP1_
PWEN1_
FWKP5
P1[2]/
IUD2T
O2
Downstream port1 over-current LED. Active low.
-
Downstream port1 power control. Active low.
Embedded function wake-up input.
O
D
IUD2
IOUD2
Normally, this pin is a P12 and used as embedded
function suspend control. If no embedded function
this pin is self-powered (High) or bus-powered
(Low) hub setting.
FSUSP5/
PWRDET
36
37
38
39
40
41
42
43
44
45
46
47
48
GND3V
DP4
Power0 Ground of port3 and port4 transceivers.
-
-
-
-
-
-
-
-
-
-
-
-
-
AIO
AIO
AIO
AIO
USB D+ for downstream port4.
USB D- for downstream port4.
USB D+ for downstream port3.
USB D- for downstream port3.
DM4
DP3
DM3
GND3V
DP2
Power0 Ground of port1 and port2 transceivers.
AIO
AIO
AIO
AIO
USB D+ for downstream port2.
USB D- for downstream port2.
USB D+ for downstream port1.
USB D- for downstream port1.
DM2
DP1
DM1
GND3V
DP0
Power0 Ground of port0 transceivers.
AIO
AIO
USB D+ for upstream port0.
USB D- for upstream port0.
DM0
Publication Release Date: October 1999
Revision A1
- 11 -
Preliminary W81181D/AD
IO TYPE
IO TYPE
Power1
Power0
OSCM
IUD2
DESCRIPTION
Power
Ground
Middle-freq. Oscillating IO
Input with pull-up/pull-down control
IUD2T
IOU2P
IOUD2
O2
Schmitt Input with pull-up/pull-down control
Bi-directional high driving IO with programmable pull-up control and serial resistor
Bi-directional IO with pull-up/pull-down control
Output
AIO
Analog Transceiver IO
Pull Up/Down Control
NOTE
DESCRIPTION
O
D
U
-
Output pin without pull-up/down
Input pin or I/O pin with pull-down
Input pin or I/O pin with pull-up
Input pin or I/O pin without pull-up/down
6. ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage (Vcc to Vss)
Analog Input Voltage
LIMIT
5.5V
Vss -0.5V to Vcc +0.5V
Vss -0.5V to Vcc +0.5V
TBD
Digital Input Voltage
Power Dissipation
Ambient Operating Temperature
Lead Temperature (Soldering, 10 sec)
0o C to 70o C
250o C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
- 12 -
Preliminary W81181D/AD
7. ELECTRICAL CHARACTERISTICS
Operating Conditions
VCC = 5V +/-5%, TA = 0o to 70o C
PARAMETER
VCC Supply Current
SYM.
CONDITIONS
Io > 24 mA
MIN.
MAX.
UNIT
mA
V
ICC
OH
TBD
CC
V
Logic Output High
V
2.5
Logic Output Low
VOL
Io > 6 mA
TA = 70 oC
Note 8
0.4
10
V
Logic Input Leakage Current
USB CHARACTERISTICS
Leakage Current:
uA
Hi-Z State Output Leakage
Input Levels:
ILO
V< VIN < 3.3V
|(D+)-(D-)|
-10
+10
uA
Differential Input Sensitivity
Single Ended Signal “0”
Differential Common Mode Range
Output Levels:
VDI
0.2
0.8
0.8
V
V
VSE0
2.0
2.5
VCM Includes VDI range
OLU
Driver Output Low
V
0.3
3.6
2.0
V
V
V
L
R of 1.5 KW to 3.6V
Driver Output High
VOHU
VCRS
2.8
1.3
RL of 15 KW to GND
Output Signal Crossover Voltage
Capacitance:
Transceiver Capacitance
Full Speed Timings:
CIN
Pin to GND
20
pF
Notes 1, 4 (CL = 50 pF)
Notes 2, 3
R F
Output Rise/Fall Times
t /t
4
20
3.5
/4
nS
nS
nS
Source Differential Driver Jitter to Next
Transition
/to Paired Transition
tDJ1
-3.5
/-4
DJ2
/t
Note 3
Differential to EOP transition Skew
tDEOP
tHDD2
-2
5
nS
ns
Notes 2, 3, 5
Hub Differential Data Delay(without
cable)
44
Notes 2, 3, 5
Hub Differential Driver Jitter to Next
Transition
/to Paired Transition (including cable)
tHDJ1
-3
3
nS
/tHDJ2
/-1
/1
Notes 3, 5
Notes 3, 5
Notes 3, 5
Data bit width distortion after SOP
tSOP
-5
0
5
nS
nS
nS
HDD
EOPD
t
Hub SE0 Delay Relative to t
15
15
Hub EOP Output Width Skew
Low Speed Timings:
tHESK
-15
Notes 1, 4 (CL = 50 pF)
R F
t /t
Output Rise/Fall Times
75
300
nS
Publication Release Date: October 1999
Revision A1
- 13 -
Preliminary W81181D/AD
Electrical Characteristics, continued
PARAMETER
SYM.
CONDITIONS MIN.
MAX. UNIT
Notes 2, 3
DJ1
Source Differential Driver Jitter to Next Transition
/to Paired Transition
t
-25
25
/14
100
300
45
nS
nS
nS
nS
nS
/tDJ2
tDEOP
tHDD2
tHDJ1
/-14
Notes 3
Differential to EOP transition Skew
Hub Differential Data Delay(without cable)
Hub Differential Driver Jitter to Next Transition
/to Paired Transition (including cable)
Data bit width distortion after SOP
Hub SE0 Delay Relative to tHDD
-40
Notes 2, 3, 5
Notes 2, 3, 5
-45
HDJ2
/t
/-45
/-45
60
Notes 3, 5
tSOP
tEOPD
tHESK
-60
nS
nS
nS
Notes 3, 5
0
200
300
Notes 3, 5
Hub EOP Output Width Skew
-300
Notes:
1. Measured from 10% to 90% of the data signal.
2. Timing difference between the differential signals.
3. Measured at crossover point of differential data signals.
4. The rising and falling edges should be smoothly transiting(monotonic)
5. Full Speed timing have a 1.5 kW pull-up to 2.8 V on the D+ (DP) data line.
6. Low Speed timing have a 1.5 kW pull-up to 2.8 V on the D- (DM) data line.
7. The maximum load specification is the maximum effective capacitive load allowed that meets the target hub VBUS droop of
330 mV.
8. All other USB Electrical Characteristics refer to USB spec Rev 1.1 7.3.2 and 7.3.3.
- 14 -
Preliminary W81181D/AD
8. TYPICAL APPLICATION
W81181D
VBUS
W81181D USB Hub Reference Schematic (Pure Hub)
C9
C10
C11
C12
VCC
+
15p 15p 15p 15p
U4
C36
30
30
C34
10u
9
22
2
45
44
43
42
40
39
38
37
D1-
D1+
D2-
D2+
D3-
D3+
D4-
D4+
R33
R13
R14
R15
R16
R17
R18
R19
R20
0.1u
VDD
DM1
DP1
DM2
DP2
DM3
DP3
DM4
DP4
VDD
VDD3
7.5K
30
30
30
30
VDDA
1
VDD3V
C33
X1
X2
20
21
0.1u
XTAL1
XTAL2
+
+
C8
10u
30
30
1
2
3
4
C35
D-
10
33
30
27
25
C13
C14
C15
C16
RESET
PWEN1
PWEN2
PWEN3
PWEN4
D+
0.1u
RESET
PWEN1
PWEN2
PWEN3
PWEN4
LEDHUB
LEDEN1
LEDEN2
LEDEN3
LEDEN4
28
18
17
16
15
14
8
7
6
5
15p 15p 15p 15p
LEDEN0
LEDEN1
LEDEN2
LEDEN3
LEDEN4
LEDEN5
LEDOC1
LEDOC2
LEDOC3
LEDOC4
32
29
26
24
USB1
OCP1
OCP2
OCP3
OCP4
OCP1
OCP2
OCP3
OCP4
VBUS
USB(B)
LEDOC1
LEDOC2
LEDOC3
LEDOC4
30
30
R21
R22
48
47
D-
D+
DM0
DP0
R32
4.7K
11
12
13
34
35
4
19
31
3
INT1/P33
SACK/INDIV
SSTB/P11
FWKP5
GND
GND
GNDA
SCL
SDA
C17
C18
C29
15p 15p
R31
PWRDET
EXTPUEN
36
41
46
PWRDET/FSUS5 GND3V
USB2
27K
VBUS
GND3V
GND3V
23
D1-
D1+
USB(A)
0.1u
EXTPUEN
1
2
3
4
W81181D-48LQFP
R1
R2
15K
15K
VCC
C1
VCC2
R34
R35
R36
R37
R38
R39
R40
R41
R42
120u
220 220 220 220 220 220 220 220 220
U2
C3
1
2
3
4
8
7
6
5
PWEN1
FL1
PW1
PW2
0.1u
C/A
O/A
IN
GND
O/B
F/A
F/B
C/B
FL2
C2
D5
D1
D2
D3
D4
D6
D7
D8
D9
PWEN2
C30
120u
USB3
AIC1526-0
USB(A)
LED LED LED LED LED LED LED LED LED
0.1u
LEDHUB
LEDEN1
LEDEN2
LEDEN3
LEDEN4
1
2
3
4
LEDOC1
LEDOC2
LEDOC3
LEDOC4
R3
15K
15K
R4
D2-
D2+
VCC
R30
C31
R29
10K
USB4
R28
VCC
10K
10K
10K
D3-
USB(A)
0.1u
D3+
R23
1
2
3
4
R5
R6
+
C7
10u
15K
15K
R24
OCP1
OCP2
OCP3
OCP4
FL1
FL2
FL3
FL4
RESET
10K
R25
C4
VCC2
R43
3.3K
10K
R26
120u
U3
C6
PWEN3
FL3
1
2
3
4
8
7
6
5
PW3
PW4
10K
0.1u
C/A
O/A
IN
GND
O/B
R27
F/A
F/B
C/B
FL4
C5
PWEN4
10K
C40
C32
+
C37
+
C38
+
C39
+
120u
USB5
AIC1526-0
0.1u
0.1u
0.1u
0.1u
USB(A)
0.1u
1
2
3
4
R7
R8
15K
15K
C41
Vendor ID
/
Product ID build in EEPROM
X1
X2
D4-
D4+
30p
VCC
VCC
Y1
U1
1
2
3
4
8
12MHz
A0
VCC
RC
SCL
SDA
7
6
5
A1
SCL
SDA
C42
A2
VSS
30p
24LC04B
inbond
WINBOND ELECTRONICS CORP.
Size
Document Number
Rev
2.1
W81181D Reference Schematic
Date:
Friday, July 09, 1999
Sheet
1
of
1
Publication Release Date: October 1999
Revision A1
- 15 -
Preliminary W81181D/AD
W81181AD
W81181AD USB Hub Reference Schematic (48MHz for Mother Board)
C9
C10
C11
C12
VCC
+
15p 15p 15p 15p
U4
C36
30
9
22
2
45
44
43
42
40
39
38
37
D1-
30
R13
R14
R15
R16
R17
R18
R19
R20
0.1u
VDD
DM1
DP1
DM2
DP2
DM3
DP3
DM4
DP4
D1+
VDD
VDD3
D2-
30
VDDA
D2+
30
1
D3-
30
VDD3V
D3+
30
X1
21
18
D4-
48CLKIN
48CLKEN
+
+
C8
10u
D4+
30
C35
30
10
33
30
27
25
C13
C14
C15
C16
VCC
RESET
PWEN1
PWEN2
PWEN3
PWEN4
0.1u
RESET
PWEN1
PWEN2
PWEN3
PWEN4
LEDHUB
LEDEN1
LEDEN2
LEDEN3
LEDEN4
28
19
17
16
15
14
8
7
6
5
15p 15p 15p 15p
LEDEN0
LEDEN1
LEDEN2
LEDEN3
LEDEN4
LEDEN5
LEDOC1
LEDOC2
LEDOC3
LEDOC4
32
29
26
24
R33
OCP1
OCP2
OCP3
OCP4
OCP1
OCP2
OCP3
OCP4
VCC
7.5K
LEDOC1
LEDOC2
LEDOC3
LEDOC4
30
30
R21
R22
ROOTHUB_D-
ROOTHUB_D+
48
47
DM0
DP0
R32
4.7K
11
12
13
34
35
4
20
31
3
INT1/P33
SACK/INDIV
SSTB/P11
FWKP5
GND
GND
GNDA
SCL
SDA
C17
C18
C29
15p 15p
36
41
46
PWRDET/FSUS5 GND3V
USB2
VBUS
GND3V
GND3V
EXTPUEN
23
D1-
D1+
USB(A)
0.1u
EXTPUEN
1
2
3
4
W81181AD-48LQFP
R1
R2
15K
15K
VCC
C1
VCC
R34
R35
R36
R37
R38
R39
R40
R41
R42
120u
220 220 220 220 220 220 220 220 220
U2
C3
1
2
3
4
8
7
6
5
PWEN1
FL1
PW1
PW2
0.1u
C/A
O/A
IN
GND
O/B
F/A
F/B
C/B
FL2
C2
D5
D1
D2
D3
D4
D6
D7
D8
D9
PWEN2
C30
120u
USB3
AIC1526-0
USB(A)
LED LED LED LED LED LED LED LED LED
0.1u
LEDHUB
LEDEN1
LEDEN2
LEDEN3
LEDEN4
1
2
3
4
LEDOC1
LEDOC2
LEDOC3
LEDOC4
R3
15K
15K
R4
D2-
D2+
VCC
R30
C31
R29
10K
USB4
R28
VCC
10K
10K
10K
D3-
USB(A)
0.1u
D3+
R23
1
2
3
4
R5
R6
+
C7
10u
15K
15K
R24
OCP1
OCP2
OCP3
OCP4
FL1
FL2
FL3
FL4
RESET
10K
R25
C4
VCC
R43
3.3K
10K
R26
120u
U3
C6
PWEN3
FL3
1
2
3
4
8
7
6
5
PW3
PW4
10K
0.1u
C/A
O/A
IN
GND
O/B
R27
F/A
F/B
C/B
FL4
C5
PWEN4
10K
C40
C32
+
C37
+
C38
+
C39
+
120u
USB5
AIC1526-0
0.1u
0.1u
0.1u
0.1u
USB(A)
0.1u
1
2
3
4
R7
R8
15K
15K
Vendor ID
/
Product ID build in EEPROM
D4-
D4+
VCC
VCC
U1
1
2
3
4
8
A0
VCC
RC
SCL
SDA
X1
7
6
5
48MHz In
A1
SCL
SDA
A2
VSS
24LC04B
inbond
WINBOND ELECTRONICS CORP.
Size
Document Number
Rev
2.2
W81181AD Reference Schematic
Date:
Monday, July 12, 1999
Sheet
1
of
1
- 16 -
Preliminary W81181D/AD
9. HOW TO READ THE TOP MARKING
The top marking of W81181D
W81181D
745AA-02A
Left: Winbond logo
1st line: Type number W8181, D means LQFP (Thickness = 1.4 mm)
2nd line: Tracking code
745 A A
- 02A
745: packages made in '97, week 45
A: assembly house ID; A means ASE, O means OSE
A: IC revision; A means version A, B means version B
02A: for internal use
Publication Release Date: October 1999
Revision A1
- 17 -
Preliminary W81181D/AD
10. PACKAGE DIMENSIONS
48-pin QFP
H
D
D
25
36
Dimension in mm
Dimension in Inch
Symbol
A
Min. Nom. Max.
Min.
Max.
Nom.
1.60
0.15
1.45
---
---
---
0.05
1
A
24
37
1.35
0.17
0.09
1.40
0.20
---
2
A
0.27
0.20
b
c
E
E
7.00
7.00
H
D
E
e
0.50
9.00
9.00
D
H
H
L
L
y
q
48
13
E
0.45
0.75
0.60
1.00
0.08
3.5
1
---
7
---
0
1
12
e
b
Notes:
c
1. Dimensions D & E do not include interlead
flash.
2. Dimension b does not include dambar
protrusion/intrusion.
A
A
A
2
q
1
3. Controlling dimension: Millimeters
See Detail F
L
y
Seating Plane
4. General appearance spec. should be based
on final visual inspection spec.
L 1
Detail F
Winbond Electronics (H.K.) Ltd.
Winbond Electronics North America Corp.
Headquarters
Rm. 803, World Trade Square, Tower II, Winbond Memory Lab.
123 Hoi Bun Rd., Kwun Tong,
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5792646
Winbond Microelectronics Corp.
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
Winbond Systems Lab.
2727 N. First Street, San Jose,
CA 95134, U.S.A.
http://www.winbond.com.tw/
TEL: 408-9436666
FAX: 408-5441798
Voice & Fax-on-demand: 886-2-27197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Note: All data and specifications are subject to change without notice.
Please note that all data and specifications are subject to change without notice. All the trade marks of products
and companies mentioned in this data sheet belong to their respective owners.
- 18 -
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