W91542 [ETC]
Tone/Pulse Telephone Dialer ; 音频/脉冲拨号电话\n
| 型号： | W91542 |
| 厂家： | 
ETC |
| 描述： | Tone/Pulse Telephone Dialer
|
| 文件： | 总19页 (文件大小：223K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
W91540N SERIES
10-MEMORY TONE/PULSE DIALER WITH SAVE,
KEYTONE, LOCK, AND HANDFREE FUNCTIONS
GENERAL DESCRIPTION
The W91540N series are tone/pulse switchable telephone dialers with 10 memories, keytone or lock
function, and handfree dialing control. These chips are fabricated using Winbond's high-performance
CMOS technology and thus offer good performance in low-voltage and low-power operations.
FEATURES
· DTMF/pulse switchable dialer
· Two by 32-digit redial and save memory
· Ten by 16 digit two-touch indirect repertory memory
· Pulse-to-tone (*/T) keypad for long distance call operation
· Cascaded dialing
· Uses 5 ´ 5 keyboard
· Easy operation with redial, flash, pause, and */T keypads
· Pause, P® T (pulse-to-tone) can be stored as a digit in memory
· 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
· Dialing rate (10 ppS or 20 ppS) selected by bonding option
· Minimum tone output duration: 93 mS (W91544AN: 87 mS)
· Minimum intertone pause: 93 mS (W91544AN: 87 mS)
· Pause time: 3.6 sec
· 300 mS off-hook delay in lock mode (DP remains low for 300 mS while off-hook)
· Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S
· Make/break ratio (2:3 or 1:2) selectable by Mode pin
· Key tone output for valid keypad entry recognition
· On-chip power-on reset
· Uses 3.579545 MHz crystal or ceramic resonator
· Packaged in 18 or 20-pin DIP
Publication Release Date: May 1997
- 1 -
Revision A2
W91540N SERIES
· The different dialers in the W91540N series are shown in the following table:
TYPE NO.
REPLACEMENT
TYPE NO.
PULSE
(ppS)
FLASH
(mS)
M/B
KEY
TONE
HANDFREE
DIALING
LOCK
PACKAGE
(PINS)
W91540N
W91540
10
600/300/73/100
Pin
Yes
Yes
-
-
18
W91541
W91540AN
W91540A
W91541A
W91541L
W91541AL
W91542
10
600/300/73/100
Pin
Yes
-
20
W91541LN
W91541ALN
W91542N
10
10
20
20
10
600/300/73/100
600/300/73/100
600/300/73/100
600/300/73/100
600/300/73/100
Pin
Pin
Pin
Pin
Pin
-
-
Yes
18
20
18
20
20
-
Yes
-
Yes
Yes
Yes
Yes
-
-
-
W91542AN
W91544AN
W91542A
New type
Yes
Yes
Note: The W91544AN is designed specifically for use in France. The pause time is not added in pulse-to-tone mode.
PIN CONFIGURATIONS
R4
C1
C2
C3
C4
1
20
R4
1
2
3
4
5
18
17
16
R3
R2
2
3
19
18
17
16
C1
C2
R3
R2
4
5
R1
V
C3
C4
R1
KT
15
14
13
12
11
10
DD
KT
V
V
DD
MODE
DTMF
DP/C5
SS
6
7
8
15
14
13
V
SS
XT
XT
6
7
MODE
DTMF
DP/C5
XT
T/P MUTE
HFI
12
11
XT
9
8
9
HKS
HFO
T/P MUTE
10
HKS
W91540N/542N
W91540AN/542AN/544AN
- 2 -
W91540N SERIES
Pin Configurations, continued
1
20
19
18
17
16
C1
C2
C3
C4
R4
1
2
3
4
5
R4
R3
R2
R1
C1
C2
C3
C4
18
R3
2
3
4
17
16
15
14
13
12
11
10
R2
R1
5
VDD
MODE
DTMF
LOCK
VSS
VDD
LOCK
VSS
6
7
8
15
14
13
6
7
8
9
MODE
DTMF
DP/C5
HKS
XT
XT
XT
XT
DP/C5
12
11
9
T/P MUTE
HFI
HKS
HFO
10
T/P MUTE
W91541ALN
W91541LN
PIN DESCRIPTION
SYMBOL
Column-Row
Inputs
18-PIN
20-PIN
I/O
FUNCTION
I
The keyboard input is compatible with a standard
5 ´ 5 keyboard, an inexpensive single contact
(Form A) keyboard, and electronic input.
1- 4
&
1- 4
&
15- 18
17- 20
In normal operation, any single button can be
pushed to produce a dual tone, pulses, or a
function. Activation of two or more buttons will
result in no response except for single tone.
XT
7
7
I
A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal. The oscillator
ceases when a keypad input is not sensed. The
crystal frequency deviation is 0.02%.
8
9
8
9
O
O
Crystal oscillator output pin.
XT
T/P MUTE
The T/P MUTE is a conventional CMOS N-
channel open drain output.
The output transistor is switched on low level
during dialing sequence (both pulse and tone
mode). Otherwise, it is switched off.
Publication Release Date: May 1997
- 3 -
Revision A2
W91540N SERIES
Pin Description, continued
SYMBOL
18-PIN
13
20-PIN
I/O
FUNCTION
MODE
15
I
Pulling mode pin to VSS places dialer in tone
mode.
Pulling mode pin to VDD places dialer in pulse
mode with M/B ratio of 40:60 (10 ppS, except for
W91542N/542AN is 20 ppS).
Leaving mode pin floating places dialer in pulse
mode with M/B ratio of 33.3:66.7 (10 ppS, except
for W91542N/542AN is 20 ppS).
10
12
I
HKS
The HKS (hook switch) input is used to sense
whether the handset is on-hook or off-hook.
On-hook state, HKS = 1: chip is in sleeping
mode, no operation.
Off-hook state, HKS = 0: chip is enabled for
normal operation.
HKS pin is pulled to VDD by an internal resistor.
KT
5
5
O
I
The key tone output is a conventional CMOS
inverter. The key tone is generated when any
valid key is pressed; the KT pin generates a 1.2
KHz square wave at 35 mS. When no key is
pressed, the KT pin remains in low state.
(except for
W91541LN)
(except for
W91541ALN)
5
5
The function of this terminal is to prevent "0"
dialing and "9" dialing under PABX system long
distance call control. When the first key input
after reset is 0 or 9, all key inputs, including the 0
or 9 key, become invalid and the chip generates
no output. The telephone is reinitialized by a
reset.
LOCK
(only for
W91541LN)
(only for
W91541ALN)
The function of the LOCK pin is shown below:
FUNCTION
"0", "9" dialing inhibited
Normal dialing
LOCK PIN
V
DD
Floating
V
SS
"0" dialing inhibited
11
13
O
N-channel open drain dialing pulse output.
DP / C5
Flash key will cause DP to be active in either
tone mode or pulse mode.
In lock mode, DP remains low for 300 mS during
off-hook delay time.
The timing diagram for pulse mode is shown in
Figure 1(a, b, c, d).
- 4 -
W91540N SERIES
Pin Description, continued
SYMBOL
18-PIN 20-PIN I/O
FUNCTION
DTMF
12
14
O
During pulse dialing, this pin remains in low state
regardless of keypad input. In tone mode, it will output a
dual or single tone.
A detailed timing diagram for tone mode is shown in
Figure 2(a, b, c, d)
OUTPUT FREQUENCY
Specified
697
Actual
699
Error %
+0.28
R1
R2
R3
R4
C1
C2
C3
770
852
766
848
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
941
948
1209
1336
1477
1216
1332
1472
VDD, VSS
HFI , HFO
14, 6
-
16, 6
I
Power input pins for the dialer chip. VDD is the main
power and VSS is the ground.
10, 11 I, O
Handfree control pins. A low pulse on the HFI input pin
toggles the handfree control state.
Status of the handfree control is listed in the following
table:
NEXT STATE
CURRENT STATE
Hook SW.
HFO
Dialing
Input
HFO
High
Low
Yes
HFI
HFI
Low
Low
Low
Low
High
On Hook
Off Hook
On Hook
High
High
No
Yes
Yes
No
HFI
Off Hook
Low
On Hook
Off Hook
Off Hook
High On Hook
Yes
HFI pin is pulled to VDD by an internal resistor.
Detailed timing diagram is shown in Figure 3.
Publication Release Date: May 1997
Revision A2
- 5 -
W91540N SERIES
BLOCK DIAGRAM
XT
XT
HKS
HFI
SYSTEM CLOCK
GENERATOR
CONTROL
LOGIC
LOCK
MODE
ROW
(R1 to R4, Vx)
READ/WRITE
COUNTER
KEYBOARD
INTERFACE
T/P MUTE
KT
COLUMN
(C1 to C4)
PULSE
CONTROL
LOGIC
RAM
LOCATION
LATCH
DP/C5
HFO
ROW & COLUMN
PROGRAMMABLE
COUNTER
D/A
CONVERTER
DATA LATCH
& DECODER
DTMF
FUNCTIONAL DESCRIPTION
C1
C2
C3
C4
DP / C5
1
4
2
5
3
6
S
F4
A
R1
R2
R3
R4
Vx
7
8
9
0
#
R/P
SAVE
*/T
F1
F2
F3
· S: Store function key
· A: Indirect repertory memory dialing function key
· R/P: Redial and pause function key
· */T: * in tone mode and P® T in pulse mode
· SAVE: Save function key for one-touch 32-digit memory
· F1, ..., F4: Flash function keys; F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS, and flash
pause time for each key is 1.0 mS
Note: Ln = 0, ..., 9; Dn = 0, ..., 9, */T, #, Pause.
- 6 -
W91540N SERIES
Normal Dialing
&
¡ õ
OFF HOOK , (or ON HOOK
1. D1, D2, ¼ , Dn will be dialed out.
), D1
,
D2 , ..., Dn
HFI
2. Dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing.
Redialing Dialing
&
¡ õ
OFF HOOK , (or ON HOOK
), D1
,
D2 , ..., Dn , Busy
HFI
&
¡ õ
Come ON HOOK
,
OFF HOOK , (or ON HOOK
), R/P
HFI
1. The redial memory content will be D1, D2, ..., Dn.
2. The R/P key can execute the redial function only as the first key-in after off-hook; otherwise,
it will execute pause function.
Number Store
&
¡ õ
OFF HOOK , (or ON HOOK
), D1 , D2 , ..., Dn , S , S , Ln
HFI
S
will be ignored.
1. If the sequence of the dialed digits D1, D2, ¼ , Dn has not
finished,
2. D1, D2, ..., Dn will be dialed out and stored in memory location Ln.
OFF HOOK , (or ON HOOK
&
),
S
, D1 , D2 , ..., Dn , S , Ln
¡ õ
HFI
3. D1, D2, ¼ , Dn will be stored in memory location Ln but will not be dialed out.
4. R/P and */T keys can be stored as a digit in memory, but R/P key cannot be the
first digit. In store mode, R/P is the pause function key.
5. The store mode is released after the store function is executed or when the state of the hook
switch changes or the flash function is executed.
Save
&
¡ õ
OFF
HOOK
, (or ON HOOK
), D1 , D2 , ..., Dn
, SAVE
HFI
1. D1, D2, ..., Dn will be dialed out.
2. If the dialing of D1 to Dn is finished, pressing SAVE will cause D1 to Dn to be
duplicated to save memory.
&
¡ õ
OFF HOOK , (or ON HOOK
), SAVE
HFI
3. D1 to Dn will be dialed out after SAVE key is pressed.
Publication Release Date: May 1997
Revision A2
- 7 -
W91540N SERIES
Repertory Dialing
&
¡ õ
OFF HOOK , (or ON HOOK
), SAVE
HFI
1. The content of save memory location will be dialed out.
&
¡ õ
OFF HOOK , (or ON HOOK
),
A
, Ln
HFI
2. The content of memory location Ln will be dialed out.
Access Pause
&
¡ õ
OFF HOOK , (or ON HOOK
), D1 , D2 , R/P , D3 , ..., Dn
HFI
1. The pause function can be stored as a digit in memory.
2. The pause function is executed in normal dialing or redialing or memory dialing.
3. The pause function timing diagram is shown in Figure 4.
Pulse-to-tone (*/T)
&
¡ õ
OFF HOOK , (or ON HOOK
), D1 , D2 , ..., Dn , */T , D1'
HFI
, D2' , ..., Dn'
1. If the mode switch is set to pulse mode, then the output signal will be as follows:
All versions except W91544AN:
D1, D2, ..., Dn, Pause, D1', D2', ..., Dn'
(Pulse)
(Tone)
W91544AN:
D1, D2, ..., Dn, *, D1', D2', ..., Dn'
(Pulse) (Tone) (Tone)
2. If the mode switch is set to tone mode, then the output signal will be as follows:
D1, D2, ..., Dn, *, D1', D2', ..., Dn'
(Tone)
(Tone)
3. The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse
mode only by going on-hook.
4. The function timing diagram is shown in Figure 5(a, b).
Flash
&
¡ õ
OFF HOOK , (or ON HOOK
1. Fn = F1, ..., F4.
), Fn
HFI
2. If Fn is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS (F2), 73
mS
(F3), or 100 mS (F4). In each case the flash pause time is 1.0 second.
- 8 -
W91540N SERIES
3. Flash key cannot be stored as a digit in memory. The flash key has first priority among keyboard
functions.
4. The system will return to the initial state after the flash pause time is finished.
5. The flash function timing diagram is shown in Figure 6.
Cascaded Dialing
1. Normal Dialing + Repertory Dialing
(1st sequence) (2nd sequence)
+
+
Normal Dialing
2. Repertory Dialing + Normal Dialing
(1st sequence) (2nd sequence)
Repertory Dialing
3. Redialing
+
Normal Dialing
+
Repertory Dialing
(1st sequence) (2nd sequence)
4. Redialing and save dialing are valid only as the first key-in.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC supply voltage
SYMBOL
VDD- VSS
VIL
RATING
-0.3 to +7.0
VSS -0.3
UNIT
V
V
Input/Output Voltage
VIH
VDD +0.3
VSS -0.3
V
VOL
V
VOH
VDD +0.3
120
V
Power dissipation
PD
mW
°C
°C
Operating temperature
Storage temperature
TOPR
TSIG
-20 to +70
-55 to +150
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Publication Release Date: May 1997
- 9 -
Revision A2
W91540N SERIES
DC CHARACTERISTICS
(VDD- VSS = 2.5V, Fosc. = 3.58 MHZ, TA = 25° C; all outputs unloaded)
PARAMETER
Operating Voltage
Operating Current
SYM.
VDD
IOP
CONDITIONS
MIN.
TYP.
-
MAX.
5.5
UNIT
V
-
2.0
Tone
-
-
-
0.4
0.2
-
0.6
mA
mA
mA
Pulse
0.4
Standby Current
ISB
IMR
VTO
15
HKS = 0, No load &
No key entry
Memory Retention Current
-
-
0.2
mA
HKS = 1,
VDD = 1.0V
Tone Output Voltage
Pre-emphasis
Row group,
RL = 5 KW
130
1
150
2
170
3
mVrm
s
Col/Row
VDD = 2.0- 5.5V
dB
dB
V
DTMF Distortion
THD
-
-30
-
-23
3.0
RL = 5 KW
VDD = 2.0- 5.5V
DTMF Output DC Level
VTDC
1.0
RL = 5 KW
VDD = 2.0- 5.5V
DTMF Output Sink Current
DP Output Sink Current
ITL
IPL
VTO = 0.5V
VPO = 0.5V
0.2
0.5
-
-
-
-
mA
mA
IML
VMO = 0.5V
0.5
-
-
mA
T/P MUTE Output Sink
Current
KT Drive/Sink Current
IKTH
IKTL
IHFH
IHFL
IKD
VKTH = 2.0V
VKTL = 0.5V
VHFH = 2.0V
VHFL = 0.5V
VI = 0V
0.5
0.5
0.5
0.5
4
-
-
-
-
-
-
-
-
-
-
mA
mA
mA
mA
mA
HFO Drive/Sink Current
Keypad Input Drive
Current
Keypad Input Sink Current
Keypad Resistance
IKS
VI = 2.5V
200
-
400
-
-
mA
5.0
KW
- 10 -
W91540N SERIES
AC CHARACTERISTICS
PARAMETER
Key-in Debounce
SYM.
TKID
CONDITIONS
MIN.
TYP.
20
MAX.
UNIT
mS
mS
mS
mS
mS
mS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Key Release Debounce
On-hook Debounce
TKRD
TOHD
20
Lock Mode
Unlock Mode
20
150
40
Pre-digit Pause1
Pre-digit Pause2
TPDP1 Mode Pin = VDD
10 ppS Mode Pin =
Floating
33.3
TPDP2 Mode Pin = VDD
-
-
20
-
-
mS
mS
20 ppS Mode Pin =
Floating
16.7
Inter-digit Pause
(Auto Dialing)
TIDP
10 ppS
-
-
-
-
800
500
-
-
-
-
mS
mS
%
20 ppS
Make/Break Ratio
M:B
Mode Pin = VDD
40:60
Mode Pin =
Floating
33.3:66.7
%
Tone Output Duration
Intertone Pause
TTD
Except for
W91544AN
-
-
93
93
-
-
mS
mS
TITP
Except for
W91544AN
Tone Output Duration
Intertone Pause
TTD
W91544AN Only
-
-
-
-
-
-
-
-
-
-
-
87
87
-
-
-
-
-
-
-
-
-
-
-
mS
mS
TITP
W91544AN Only
F1
F2
F3
F4
-
600
300
73
Flash Break Time
TFB
mS
100
1.0
3.6
1.2
35
Flash Pause Time
Pause Time
TFP
TP
S
S
-
Key Tone Frequency
Key Tone Duration
FKT
TKTD
TRP
-
KHz
mS
mS
-
One-key Redialing Pause
Time
-
600
One-key Redialing Break
Time
TRB
-
-
2.2
-
S
Off-hook Delay
First Key-in Delay
Notes:
TOFD
TFKD
Lock Only
Lock Only
-
-
300
300
-
-
mS
mS
Publication Release Date: May 1997
Revision A2
- 11 -
W91540N SERIES
1. Crystal parameters suggested for proper operation are Rs < 100 W, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF,
Fosc. = 3.579545 MHz ±0.02%.
2. Crystal oscillator accuracy directly affects these times.
TIMING WAVEFORMS
< 600mS
HKS
< 300mS
T
KRD
3
4
2
2
KEY IN
DP
T
TKID
KID
M B
M B
T
T
IDP
T
IDP
T
IDP
IDP
T
PDP
T
PDP
T/P MUTE
KT
DTMF
Low
OSC.
OSCILLATION
OSCILLATION
Figure 1(a). Normal Dialing Timing Diagram (Pulse Mode Without Lock Function)
< 600mS
< 300mS
HKS
KEY IN
DP
T
KRD
3
4
2
2
T
T
KID
KID
T
OFD
M B
M B
T
T
IDP
T
IDP
IDP
T
T
PDP
PDP
T/P MUTE
T
FKD
KT
Low
DTMF
OSC.
OSCILLATION
OSCILLATION
Figure 1(b). Normal Dialing Timing Diagram (Pulse Mode with Lock Function)
- 12 -
W91540N SERIES
Timing Waveforms, continued
< 600mS
HKS
KEY IN
DP
T
KRD
R/P
TKID
M B
M B
T
IDP
T
IDP
T
IDP
T
PDP
T/P MUTE
KT
Low
DTMF
OSC.
OSCILLATION
Figure 1(c). Auto Dialing Timing Diagram (Pulse Mode Without Lock Function)
< 600mS
HKS
R/P
300mS
KEY IN
DP
T
KID
T
OFD
M B
B
M
T
T
T
IDP
IDP
IDP
TPDP
T/P MUTE
T
FKD
KT
Low
DTMF
OSCILLATION
OSC.
Figure 1(d). Auto Dialing Timing Diagram (Pulse Mode with Lock Function)
Publication Release Date: May 1997
Revision A2
- 13 -
W91540N SERIES
Timing Waveforms, continued
< 600 mS
HKS
KEY IN
DTMF
< 300 mS
3
TKRD
TKRD
4
5
2
2
TKID
T
KID
T
TD
T
ITP
T
ITP
T
ITP
T
ITP
T/P MUTE
KT
High
DP
OSC.
OSCILLATION
OSCILLATION
OSCILLATION
Figure 2(a). Normal Dialing Timing Diagram (Tone Mode Without Lock Function)
< 600 mS
< 300 mS
HKS
T
KRD
3
4
2
2
5
KEY IN
DTMF
T
KID
T
TD
T
ITP
T
ITP
T
ITP
T/P MUTE
T
FKD
KT
DP
T
OFD
OSCILLATION
OSCILLATION
OSC.
Figure 2(b). Normal Dialing Timing Diagram (Tone Mode with Lock Function)
- 14 -
W91540N SERIES
Timing Waveforms, continued
< 600mS
HKS
KEY IN
DTMF
T
KRD
R/P
T
KID
T
T
T
TD
ITP
ITP
T/P MUTE
KT
High
OSCILLATION
DP
OSC.
Figure 2(c). Auto Dialing Timing Diagram (Tone Mode Without Lock Function)
< 600mS
HKS
T
KRD
R/P
KEY IN
DTMF
TTD
T
T
ITP
ITP
T/P MUTE
T
FKD
300mS
KT
DP
T
OFD
OSCILLATION
OSC.
Figure 2(d) Auto Dialing Timing Diagram (Tone Mode with Lock Function)
Publication Release Date: May 1997
Revision A2
- 15 -
W91540N SERIES
Timing Waveforms, continued
ON HOOK
HKS
HFI
HFO
High
T/P MUTE
CHIP ENBLE
Figure 3. Handfree Timing Diagram
< 600mS
HKS
2
R/P
3
300mS
KEY IN
DP
TKID
TOFD
T
IDP
MB
MB
T
T
PDP
PDP
T
T/P MUTE
KT
P
T
Low
FKD
DTMF
OSC.
OSCILLATION
OSCILLATION
Figure 4. Pause Function Timing Diagram
- 16 -
W91540N SERIES
Timing Waveforms, continued
< 600mS
HKS
2
*/T
3
300mS
KEY IN
DP
TKID
TOFD
MB
TPDP
T
T/P MUTE
KT
P
T
IDP
T
ITP
TFKD
DTMF
OSCILLATION
OSCILLATION
OSC.
Figure 5(a). Pulse-to-tone Timing Diagram (All Versions Except W91544AN)
HKS
T
KRD
4
*/T
2
KEY IN
DP
T
T
KID
KID
M B
T
IDP
T
PDP
T/P MUTE
KT
DTMF
OSC.
T
T
ITP
ITP
OSCILLATION
OSCILLATION
Figure 5(b). Pulse-to-tone Timing Diagram (W91544AN Only)
Publication Release Date: May 1997
Revision A2
- 17 -
W91540N SERIES
Timing Waveforms, continued
HKS
Low
3
F
F
F
KEY IN
DP
TKID
TFP
TFB
TKID
HFI
TKID
TFB
HFO
T/P MUTE
KT
DTMF
OSC.
T
ITP
OSCILLATION
Figure 6. Flash Timing Diagram
- 18 -
W91540N SERIES
Winbond Electronics (H.K.) Ltd.
Winbond Electronics North America Corp.
Headquarters
Rm. 803, World Trade Square, Tower II, Winbond Memory Lab.
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5792697
123 Hoi Bun Rd., Kwun Tong,
Winbond Microelectronics Corp.
Winbond Systems Lab.
Kowloon, Hong Kong
TEL: 852-27516023
FAX: 852-27552064
2730 Orchard Parkway, San Jose,
CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-9436668
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-7197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-7190505
FAX: 886-2-7197502
Note: All data and specifications are subject to change without notice.
Publication Release Date: May 1997
Revision A2
- 19 -
相关型号：
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