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WS256K32N-20G4M [ETC]

256Kx32 SRAM MODULE; 256Kx32 SRAM模块
WS256K32N-20G4M
型号： WS256K32N-20G4M
厂家： ETC    ETC
描述：

256Kx32 SRAM MODULE
256Kx32 SRAM模块

静态存储器
文件： 总7页 (文件大小：177K)
中文：  中文翻译
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WS256K32-XXX  
HI-RELIABILITY PRODUCT  
256Kx32 SRAM MODULE PRELIMINARY*  
FEATURES  
■ Access Times 20, 25, 35ns  
■ MIL-STD-883 Compliant Devices Available  
■ Packaging  
■ 2V Data Retention devices available  
(WS256K32L-XXX low power version only)  
■ Commercial, Industrial and Military Temperature Range  
■ 5 Volt Power Supply  
• 66 pin, PGA Type, 1.185 inch square, Hermetic  
Ceramic HIP (Package 401)  
■ Low Power CMOS  
• 68 lead, 40mm, Hermetic CQFP (Package 501)  
■ Organized as 256Kx32, User Configurable as 512Kx16  
■ Upgradable to 512Kx32 for future expansion  
■ Data I/O Compatible with 3.3V devices  
■ TTL Compatible Inputs and Outputs  
■ Weight  
WS256K32N-XHX - 13 grams typical  
WS256K32-XG4X - 20 grams typical  
*
This data sheet describes a product under development, not fully  
characterized, and is subject to change without notice.  
FIG. 1 PIN CONFIGURATION FOR WS256K32N-XHX  
PIN DESCRIPTION  
TOP VIEW  
1
12  
23  
34  
45  
56  
I/O0-31 Data Inputs/Outputs  
A0-17  
WE1-2  
CS1-2  
OE  
Address Inputs  
Write Enables  
Chip Selects  
Output Enable  
Power Supply  
Ground  
I/O  
I/O  
8
9
NC  
I/O15  
I/O14  
I/O13  
I/O12  
OE  
I/O24  
I/O25  
I/O26  
V
CC  
I/O31  
I/O30  
I/O29  
I/O28  
NC  
NC  
NC  
I/O10  
GND  
I/O11  
A13  
A14  
A15  
A16  
A17  
A
6
7
I/O27  
VCC  
BLOCK DIAGRAM  
GND  
NC  
A10  
A11  
A12  
VCC  
A
A
3
4
5
2
2
A0  
A1  
A2  
WE1CS1  
WE2CS2  
Not Connected  
NC  
NC  
A
OE  
A0-17  
WE1  
A
8
9
A
256K x 16  
256K x 16  
I/O  
I/O  
I/O  
I/O  
7
A
WE  
CS  
I/O23  
I/O22  
I/O21  
I/O20  
I/O  
I/O  
I/O  
0
1
2
CS  
NC  
I/O  
1
6
I/O16  
I/O17  
I/O18  
16  
16  
5
4
GND  
I/O19  
3
I/O16-31  
I/O0-15  
11  
22  
33  
44  
55  
66  
October 2000 Rev. 2  
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS256K32-XXX  
FIG. 2 PIN CONFIGURATION FOR WS256K32-XG4X  
TOP VIEW  
PIN DESCRIPTION  
I/O0-31 Data Inputs/Outputs  
A0-17  
WE  
Address Inputs  
Write Enable  
Chip Selects  
Output Enable  
Power Supply  
Ground  
9
8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61  
CS1-2  
OE  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
I/O16  
I/O17  
I/O18  
I/O19  
I/O20  
I/O21  
I/O22  
I/O23  
GND  
I/O24  
I/O25  
I/O26  
I/O27  
I/O28  
I/O29  
I/O30  
I/O31  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
0
1
2
3
4
5
6
7
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
VCC  
BLOCK DIAGRAM  
GND  
NC  
CS2  
CS1  
Not Connected  
WE  
OE  
GND  
I/O  
I/O  
8
9
A
0-17  
I/O10  
I/O11  
I/O12  
I/O13  
I/O14  
I/O15  
256K x 16  
256K x 16  
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43  
16  
16  
I/O16-31  
I/O0-15  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
2
WS256K32-XXX  
ABSOLUTE MAXIMUM RATINGS  
TRUTH TABLE  
Parameter  
Symbol  
TA  
Min  
-55  
-65  
-0.5  
Max  
+125  
+150  
Vcc+0.5  
150  
Unit  
°C  
°C  
V
CS  
H
L
L
L
OE  
X
L
H
X
WE  
X
H
H
L
Mode  
Standby  
Read  
Out Disable  
Write  
Data I/O  
High Z  
Data Out  
High Z  
Power  
Standby  
Active  
Active  
Active  
Operating Temperature  
Storage Temperature  
Signal Voltage Relative to GND  
Junction Temperature  
Supply Voltage  
TSTG  
VG  
Data In  
TJ  
°C  
V
VCC  
-0.5  
7.0  
CAPACITANCE  
(TA = +25°C)  
RECOMMENDED OPERATING CONDITIONS  
Parameter  
Symbol  
VCC  
Min  
4.5  
Max  
5.5  
Unit  
V
Parameter  
Symbol  
COE  
Conditions  
Max Unit  
Supply Voltage  
OE capacitance  
V
V
IN = 0 V, f = 1.0 MHz  
IN = 0 V, f = 1.0 MHz  
28  
pF  
pF  
Input High Voltage  
Input Low Voltage  
Operating Temp (Mil)  
VIH  
2.2  
VCC + 0.3  
+0.8  
V
WE1-2 capacitance  
HIP (PGA)  
CQFP G4  
CS1-2 capacitance  
CWE  
20  
28  
20  
VIL  
-0.5  
-55  
V
TA  
+125  
°C  
CCS  
CI/O  
CAD  
V
IN = 0 V, f = 1.0 MHz  
I/O = 0 V, f = 1.0 MHz  
VIN = 0 V, f = 1.0 MHz  
pF  
pF  
pF  
Data I/O capacitance  
V
20  
28  
Address input capacitance  
This parameter is guaranteed by design but not tested.  
DC CHARACTERISTICS  
(VCC = 5.0V, GND = 0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
Conditions  
Units  
Min  
Max  
Input Leakage Current  
Output Leakage Current  
ILI  
ILO  
VCC = 5.5, VIN = GND to VCC  
10  
µA  
µA  
mA  
mA  
V
CS = VIH, OE = VIH, VOUT = GND to VCC  
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5  
CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5  
IOL = 8mA, Vcc = 4.5  
10  
550  
34  
Operating Supply Current x 32 Mode  
Standby Current  
ICC x 32  
ISB  
Output Low Voltage  
VOL  
0.4  
Output High Voltage  
VOH  
IOH = -4.0mA, Vcc = 4.5  
2.4  
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V  
LOW POWER DATA RETENTION CHARACTERISTICS  
(WS256K32L-XXX ONLY)  
(TA = -55°C to +125°C)  
Parameter  
Symbol  
Conditions  
Units  
Min  
Typ  
Max  
Data Retention Supply Voltage  
Data Retention Current  
VDR  
CS ≥ VCC -0.2V  
2.0  
5.5  
16  
V
ICCDR3  
VCC = 3V  
1.0  
mA  
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS256K32-XXX  
AC CHARACTERISTICS  
(VCC = 5.0V, GND = 0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
-20  
-25  
-35  
Units  
Read Cycle  
Min  
Max  
Min  
Max  
Min  
Max  
Read Cycle Time  
tRC  
tAA  
20  
25  
35  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
20  
25  
35  
Output Hold from Address Change  
Chip Select Access Time  
tOH  
0
0
0
tACS  
tOE  
20  
12  
25  
15  
35  
20  
Output Enable to Output Valid  
Chip Select to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Disable to Output in High Z  
tCLZ1  
tOLZ1  
tCHZ1  
tOHZ1  
5
0
5
0
5
0
12  
12  
15  
15  
20  
20  
1. This parameter is guaranteed by design but not tested.  
AC CHARACTERISTICS  
(VCC = 5.0V, GND = 0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
-20  
-25  
-35  
Units  
Write Cycle  
Min  
20  
17  
17  
12  
17  
0
Max  
Min  
25  
20  
20  
15  
20  
0
Max  
Min  
35  
25  
25  
20  
25  
0
Max  
Write Cycle Time  
tWC  
tCW  
tAW  
tDW  
tWP  
tAS  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Select to End of Write  
Address Valid to End of Write  
Data Valid to End of Write  
Write Pulse Width  
Address Setup Time  
Address Hold Time  
tAH  
2
2
2
Output Active from End of Write  
Write Enable to Output in High Z  
Data Hold Time  
tOW1  
tWHZ1  
tDH  
0
0
0
8
10  
15  
0
0
0
1. This parameter is guaranteed by design but not tested.  
FIG. 3  
AC TEST CONDITIONS  
AC TEST CIRCUIT  
IOL  
Parameter  
Typ  
Unit  
Current Source  
Input Pulse Levels  
VIL = 0, VIH = 3.0  
V
ns  
V
Input Rise and Fall  
5
Input and Output Reference Level  
Output Timing Reference Level  
1.5  
1.5  
D.U.T.  
VZ ≈ 1.5V  
(Bipolar Supply)  
V
Ceff = 50 pf  
NOTES:  
VZ is programmable from -2V to +7V.  
IOL & IOH programmable from 0 to 16mA.  
Tester Impedance Z0 = 75 Ω.  
VZ is typically the midpoint of VOH and VOL.  
IOL & IOH are adjusted to simulate a typical resistive load circuit.  
ATE tester includes jig capacitance.  
IOH  
Current Source  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
4
WS256K32-XXX  
FIG. 4  
TIMING WAVEFORM - READ CYCLE  
tRC  
ADDRESS  
CS  
tAA  
tRC  
tCHZ  
tACS  
tCLZ  
ADDRESS  
tAA  
OE  
tOE  
tOLZ  
tOH  
tOHZ  
DATA I/O  
DATA I/O  
PREVIOUS DATA VALID  
DATA VALID  
DATA VALID  
HIGH IMPEDANCE  
READ CYCLE 1 (CS = OE = V , WE = V  
)
READ CYCLE 2 (WE = V )  
IH  
IL IH  
FIG. 5  
WRITE CYCLE - WE CONTROLLED  
tWC  
ADDRESS  
tAW  
tAH  
tCW  
CS  
WE  
tAS  
tWP  
tOW  
tDH  
tWHZ  
tDW  
DATA I/O  
DATA VALID  
WRITE CYCLE 1, WE CONTROLLED  
FIG. 6  
WRITE CYCLE - CS CONTROLLED  
tWC  
ADDRESS  
WS32K32-XHX  
tCW  
tAW  
tAH  
tAS  
CS  
tWP  
WE  
tDW  
tDH  
DATA I/O  
DATA VALID  
WRITE CYCLE 2, CS CONTROLLED  
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS256K32-XXX  
PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H)  
30.1 (1.185) ± 0.38 (0.015) SQ  
PIN 1 IDENTIFIER  
SQUARE PAD  
ON BOTTOM  
25.4 (1.0) TYP  
6.22 (0.245)  
MAX  
3.81 (0.150)  
± 0.1 (0.005)  
1.27 (0.050) ± 0.1 (0.005)  
0.76 (0.030) ± 0.1 (0.005)  
2.54 (0.100)  
TYP  
1.27 (0.050) TYP DIA  
15.24 (0.600) TYP  
25.4 (1.0) TYP  
0.46 (0.018) ± 0.05 (0.002) DIA  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
PACKAGE 501: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4)  
5.1 (0.200) MAX  
39.6 (1.56) ± 0.38 (0.015) SQ  
1.27 (0.050)  
± 0.1 (0.005)  
PIN 1 IDENTIFIER  
Pin 1  
12.7 (0.500)  
± 0.5 (0.020)  
4 PLACES  
5.1 (0.200)  
± 0.25 (0.010)  
4 PLACES  
0.25 (0.010)  
± 0.05 (0.002)  
1.27 (0.050)  
TYP  
0.38 (0.015)  
± 0.08 (0.003)  
68 PLACES  
38 (1.50) TYP  
4 PLACES  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
6
WS256K32-XXX  
ORDERING INFORMATION  
W S 256K32 X - XXX X X X  
LEAD FINISH:  
Blank = Gold plated leads  
A = Solder dip leads  
DEVICE GRADE:  
M= Military Screened  
I = Industrial  
-55°C to +125°C  
-40°C to +85°C  
0°C to +70°C  
C = Commercial  
PACKAGE:  
H = Ceramic Hex-In-Line Package, HIP (Package 401)  
G4 = 40mm Ceramic Quad Flat Pack, CQFP (Package 501)  
ACCESS TIME (ns)  
IMPROVEMENT MARK  
N = No Connect at pins 21, 28 and 39 in HIP for Upgrades  
Blank = Standard Power  
L = Low Power Data Retention  
ORGANIZATION, 256Kx32  
User configurable as 512Kx16  
SRAM  
WHITE ELECTRONIC DESIGNS CORP.  
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  

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