MP7523 [EXAR]
15 V CMOS Multiplying 8-Bit Digital-to-Analog Converter; 15 V CMOS乘法8位数字 - 模拟转换器
| 型号： | MP7523 |
| 厂家： | 
EXAR CORPORATION |
| 描述： | 15 V CMOS Multiplying 8-Bit Digital-to-Analog Converter |
| 文件： | 总12页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP7523/XRD7523
15 V CMOS
Multiplying 8-Bit
Digital-to-Analog Converter
...the analog plus companyTM
January 1996-2
FEATURES
APPLICATIONS
• Full Four-Quadrant Multiplying
• Low Feedthrough: 1/2 LSB @ 200 kHz
• Fast Settling: 100 ns (typ.)
• Low Power Dissipation
• Battery Operated Equipment
• Low Power, Ratiometric A/D Converters
• Digitally Controlled Gain Circuits
• Digitally Controlled Attenuators
• CRT Character Generation
• Low Cost
• 5 V/15 V Operation
• Low Noise Audio Gain Control
• Buffered Version: MP7524/XRD7524
The MP7523/XRD7523’s excellent multiplying characteris-
tics and low cost allow it to be used in a wide ranging field of ap-
plications such as: low noise audio gain control, CRT character
generation,motorspeedcontrol, digitallycontrolledattenuators,
etc.
GENERAL DESCRIPTION
The MP7523/XRD7523 is a low cost multiplying Digital-to-
Analog Converter. The device uses an advanced thin-film-on-
CMOS technology to provide 8-bit resolution with accuracy to
10-bits and very low power dissipation.
SIMPLIFIED BLOCK DIAGRAM
V
DD
2R
2R
2R
V
REF
R
FB
4R
4R
4R
4R
4R
4R
4R
R
I
I
OUT1
OUT2
2 to 3 Decoder
Switch Drivers & Switches
R = 10k
BIT 1
MSB
BIT 8
LSB
3 Segment D/A Converter with Termination to DGND
Logical “1” at Digital Input Steers Current to I
OUT1
Rev. 3.00
E1996
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z (510) 668-7010
MP7523/XRD7523
ORDERING INFORMATION
Package
Type
Temperature
Range
INL
(LSB)
DNL
(LSB)
Gain Error
(% FSR)
Part No.
–40 to +85°C
–40 to +85°C
–40 to +85°C
–40 to +85°C
–40 to +85°C
–40 to +85°C
–40 to +85°C
–40 to +85°C
Plastic Dip
Plastic Dip
MP7523JN
MP7523KN
ꢀ1/2
ꢀ1/4
ꢀ1/2
ꢀ1/4
ꢀ1/2
ꢀ1/4
ꢀ1
ꢀ1
ꢀ1
ꢀ1
ꢀ1
ꢀ1
ꢀ1.8
ꢀ1.8
ꢀ1.8
ꢀ1.8
ꢀ1.8
ꢀ1.8
SOIC (Jedec, 0.300”)
SOIC (Jedec, 0.300”)
SOIC (Jedec, 0.150”)
SOIC (Jedec, 0.150”)
SOP (EIAJ)
MP7523JS
MP7523KS
XRD7523AID-J
XRD7523AID-K
XRD7523AIK-J
XRD7523AIK-K
ꢀ1/2
ꢀ1/4
ꢀ1
ꢀ1
ꢀ1.8
ꢀ1.8
SOP (EIAJ)
PIN CONFIGURATIONS
1
1
2
3
4
5
6
7
8
16
15
14
13
I
I
R
V
V
I
I
16
15
14
13
R
V
OUT1
FB
OUT1
FB
2
3
4
OUT2
REF
DD
OUT2
REF
GND
(MSB) BIT 1
BIT 2
GND
V
DD
N/C
(MSB) BIT 1
BIT 2
N/C
N/C
BIT 8 (LSB)
BIT 7
BIT 6
12 N/C
5
6
7
8
12
11
10
9
BIT 3
BIT 4
BIT 5
BIT 8 (LSB)
BIT 7
BIT 6
BIT 3
BIT 4
BIT 5
11
10
9
16 Pin PDIP (0.300”)
16 pin SOIC (Jedec, 0.300”)
16 pin SOIC (Jedec, 0.150”)
16 pin SOP (EIAJ, 5.5 mm)
PIN OUT DEFINITIONS
PIN NO.
NAME
DESCRIPTION
PIN NO.
NAME
BIT 6
DESCRIPTION
1
2
3
4
5
6
7
8
I
I
Current Output 1
Current Output 2
Ground
9
Bit 6
OUT1
10
11
12
13
14
15
16
BIT 7
BIT 8
N/C
Bit 7
OUT2
GND
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
Bit 8
Bit 1 (MSB)
Bit 2
No Connection
No Connection
Positive Power Supply
Reference Input Voltage
Internal Feedback Resistor
N/C
Bit 3
V
V
DD
Bit 4
REF
Bit 5
R
FB
Rev. 3.00
2
MP7523/XRD7523
ELECTRICAL CHARACTERISTICS
(V = + 15 V, V
= +10 V unless otherwise noted)
DD
REF
25°C
Typ
Tmin to Tmax
Parameter
Symbol
Min
Max
Min
Max
Units
Test Conditions/Comments
1
STATIC PERFORMANCE
Resolution (All Grades)
N
8
8
Bits
Integral Non-Linearity
INL
LSB
Best Fit Straight Line
(Relative Accuracy)
(Max INL – Min INL) / 2
J
K
+1/2
+1/4
+1/2
+1/4
Monotonicity
Guaranteed over temp
Differential Non-Linearity
DNL
GE
LSB
%
All grades monotonic over full
temperature range.
J
K
+1
+1
+1
+1
Gain Error
+1.5
+1.8
Using Internal R
FB
J
Digital Inputs = V
INH
K
Power Supply Rejection Ratio
PSRR
+200
+300 ppm/%
+200nA nA
|∆Gain/∆V | ∆V = + 5%
DD DD
J
K
Digital Inputs = V
INH
Output Leakage Current (Pin 1)
I
+50nA
+50nA
Digital Inputs = V
OUT1
OUT2
INL
J
K
Output Leakage Current (Pin 2)
I
+200nA nA
Digital Inputs = V
INH
J
K
REFERENCE INPUT
Input Resistance
R
V
5
20
5
20 kΩ
V
OUT1
= V
= 0 V
IN
OUT2
DIGITAL INPUTS
Logical “1” Voltage
Logical “0” Voltage
Input Leakage Current
14.5
14.5
V
IH
V
IL
LKG
0.5
+1
0.5
V
I
+1 µA
ANALOG OUTPUTS
2
Output Capacitance
C
C
C
C
100
30
30
100 pF
30 pF
30 pF
100 pF
DAC Inputs all 1’s
DAC Inputs all 0’s
DAC Inputs all 1’s
DAC Inputs all 0’s
OUT1
OUT1
OUT2
OUT2
100
Rev. 3.00
3
MP7523/XRD7523
ELECTRICAL CHARACTERISTICS (CON’T)
25°C
Typ
Tmin to Tmax
Parameter
Symbol
Min
Max
Min
Max
Units
Test Conditions/Comments
POWER SUPPLY
2
Functional Voltage Range
Supply Current
V
I
5
16
1.6
5
16
1.6 mA
V
DD
All digital inputs = 0 V or all = 15 V
DD
NOTES:
1
Full Scale Range (FSR) is 10V.
Guaranteed but not production tested.
Digital input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur.
Specified values guarantee functionality. Refer to other parameters for accuracy.
2
3
4
Specificationsare subject to change without notice
1, 2
ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V
Storage Temperature . . . . . . . . . . . . –65°C to +150°C
Digital Input Voltage to GND GND –0.5 to V +0.5 V
DD
Lead Temperature (Soldering, 10 seconds) . +300°C
I
, I
to GND . . . . . . . . . . . . . . . . . –0.5 to 6.5 V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V
OUT1 OUT2
Package Power Dissipation Rating to 75°C
V
V
REF
RFB
CDIP, PDIP, SOIC . . . . . . . . . . . . . . . . . . . . 800mW
Derates above 75°C . . . . . . . . . . . . . . . . . 11mW/°C
NOTES:
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
2
Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies.
APPLICATION NOTES
Refer to Section 8 in the 1995 Data Acquisition Products databook for Applications Information
Rev. 3.00
4
MP7523/XRD7523
16 LEAD PLASTIC DUAL-IN-LINE
(300 MIL PDIP)
9
16
1
E
1
8
E
D
A
2
A
L
Seating
Plane
C
α
A
1
B
B
e
1
e
B
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
A
A
A
B
B
0.145
0.015
0.115
0.014
0.030
0.008
0.745
0.300
0.240
0.210
0.070
0.195
0.024
0.070
0.014
0.840
0.325
0.280
3.68
0.38
2.92
0.36
0.76
0.20
18.92
7.62
6.10
5.33
1.78
4.95
0.56
1.78
0.38
21.34
8.26
7.11
1
2
1
C
D
E
E
e
1
0.100 BSC
2.54 BSC
e
L
α
0.310
0.430
0.160
15°
7.87
2.92
0°
10.92
4.06
15°
B
0.115
0°
Rev. 3.00
5
MP7523/XRD7523
16 LEAD SMALL OUTLINE
(150 MIL JEDEC SOIC)
D
16
9
E
H
8
C
A
Seating
Plane
α
e
B
A
1
L
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
A
0.053
0.004
0.013
0.007
0.386
0.150
0.069
0.010
0.020
0.010
0.394
0.157
1.35
0.10
0.33
0.19
9.80
3.80
1.75
0.25
0.51
0.25
10.00
4.00
A
B
1
C
D
E
e
0.050 BSC
1.27 BSC
H
L
0.228
0.244
0.050
5.80
0.40
6.20
1.27
0.016
α
0°
8°
0°
8°
Rev. 3.00
6
MP7523/XRD7523
16 LEAD SMALL OUTLINE
(300 MIL JEDEC SOIC)
D
16
9
E
H
8
C
A
Seating
Plane
α
e
B
A
1
L
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
A
0.093
0.004
0.013
0.009
0.398
0.291
0.104
0.012
0.020
0.013
0.413
0.299
2.35
0.10
0.33
0.23
10.10
7.40
2.65
0.30
0.51
0.32
10.50
7.60
A
B
1
C
D
E
e
0.050 BSC
1.27 BSC
H
L
0.394
0.419
0.050
10.00
0.40
10.65
1.27
0.016
α
0°
8°
0°
8°
Rev. 3.00
7
MP7523/XRD7523
16 LEAD EIAJ SMALL OUTLINE
(5.5 mm EIAJ SOP)
D
16
1
9
E
H
Pin 1 Indexer
8
C
A
A
2
Seating
Plane
α
e
B
A
1
L
MILLIMETERS
INCHES
SYMBOL
MIN
MAX
MIN
MAX
A
1.80
0.02
1.80
0.30
0.13
9.9
2.40
0.20
2.20
0.50
0.20
10.5
5.70
0.071
0.001
0.079
0.012
0.005
0.390
0.209
0.095
0.008
0.087
0.020
0.008
0.414
0.224
A
1
A
2
B
C
D
E
e
5.30
1.27 BSC
0.050 BSC
H
L
7.80
0.30
8.20
0.90
0.307
0.012
0.323
0.035
α
0°
15°
0°
15°
Rev. 3.00
8
MP7523/XRD7523
Notes
Rev. 3.00
9
MP7523/XRD7523
Notes
Rev. 3.00
10
MP7523/XRD7523
Notes
Rev. 3.00
11
MP7523/XRD7523
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im-
prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de-
scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits are
free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary
depending upon a user’s specific application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly
affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the
user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circum-
stances.
Copyright EXAR Corporation
Datasheet December 1996
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 3.00
12
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