SP3223ECY-L-TR [EXAR]
Intelligent 3.0V to 5.5V RS-232 Transceivers;
| 型号： | SP3223ECY-L-TR |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Intelligent 3.0V to 5.5V RS-232 Transceivers |
| 文件： | 总21页 (文件大小：803K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SP3223E/EB/EU
Intelligent +3.0V to +5.5V RS-232 Transceivers
FEATURES
• Meets true EIA/TIA-232-F Standards
EN
20
19
18
17
16
15
1
2
3
4
5
6
7
SHUTDOWN
Vcc
from a +3.0V to +5.5V power supply
• Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
C1+
V+
GND
C1-
T1OUT
R1IN
• AUTO ON-LINE® circuitry automatically
wakes up from a ꢀµA shutdown
• Minimum 250Kbps data rate under load
(EB)
SP3223E
C2+
C2-
V-
R1OUT
14
13
ONLINE
T1IN
• ꢀ Mbps data rate for high speed RS-232
(EU)
• Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
T2OUT
R2IN
8
9
12 T2IN
10
R2OUT
11 STATUS
• ESD Specifications:
+ꢀ5KV Human Body Model
+ꢀ5KV IEC6ꢀ000-4-2 Air Discharge
+8KV IEC6ꢀ000-4-2 Contact Discharge
Now Available in Lead Free Packaging
DESCRIPTION
The SP3223 products are RS-232 transceiver solutions intended for portable applications
such as notebook and hand held computers. These products use an internal high-efficiency,
charge-pump power supply thatrequires only0.ꢀµFcapacitorsin3.3Voperation.Thischarge
pump and Exar's driver architecture allow the SP3223 series to deliver compliant RS-232
performance from a single power supply ranging from +3.3V to +5.0V. The SP3223 is a 2-
driver/2-receiver device ideal for laptop/notebook computer and PDA applications.
The AUTO ON-LINE® feature allows the device to automatically "wake-up" during a shut-
down state when an RS-232 cable is connected and a connected peripheral is turned on.
Otherwise, the device automatically shuts itself down drawing less than ꢀµA.
SELECTION TABLE
Device
Power
Supplies
RS- 232
Drivers Receivers
RS-232
AUTO ON-LINE ®
TTL
3-state
Data Rate
(kbps)
SP3223E +3.0V to +5.5V
SP3223EB +3.0V to +5.5V
SP3223EU +3.0V to +5.5V
2
2
2
2
2
2
YES
YES
YES
YES
YES
YES
ꢀ20
250
ꢀ000
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
Output Voltages
TxOUT.............................................................+ꢀ3.2V
RxOUT, STATUS.......................-0.3V to (VCC + 0.3V)
Short-Circuit Duration
TxOUT.....................................................Continuous
Storage Temperature......................-65°C to +ꢀ50°C
V
.......................................................-0.3V to +6.0V
V+CC(NOTE ꢀ).......................................-0.3V to +7.0V
V- (NOTE ꢀ)........................................+0.3V to -7.0V
V+ + |V-| (NOTE ꢀ)...........................................+ꢀ3V
Power Dissipation per package
20-pin SSOP (derate 9.25mW/oC above +70oC)..750mW
20-pin TSSOP (derate ꢀꢀ.ꢀmW/oC above +70oC..900mW
I
(DC V or GND current).........................+ꢀ00mA
InCCput VolCtaC ges
TxIN, ONLINE,
SHUTDOWN, EN......................-0.3V to VCC + 0.3V
RxIN...................................................................+ꢀ5V
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed ꢀ3V.
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
.
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C (Note 2).
PARAMETER
MIN.
TYP.
MAX. UNITS
CONDITIONS
DC CHARACTERISTICS
All RxIN open, ONLINE = GND,
SHUTDOWN = Vcc, TxIN = Vcc or
GND, Vcc = +3.3V, TAMB = +25ºC
Supply Current,
ꢀ.0
ꢀ0
µA
AUTO ON-LINE®
SHUTDOWN = GND, TxIN =
Supply Current, Shutdown
ꢀ.0
0.3
ꢀ0
µA
Vcc or GND, Vcc = +3.3V, TAMB
+25ºC
=
Supply Current,
AUTO ON-LINE® Disabled
ꢀ.0
mA
ONLINE = SHUTDOWN = Vcc, No
Load, Vcc = +3.3V, TAMB = +25ºC
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
Vcc = 3.3V or 5.0V,
LOW
HIGH
GND
2.0
0.8
Vcc
V
TxIN, EN, SHUTDOWN, ONLINE
Input Leakage Current
+/-0.0ꢀ
+/-0.05
+/-ꢀ.0
+/-ꢀ0
0.4
µA
µA
TxIN, EN, ONLINE, SHUTDOWN,
TAMB = +25ºC, Vin = 0V to Vcc
Output Leakage Current
Receivers disabled, Vout = 0V to
Vcc
Output Voltage LOW
Output Voltage HIGH
V
V
IOUT = ꢀ.6mA
IOUT = -ꢀ.0mA
Vcc - 0.6 Vcc - 0.ꢀ
NOTE 2: C1 - C4 = 0.1µF, tested at 3.3V ±10%.
C1 = 0.047µF, C2-C4 = 0.33µF, tested at 5V±10%.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
2
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
.
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C (Note 2).
PARAMETER
MIN.
+/-5.0
300
TYP.
MAX. UNITS
CONDITIONS
Driver Outputs
All Driver outputs loaded with 3kΩ
to GND, TAMB = +25ºC
+/-5.4
V
Output Voltage Swing
Output Resistance
Ω
Vcc = V+ = V- = 0V, Vout = +/-2V
Vout = 0V
Output Short-Circuit Current
Output Leakage Current
+/-35
+/-60
+/-25
mA
µA
Vcc = 0V or 3.0V to 5.5V, Vout =
+/-ꢀ2V, Driver disabled
RECEIVER INPUTS
-ꢀ5
+ꢀ5
V
Input Voltage Range
Input Threshold LOW
Input Threshold LOW
Input Threshold HIGH
Input Threshold HIGH
Input Hysteresis
0.6
0.8
ꢀ.2
ꢀ.5
ꢀ.5
ꢀ.8
0.3
5
V
V
Vcc = 3.3V
Vcc = 5.0V
Vcc = 3.3V
Vcc = 5.0V
2.4
2.4
V
V
V
Input Resistance
3
7
k Ω
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = Vcc)
STATUS Output Voltage LOW
STATUS Output Voltage HIGH
Receiver Threshold to Drivers
0.4
V
V
IOUT = ꢀ.6mA
IOUT = -ꢀ.0mA
Figure ꢀ5
Vcc - 0.6
200
0.5
µs
Enabled (tONLINE
)
Receiver Positive or Negative
Threshold to STATUS HIGH
µs
µs
Figure ꢀ5
Figure ꢀ5
(tSTSH
)
Receiver Positive or Negative
Threshold to STATUS LOW
20
(tSTSL
)
NOTE 2: C1 - C4 = 0.1µF, tested at 3.3V ±10%.
C1 = 0.047µF, C2-C4 = 0.33µF, tested at 5V±10%.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
3
TIMING CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
.
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP.
MAX. UNITS
CONDITIONS
Maximum Data Rate
SP3223E
ꢀ20
250
235
RL = 3kΩ, CL = ꢀ000pF, One
Driver active
SP3223EB
SP3223EU
kbps
µA
ꢀ000
RL = 3kΩ, CL = 250pF, One Driver
active
Receiver Propagation Delay
tPHL and tPLH
0.ꢀ5
Receiver input to Receiver output,
CL = ꢀ50pF
Receiver Output Enable Time
200
200
ns
ns
Normal Operation
Normal Operation
Receiver Output Disable Time
Driver Skew
E, EB
ꢀ00
50
500
ꢀ00
ns
ns
│tPHL - tPLH│, TAMB = 25°C
EU
Receiver Skew
E, EB, EU
200
90
ꢀ000
30
ns
│tPHL - tPLH
│
Transition-Region Slew Rate
E, EB
EU
Vcc = 3.3V, RL = 3kΩ, TAMB
25°C, measurements taken from
-3.0V to +3.0V or +3.0V to -3.0V
=
V/µs
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
4
TYPICAL OPERATING CIRCUIT
Figure ꢀ. SP3223E Typical Operating Circuit
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250Kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
30
25
20
15
10
5
6
4
- Slew
+ Slew
TxOUT +
2
0
-2
-4
-6
1 Transmitter at 250Kbps
1 Transmitter at 15.6Kbps
All drivers loaded 3K + Load Cap
TxOUT -
0
0
500 1000
2000 3000 4000 5000
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Load Capacitance (pF)
Figure 2. Transmitter Output Voltage VS. Load
Capacitance for the SP3223EB
Figure 3. Slew Rate VS. Load Capacitance for the
SP3223EB
35
30
20
15
25
20
15
10
5
250Kbps
125Kbps
10
20Kbps
1 Transmitter at 250Kbps
2 Transmitters at 15.6Kbps
5
1 Transmitter at 250Kbps
All drivers loaded with 3K // 1000pF
1 Transmitter at 15.6Kbps
All drivers loaded 3K + Load Cap
0
0
0
1000
2000
3000
4000
5000
2.7
3
3.5
4
4.5
5
Load Capacitance (pF)
Supply Voltage (Vdc)
Figure 5. Supply Current VS. Supply Voltage for
the SP3223EB
Figure 4. Supply Current VS. Load Capacitance
when Transmitting Data for the SP3223EB
6
TxOUT +
4
2
0
-2
-4
-6
TxOUT -
2.7
3
3.5
pl
4
4.5
5
S
u
p
y
V
o
lt
a
g
(V
d
c)
Figure 6. Transmitter Output Voltage VS. Supply
Voltage for the SP3223EB
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, ꢀ000Kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
6
4
200
150
100
50
2
1Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
0
-2
-4
-6
T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad
0
0
250
500
1000
1500
2000
2.7
3
3.5
4
4.5
5
Load Capacitance (pF)
Supply Voltage (V)
Figure 7. Transmitter Skew VS. Load Capacitance
for the SP3223EU
Figure 8. Transmitter Output Voltage VS. Supply
Voltage for the SP3223EU
35
30
25
20
6
4
T1 at 1Mbps
T2 at 62.5Kbps
2
0
-2
-4
-6
15
T1 at 1Mbps
T2 at 62.5Kbps
10
5
0
0
250
500
1000
1500
0
250
500
1000
1500
Load Capacitance (pF)
Load Capacitance (pF)
Figure 9. Transmitter Output Voltage VS. Load
Capacitance for the SP3223EU
Figure ꢀ0. Supply Current VS. Load Capacitance for
the SP3223EU
6
4
20
15
2
T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
0
10
T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF
-2
5
0
with 3K//250pF
-4
-6
2.7
3
3.5
4
4.5
5
2.7
3
3.5
4
4.5
5
Supply Voltage (V)
Supply Voltage (V)
Figure ꢀꢀ. Supply Current VS. Supply Voltage for
the SP3223EU
Figure ꢀ2. Transmitter Output Voltage VS. Supply
Voltage for the SP3223EU
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
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PIN DESCRIPTION
Name
EN
Function
Pin #
Receiver Enable, Apply logic LOW for normal operation. Apply logic HIGH to
disable receiver outputs (high-Z state).
ꢀ
Cꢀ+
V+
Positive terminal of the voltage doubler charge-pump capacitor
Regulated +5.5V output generated by charge pump
Negative terminal of the voltage doubler charge-pump capacitor
Positive terminal of the inverting charge-pump capacitor
Negative terminal of the inverting charge-pump capacitor
Regulated -5.5V output generated by charge pump
RS-232 Driver output
2
3
Cꢀ-
4
C2+
5
C2-
6
V-
7
T2OUT
R2IN
R2OUT
STATUS
T2IN
8
RS-232 receiver input
9
TTL/CMOS receiver output
ꢀ0
ꢀꢀ
ꢀ2
ꢀ3
TTL/CMOS output indicating online and shutdown status
TTL/CMOS driver input
TꢀIN
TTL/CMOS driver input
Apply logic HIGH to override AUTO ON-LINE ® circuitry keeping drivers active
(SHUTDOWN must also be logic HIGH, refer to table 2).
ONLINE
ꢀ4
RꢀOUT
RꢀIN
TTL/CMOS receiver output
RS-232 receiver input
RS-232 Driver output
Ground
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
TꢀOUT
GND
Vcc
+3.0V to +5.5V supply voltage
Apply logic LOW to shut down drivers and charge pump. This overrides all
AUTO ON-LINE ® circuitry and ONLINE (refer to table 2).
SHUTDOWN
20
Table 2. Pin Description
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
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DESCRIPTION
THEORY OF OPERATION
The SP3223 is a 2-driver/2-receiver device
ideal for portable or handheld applications.
TheSP3223 transceiversmeettheEIA/TIA-
232 and ITU-T V.28/V.24 communication
protocolsandcanbeimplementedinbattery-
powered,portable,orhandheldapplications
such as notebook or handheld computers.
The SP3223 devices feature Exar's propri-
etary on-board charge pump circuitry that
generates±5.5VRS-232voltagelevelsfrom
a single +3.0V to +5.5V power supply.
The SP3223 series is made up of four basic
circuit blocks:
ꢀ. Drivers, 2. Receivers, 3. The Exar pro-
prietary charge pump, and 4. AUTO ON-
LINE® circuitry.
Drivers
The drivers are inverting level transmitters
thatconvertTTLorCMOSlogiclevelsto5.0V
EIA/TIA-232 levels with an inverted sense
relativetotheinputlogiclevels. Typically,the
RS-232 output voltage swing is +5.4V with
no load and +5V minimum fully loaded. The
driver outputs are protected against infinite
short-circuits to ground without degrada-
tion in reliability. These drivers comply with
the EIA-TIA-232F and all previous RS-232
versions. Unused driver inputs should be
connected to GND or VCC.
These devices are an ideal choice for power
sensitivedesigns.FeaturingAUTOON-LINE®
circuitry,theSP3223reducesthepowersup-
ply drain to a ꢀµA supply current. In many
portableorhandheldapplications,anRS-232
cable can be disconnected or a connected
peripheral can be turned off. Under these
conditions, the internal charge pump and
thedriverswillbeshutdown. Otherwise, the
system automatically comes online. This
feature allows design engineers to address
powersavingconcernswithoutmajordesign
changes.
The drivers can guarantee output data
rates fully loaded with 3kΩ in parallel with
ꢀ000pF, (SP3223EU, CL= 250pF) ensuring
compatibility with PC-to-PC communication
software.
VCC
The slew rate of the driver output on the
E and EB versions is internally limited to a
maximum of 30V/µs in order to meet the EIA
standards(EIARS-232D2.ꢀ.7,Paragraph5).
The Slew Rate of EU version is not limited
to enable higher speed data transfers. The
transition of the loaded output from HIGH to
LOW also meets the monotonicity require-
ments of the standard.
+
+
19
CC
0.1µF
C5
C1
V
2
3
7
C1+
V+
V-
+
+
0.1µF
C3
C4
0.1µF
0.1µF
4
5
C1-
C2+
SP3223E
+
0.1µF
C2
6
C2-
T1OUT
T2OUT
T1IN
17
8
11
12
RS-232
TTL/CMOS INPUTS
T2IN
OUTPUTS
UART
or
R1IN
R2IN
R1OUT
R2OUT
16
9
15
10
RS-232
INPUTS
5KΩ
5KΩ
Serial µC
TTL/CMOS OUTPUTS
Figureꢀ4showsaloopbacktestcircuitused
to test the RS-232 Drivers. Figure 15 shows
the test results where one driver was active
at 250kbps and all drivers are loaded with
anRS-232receiverinparallelwithaꢀ000pF
capacitor. RS-232 data transmission rate of
ꢀ20kbpstoꢀMbps providecompatibilitywith
designs in personal computer peripherals
and LAN applications.
EN
V
CC
20
14
SHUTDOWN
ONLINE
11
STATUS
GND
18
µP
Supervisor
IC
VIN
RESET
Figure ꢀ3. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
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Device: SP3223
SHUTDOWN
EN
0
TXOUT
RXOUT
Active
High Z
Active
High Z
0
0
ꢀ
ꢀ
High Z
High Z
Active
Active
ꢀ
0
ꢀ
Table 3. SHUTDOWN and EN Truth Tables
Note: In AUTOON-LINE® ModewhereONLINE=GND
and SHUTDOWN = VCC, the device will shut down if
there is no activity present at the Receiver inputs.
Receivers
The receivers convert ±5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels.
Receivers have an inverting output that can
be disabled by using the EN pin.
Figure ꢀ4. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Receivers are active when the AUTO ON-
LINE® circuitry is enabled or when in shut-
down.Duringtheshutdown,thereceiverswill
continue to be active. If there is no activity
present at the receivers for a period longer
thanꢀ00µsorwhenSHUTDOWNisenabled,
the device goes into a standby mode where
the circuit draws ꢀµA. Driving EN to a logic
HIGHforcestheoutputsofthereceiversinto
high-impedance. The truth table logic of the
SP3223 driver and receiver outputs can be
found in Table 2.
Figure ꢀ5. Loopback Test Circuit result at 250Kbps
(All Drivers Fully Loaded)
Since receiver input is usually from a trans-
mission line where long cable lengths and
system interference can degrade the signal,
the inputs have a typical hysteresis margin
of 300mV. This ensures that the receiver
is virtually immune to noisy transmission
lines. Should an input be left unconnected,
aninternal 5kΩpull-downresistortoground
will commit the output of the receiver to a
HIGH state.
Charge Pump
The charge pump uses a unique approach
compared to older less–efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical
5.5V power supplies. The internal power
supply consists of a regulated dual charge
pump that provides output voltages of
+/-5.5V regardless of input voltage (VCC)
over the +3.0V to +5.5V range. This
is important to maintain compliant RS-
232 levels regardless of power supply
fluctuations.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
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The charge pump operates in a discontinu-
ous mode using an internal oscillator. If the
output voltages are less than a magnitude
of 5.5V, the charge pump is enabled. If the
outputvoltages exceedamagnitudeof5.5V,
the charge pump is disabled. This oscillator
controls the four phases of the voltage shift-
ing. A description of each phase follows.
as the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately gener-
ated from VCC, in a no–load condition V+
and V– will be symmetrical. Older charge
pump approaches that generate V– from
V+ will show a decrease in the magnitude
of V– compared to V+ due to the inherent
inefficiencies in the design.
Phase 1
— VSS charge storage — During this phase
oftheclockcycle,thepositivesideofcapaci-
tors Cꢀ and C2 are initially charged to VCC.
Cl+ is then switched to GND and the charge
in Cꢀ– is transferred to C –. Since C2+ is con-
nected to V , the volta2ge potential across
capacitor C2CCis now 2 times VCC.
The Exar charge pump is designed to
operate reliably with a range of low cost
capacitors. Either polarized or non polar-
ized capacitors may be used. If polarized
capacitorsareusedtheyshouldbeoriented
as shown in the Typical Operating Circuit.
TheV+capacitormaybeconnectedtoeither
ground or Vcc (polarity reversed.)
Phase 2
— V transfer — Phase two of the clock
connSeSctsthenegativeterminalofC totheVSS
storagecapacitorandthepositivet2erminalof
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C3, the positive side of capacitor Cꢀ
is switched to VCC and the negative side is
connected to GND.
The charge pump operates with 0.ꢀµF
capacitors for 3.3V operation. For other
supply voltages, see table 4 for required
capacitor values. Do not use values smaller
than those listed. Increasing the capacitor
values (e.g., by doubling in value) reduces
ripple on the transmitter outputs and may
slightlyreducepowerconsumption. C2, C3,
and C4 can be increased without changing
Cꢀ’s value.
Phase 3
— VDD charge storage — The third phase of
the clock is identical to the first phase — the
charge transferred in Cꢀ produces –VCC in
the negative terminal of C , which is applied
to the negative side of caꢀpacitor C2. Since
C + is at V , the voltage potential across C2
is22 timesCVCCC.
For best charge pump efficiency locate the
charge pump and bypass capacitors as
close as possible to the IC. Surface mount
capacitors are best for this purpose. Using
capacitors with lower equivalent series re-
sistance (ESR) and self-inductance, along
with minimizing parasitic PCB trace induc-
tance will optimize charge pump operation.
Designers are also advised to consider that
capacitor values may shift over time and
operating temperature.
Phase 4
— VDD transfer — The fourth phase of
the clock connects the negative terminal
of C2 to GND, and transfers this positive
generated voltage across C2 to C4, the
VDD storage capacitor. This voltage is
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positivesideofcapacitorCꢀ isswitchedtoVCC
andthenegativesideisswitchedtoGND,al-
lowingthechargepumpcycletobeginagain.
The charge pump cycle will continue as long
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀꢀ
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure ꢀ6. Charge Pump - Phase ꢀ
V
= +5V
CC
C
4
+
–
+
V
Storage Capacitor
Storage Capacitor
DD
SS
+
+
–
C
C
2
1
–
–
V
C
–10V
3
Figure ꢀ7. Charge Pump - Phase 2
[
T
]
+6V
a) C2+
T
T
0V
0V
1
2
2
b) C
2
-
-6V
Ch1 2.00V Ch2 2.00V M 1.00ms Ch1 1.96V
Figure ꢀ8. Charge Pump Waveforms
V
= +5V
CC
C
+
+5V
4
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure ꢀ9. Charge Pump - Phase 3
V
= +5V
CC
C
+
+10V
4
–
+
V
Storage Capacitor
Storage Capacitor
DD
SS
+
+
–
C
C
2
1
–
–
V
C
3
Figure 20. Charge Pump - Phase 4
Minimum recommended charge pump capacitor value
Input Voltage VCC
Charge pump capacitor value
3.0V to 3.6V
4.5V to 5.5V
3.0V to 5.5V
Cꢀ - C4 = 0.ꢀµF
Cꢀ = 0.047µF, C2-C4 = 0.33µF
Cꢀ - C4 = 0.22µF
Table 4. Minimum Charge Pump Capacitor values
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The second stage of the AUTO ON-LINE®
circuitry, shown in Figure 23, processes
the receiver's RXINACT signal with an ac-
cumulated delay that disables the device to
a ꢀµA typical supply current. The STATUS
pin goes to a logic LOW when the cable
is disconnected, the external transmit-
ter is disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay
is around 20µs. When the SP3223 drivers
and internal charge pump are disabled, the
supply current is reduced to ꢀµA typical.
This can commonly occur in handheld or
portable applications where the RS-232
cable is disconnected or the RS-232 drivers
of the connected peripheral are truned off.
TheAUTOON-LINE® modecanbedisabled
by the SHUTDOWN pin. If this pin is a logic
LOW, the AUTO ON-LINE® function will not
operate regardless of the logic state of the
ONLINE pin. Table 5 summarizes the logic
of the AUTO ON-LINE® operating modes.
ThetruthtablelogicoftheSP3223driverand
receiver outputs can be found in Table 3.
AUTO ON-LINE® Circuitry
The SP3223 device has AUTO ON-LINE®
circuitry on board that saves power in ap-
plicationssuchaslaptopcomputers, PDA's,
and other portable systems.
The SP3223 device incorporates an AUTO
ON-LINE® circuit that automatically enables
itselfwhentheexternaltransmitterisenabled
and the cable is connected. Conversely,
the AUTO ON-LINE® circuit also disables
mostoftheinternalcircuitrywhenthedevice
is not being used and goes into a standby
mode where the device typically draws ꢀµA.
This function is externally controlled by the
ONLINE pin. When this pin is tied to a logic
LOW, the AUTO ON-LINE® function is ac-
tive. Once active, the device is enabled until
there is no activity on receiver inputs. The
receiver input typically sees at least ±3V,
which are generated from the transmitter
at the other end of the cable with a ±5V
minimum. When the external transmitter is
disabled or the cable is disconnected, the
receiver input will be pulled down by its
internal 5kΩ resistor to ground. When this
occurs over a period of time, the internal
transmitters will be disabled and the device
goes into a shutdown or standby mode.
When the ONLINE pin is HIGH, the AUTO
ON-LINE® mode is disabled.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to
a logic HIGH when the external transmitter
is enabled and the cable is connected.
When the SP3223 device is shutdown, the
charge pumps are turned off. V+ charge
pump output decays to VCC,the V- output
decays to GND. The decay time will depend
on the size of capacitors used for the charge
pump. Once in shutdown, the time required
to exit the shut down state and have valid
V+ and V- levels is typically 200µs.
The AUTO ON-LINE® circuit has two
stages:
ꢀ) Inactive Detection
2) Accumulated Delay
For easy programming, the STATUS can
be used to indicate DTR or a Ring Indicator
signal. Tying ONLINE and SHUTDOWN
together will bypass the AUTO ON-LINE®
circuitry so this connection acts like a shut-
down input pin
The first stage, shown in Figure 22, detects
an inactive input. A logic HIGH is asserted
on RXINACT if the cable is disconnected
or the external transmitters are disabled.
Otherwise, RXINACT will be at a logic LOW.
Thiscircuitisduplicatedforeachoftheother
receivers.
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ3
S
H
U
T
+2.7V
0V
-2.7V
RECEIVER
RS-232 INPUT
VOLTAGES
D
O
W
N
VCC
STATUS
0V
t
STSL
tSTSH
tONLINE
+5V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
-5V
Figure 2ꢀ. AUTO ON-LINE® Timing Waveforms
RS-232 SIGNAL
TRANSCEIVER
STATUS
AT RECEIVER
INPUT
SHUTDOWN
ONLINE
STATUS
Normal Operation
(AUTO ON-LINE©)
YES
NO
HIGH
HIGH
HIGH
LOW
HIGH
LOW
HIGH
LOW
LOW
Normal Operation
Shutdown
(AUTO ON-LINE©)
NO
YES
NO
LOW
LOW
HIGH/LOW
HIGH/LOW
HIGH
LOW
Shutdown
Shutdown
Table 5. AUTO ON-LINE® Logic
R INACT
X
Inactive Detection Block
RS-232
Receiver Block
R IN
X
R OUT
X
Figure 22. Stage I of AUTO ON-LINE® Circuitry
Delay
Buffer
Delay
Buffer
INACTIVE
R1ON
R2ON
SHUTDOWN
Figure 23. Stage II of AUTO ON-LINE® Circuitry
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ4
ESD TOLERANCE
is applied to points and surfaces of the
equipment that are accessible to personnel
during normal usage. The transceiver IC
receives most of the ESD current when the
ESDsourceisappliedtotheconnectorpins.
The test circuit for IEC6ꢀ000-4-2 is shown
on Figure 25. There are two methods within
IEC6ꢀ000-4-2,theAirDischargemethodand
the Contact Discharge method. With the Air
DischargeMethod,anESDvoltageisapplied
to the equipment under test (EUT) through
air. This simulates an electrically charged
person ready to connect a cable onto the
rear of the system only to find an unpleas-
ant zap just before the person touches the
backpanel. Thehighenergypotentialonthe
person discharges through an arcing path
to the rear panel of the system before he or
she even touches the system. This energy,
whether discharged directly or through air,
is predominantly a function of the discharge
current rather than the discharge voltage.
Variables with an air discharge such as
approach speed of the object carrying the
ESD potential to the system and humidity
will tend to change the discharge current.
For example, the rise time of the discharge
current varies with the approach speed.
The Contact Discharge Method applies the
ESDcurrentdirectlytotheEUT. Thismethod
was devised to reduce the unpredictability
of the ESD arc. The discharge current rise
time is constant since the energy is directly
transferred without the air-gap arc. In situ-
ations such as hand held systems, the ESD
charge can be directly discharged to the
equipment from a person already holding
the equipment. The current is transferred
on to the keypad or the serial port of the
equipment directly and then travels through
the PCB and finally to the IC.
The SP3223 series incorporates
ruggedized ESD cells on all driver output
andreceiverinputpins.TheESDstructureis
improved over our previous family for more
rugged applications and environments
sensitive to electro-static discharges and
associated transients. The improved ESD
tolerance is at least +ꢀ5kV without damage
nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 30ꢀ5.7
b) IEC6ꢀ000-4-2 Air-Discharge
c) IEC6ꢀ000-4-2 Direct Contact
The Human Body Model has been the
generally accepted ESD testing method
for semiconductors. This method is also
specified in MIL-STD-883, Method 3015.7
forESDtesting.ThepremiseofthisESDtest
is to simulate the human body’s potential to
store electro-static energy and discharge it
to an integrated circuit. The simulation is
performed by using a test model as shown
in Figure 24. This method will test the IC’s
capability to withstand an ESD transient
during normal handling such as in manu-
facturing areas where the IC's tend to be
handled frequently.
The IEC-6ꢀ000-4-2, formerly IEC80ꢀ-2, is
generallyusedfortestingESDonequipment
and systems. For system manufacturers,
they must guarantee a certain amount of
ESD protection since the system itself is ex-
posedtotheoutsideenvironmentandhuman
presence. The premise with IEC6ꢀ000-4-2
is that the system is required to withstand
an amount of static electricity when ESD
Figure 24. ESD Test Circuit for Human Body Model
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ5
Figure 25. ESD Test Circuit for IEC6ꢀ000-4-2
The circuit model in Figures 24 and 25 rep-
resentthetypicalESDtestingcircuitusedfor
allthreemethods. TheCS isinitiallycharged
with the DC power supply when the first
switch (SWꢀ) is on. Now that the capacitor
is charged, the second switch (SW2) is on
while SWꢀ switches off. The voltage stored
in the capacitor is then applied through R ,
the current limiting resistor, onto the devicSe
under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under
test receives a duration of voltage.
30A
ꢀ5A
0A
For the Human Body Model, the current
limitingresistor(RS)andthesourcecapacitor
(CS) are 1.5kΩ an 100pF, respectively. For
IEC-6ꢀ000-4-2, the current limiting resistor
(R ) and the source capacitor (CS) are 330Ω
anSꢀ50pF, respectively.
t=30ns
t=0ns
t →
Figure 26. ESD Test Waveform for IEC6ꢀ000-4-2
The higher CS value and lower R value in
the IEC6ꢀ000-4-2 model are moreSstringent
than the Human Body Model. The larger
storage capacitor injects a higher voltage
to the test point when SW2 is switched on.
The lower current limiting resistor increases
the current charge onto the test point.
DEVICE PIN
TESTED
HUMAN BODY
MODEL
IEC61000-4-2
Air Discharge Direct Contact
Level
Driver Outputs
Receiver Inputs
±15kV
±15kV
±15kV
±15kV
±8kV
±8kV
4
4
Table 6. Transceiver ESD Tolerance Levels
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ6
PACKAGE: 20 Pin TSSOP
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ7
PACKAGE: 20 Pin SSOP
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-70ꢀ7 • www.exar.com
SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ8
ORDERING INFORMATION
Part Number
Temperature Range
Package Types
SP3223EBCA-L...................................................0°C to +70°C-------------------------------------------- 20-pin SSOP
SP3223EBCA-L/TR.............................................0°C to +70°C-------------------------------------------- 20-pin SSOP
SP3223EBCY-L...................................................0°C to +70°C-------------------------------------------20-pin TSSOP
SP3223EBCY-L/TR.............................................0°C to +70°C-------------------------------------------20-pin TSSOP
SP3223EBEA-L.................................................-40°C to +85°C------------------------------------------- 20-pin SSOP
SP3223EBEA-L/TR...........................................-40°C to +85°C------------------------------------------- 20-pin SSOP
SP3223EBEY-L.................................................-40°C to +85°C------------------------------------------20-pin TSSOP
SP3223EBEY-L/TR ...........................................-40°C to +85°C------------------------------------------20-pin TSSOP
SP3223ECA-L.....................................................0°C to +70°C ..................................................... 20-pin SSOP
SP3223ECA-L/TR...............................................0°C to +70°C ..................................................... 20-pin SSOP
SP3223ECY-L .....................................................0°C to +70°C ...................................................20-pin TSSOP
SP3223ECY-L/TR ...............................................0°C to +70°C ...................................................20-pin TSSOP
SP3223EEA-L...................................................-40°C to +85°C.................................................... 20-pin SSOP
SP3223EEA-L/TR .............................................-40°C to +85°C.................................................... 20-pin SSOP
SP3223EEY-L....................................................-40°C to +85°C..................................................20-pin TSSOP
SP3223EEY-L/TR..............................................-40°C to +85°C..................................................20-pin TSSOP
SP3223EUCA-L ..................................................0°C to +70°C ..................................................... 20-pin SSOP
SP3223EUCA-L/TR ............................................0°C to +70°C ..................................................... 20-pin SSOP
SP3223EUCY-L...................................................0°C to +70°C ...................................................20-pin TSSOP
SP3223EUCY-L/TR.............................................0°C to +70°C ...................................................20-pin TSSOP
SP3223EUEA-L.................................................-40°C to +85°C.................................................... 20-pin SSOP
SP3223EUEA-L/TR...........................................-40°C to +85°C.................................................... 20-pin SSOP
SP3223EUEY-L.................................................-40°C to +85°C..................................................20-pin TSSOP
SP3223EUEY-L/TR...........................................-40°C to +85°C..................................................20-pin TSSOP
Note: "-L" indicates lead free packaging, "/TR" is for tape and reel option
PRODUCT NOMENCLATURE
SP3223 E U EY L /TR
Tape and Reel options
“L” suffix indicates Lead Free packaging
Package Type A= SSOP
Y=TSSOP
Part Number
Temperature Range C= Commercial Range 0ºc to 70ºC
E= Extended Range -40ºc to 85ºC
Speed Indicator Blank= 120Kbps
B= 250Kbps
U= 1Mbps
ESD Rating E= 15kV HBM and IEC 1000-4
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
ꢀ9
REVISION HISTORY
DATE
REVISION
---
DESCRIPTION
ꢀ0-06-06
Nov 20ꢀ0
Legacy Sipex data sheet
ꢀ.0.0
Convert to Exar data sheet format and remove EOL parts.
June 20ꢀ2
ꢀ.0.ꢀ
Correct type error on page ꢀ pin diagram. Pin 9 should be R2IN not RꢀIN,
Change ESD protection levels to IEC6ꢀ000-4-2.
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or
reliability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are
only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully
checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 20ꢀ2 EXAR Corporation
Datasheet June 20ꢀ2
For technical support please email Exar's Serial Technical Support group at: serialtechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
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SP3223E/EB/EU_ꢀ0ꢀ_0627ꢀ2
20
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SP3223ECY-L SP3223EEA-L SP3223EEY-L SP3223ECA-L SP3223ECA-L/TR SP3223EUEY-L SP3223EBCY-
L/TR SP3223EEA-L/TR SP3223EUEA-L SP3223EBCY-L SP3223ECY-L/TR SP3223EEY-L/TR SP3223EUCA-L
SP3223EBEY-L SP3223EUEY-L/TR SP3223EBCA-L/TR SP3223EUEA-L/TR SP3223EUCY-L SP3223EBEA-L
SP3223EUCY-L/TR SP3223EUCA-L/TR SP3223EBEA-L/TR SP3223EBCA-L SP3223EBEY-L/TR
相关型号：
SP3223ECY-L/TR
Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, CMOS, PDSO20, LEAD FREE, MO-153AC, TSSOP-20
EXAR
SP3223EEY-L
Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, CMOS, PDSO20, LEAD FREE, MO-153AC, TSSOP-20
SIPEX
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