SP3243EBCY-L
更新时间：2024-09-18 07:54:50
品牌：EXAR
描述：3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers
概述
规格参数
数据手册
替代型号SP3243EBCY-L 概述
3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers 3驱动器/接收器5智能+ 3.0V至+ 5.5V的RS - 232收发器 接口芯片 线路驱动器或接收器
SP3243EBCY-L 规格参数
| 是否无铅： | 不含铅 | 是否Rohs认证： | 符合 |
| 生命周期： | Obsolete | 零件包装代码： | TSSOP |
| 包装说明： | TSSOP, TSSOP28,.25 | 针数： | 28 |
| Reach Compliance Code： | compliant | ECCN代码： | EAR99 |
| HTS代码： | 8542.39.00.01 | 风险等级： | 5 |
| 差分输出： | NO | 驱动器位数： | 3 |
| 输入特性： | SCHMITT TRIGGER | 接口集成电路类型： | LINE TRANSCEIVER |
| 接口标准： | EIA-232-F; EIA-232; EIA-562; TIA-232-F; TIA-232; TIA-562; V.24; V.28 | JESD-30 代码： | R-PDSO-G28 |
| JESD-609代码： | e3 | 长度： | 9.7 mm |
| 湿度敏感等级： | 1 | 功能数量： | 3 |
| 端子数量： | 28 | 最高工作温度： | 70 °C |
| 最低工作温度： | 最小输出摆幅： | 10 V | |
| 最大输出低电流： | 0.0016 A | 封装主体材料： | PLASTIC/EPOXY |
| 封装代码： | TSSOP | 封装等效代码： | TSSOP28,.25 |
| 封装形状： | RECTANGULAR | 封装形式： | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
| 峰值回流温度（摄氏度）： | 260 | 电源： | 3.3/5 V |
| 认证状态： | Not Qualified | 最大接收延迟： | 150 ns |
| 接收器位数： | 5 | 座面最大高度： | 1.2 mm |
| 子类别： | Line Driver or Receivers | 最大压摆率： | 1 mA |
| 最大供电电压： | 5.5 V | 最小供电电压： | 3 V |
| 标称供电电压： | 3.3 V | 表面贴装： | YES |
| 技术： | CMOS | 温度等级： | COMMERCIAL |
| 端子面层： | Matte Tin (Sn) | 端子形式： | GULL WING |
| 端子节距： | 0.65 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | 40 | 宽度： | 4.4 mm |
| Base Number Matches： | 1 |
SP3243EBCY-L 数据手册
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PDF下载SP3243E
3 Driver/5 Receiver Intelligent +3.0V to +5.5V
RS-232 Transceivers
FEATURES
1
2
3
4
5
6
7
28
27
26
C2+
C2-
C1+
V+
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
V
CC
V-
25 GND
R1IN
R2IN
R3IN
24
C1-
■ AUTO ON-LINE® circuitry automatically
wakes up from a 1µA shutdown
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
SP3243E
23
ONLINE
22
21
20
19
R4IN
SHUTDOWN
STATUS
R2OUT
8
9
R5IN
T1OUT
T2OUT
T3OUT
10
11
R1OUT
■ Enhanced ESD Specifications:
+15kV Human Body Model
18 R2OUT
T3IN 12
17
16
15
R3OUT
R4OUT
R5OUT
+15kV IEC1000-4-2 Air Discharge
+8kV IEC1000-4-2 Contact Discharge
■ 250 Kbps min. transmission rate (EB)
■ 1000 Kbps min. transmission rate (EU)
■ Ideal for High Speed RS-232 Applications
13
14
T2IN
T1IN
Now Available in Lead Free Packaging
DESCRIPTION
The SP3243E products are 3 driver/5 receiver RS-232 transceiver solutions intended for portable
or hand-held applications such as notebook and palmtop computers. The SP3243E includes one
complementary receiver that remains alert to monitor an external device's Ring Indicate signal while
the device is shutdown. The SP3243E and EB devices feature slew-rate limited outputs for reduced
crosstalk and EMI. The "U" and "H" series are optimized for high speed with data rates up to 1Mbps,
easily meeting the demands of high speed RS-232 applications. The SP3243E series uses an internal
high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This
charge pump and Exar's driver architecture allow the SP3243E series to deliver compliant RS-232
performance from a single power supply ranging from +3.0V to +5.5V. The AUTO ON-LINE® feature
allows the device to automatically "wake-up" during a shutdown state when an RS-232 cable is con-
nected and a connected peripheral is turned on. Otherwise, the device automatically shuts itself down
drawing less than 1µA.
SELECTION TABLE
Device
Power
Supplies
RS-232 RS-232
Drivers Receivers Components On-Line
Circuitry State
External
Auto
TTL # of Data ESD
3-
Pins Rate Rating
SP3243E +3.0V to +5.5V
SP3243EB +3.0V to +5.5V
SP3243EH +3.0V to +5.5V
SP3243EU +3.0V to +5.5V
3
3
3
3
5
5
5
5
4 Capacitors
4 Capacitors
4 Capacitors
4 Capacitors
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
28
28
28
120
250
460
15kV
15kV
15kV
28 1000 15kV
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
V
.......................................................-0.3V to +6.0V
Power Dissipation per package
V+CC(NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
28-pin SOIC (derate 12.7mW/oC above +70oC).........1000mW
28-pin SSOP (derate 11.2mW/oC above +70oC)..........900mW
28-pin TSSOP (derate 13.2mW/oC above +70oC)......1059mW
32-pin QFN (derate 29.4mW/oC above +70oC)...........2352mW
Input Voltages
TxIN, ONLINE,SHUTDOWN, .....-0.3V to Vcc +6.0V
RxIN...................................................................+15V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, STATUS.......................-0.3V to (VCC +0.3V)
Short-Circuit Duration
TxOUT....................................................Continuous
Storage Temperature......................-65°C to +150°C
NOTE 1: V+ and V- can have maximum magnitudes of
7V, but their absolute difference cannot exceed 13V.
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current, AUTO ON-
LINE®
1.0
10
µA
All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, VCC = 3.3V
TAMB = 25oC, TxIN = GND or VCC
Supply Current, Shutdown
1.0
0.3
10
µA
SHUTDOWN = GND, VCC = 3.3V,
TAMB = 25oC, TxIN = Vcc or GND
Supply Current
AUTO ON-LINE® Disabled
1.0
mA
ONLINE = SHUTDOWN = Vcc, no
load, VCC = 3.3V, TAMB = +25oC,
TxIN = GND or VCC
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
LOW
VCC = =3.3V or =5.0V, TxIN
ONLINE, SHUTDOWN
0.8
V
V
HIGH
2.4
Input Leakage Current
+0.01
+0.05
+1.0
µA
TxIN, ONLINE, SHUTDOWN,
TAMB = +25oC, VIN = 0V to VCC
Output Leakage Current
Output Voltage LOW
Output Voltage HIGH
DRIVER OUTPUTS
Output Voltage Swing
+10
0.4
µA
V
Receivers disabled, VOUT = 0V to VCC
IOUT = 1.6mA
VCC -0.6 VCC -0.1
V
IOUT = -1.0mA
+5.0
+5.4
V
All driver outputs loaded with 3KΩ to
GND, TAMB = +25oC
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
2
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP. MAX. UNITS CONDITIONS
DRIVER OUTPUTS (continued)
Output Resistance
300
Ω
mA
µA
VCC = V+ = V- = 0V, VOUT=+2V
Output Short-Circuit Current
Output Leakage Current
+35
+60
+25
VOUT = 0V
VCC = 0V or 3.0V to 5.5V, VOUT
=
+12V, Drivers disabled
RECEIVER INPUTS
Input Voltage Range
Input Threshold LOW
Input Threshold LOW
Input Threshold HIGH
Input Threshold HIGH
Input Hysteresis
-15
0.6
0.8
15
V
V
1.2
1.5
1.5
1.8
0.3
5
Vcc = 3.3V
Vcc = 5.0V
Vcc = 3.3V
Vcc = 5.0V
V
2.4
2.4
V
V
V
Input Resistance
3
7
kΩ
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC) 25°C
STATUS Output Voltage LOW
STATUS Output Voltage HIGH
0.4
V
V
IOUT = 1.6mA
IOUT = -1.0mA
VCC -0.6
Receiver Threshold to Drivers
350
0.2
30
µs
µs
µs
Figure 14
Figure 14
Figure 14
Enabled (tONLINE
)
Receiver Positive or Negative
Threshold to STATUS HIGH (tSTSH
)
Receiver Positive or Negative
Threshold to STATUS LOW (tSTSL
TIMING CHARACTERISTICS
Maximum Data Rate (U)
)
1000
460
250
120
Kbps
RL = 3KΩ, CL = 250pF, one driver
active
RL = 3KΩ, CL = 1000pF, one
driver active
RL = 3KΩ, CL = 1000pF, one
driver active
RL = 3KΩ, CL = 1000pF, one
driver active
(H)
(B)
( - )
Receiver Propagation Delay
tPHL
tPLH
0.15
0.15
µs
Receiver input to Receiver out-
put, CL = 150pF
Receiver Output Enable Time
Receiver Output Disable Time
200
200
ns
ns
ns
Normal operation
Normal operation
Driver Skew (E, EB)
(EU)
100
50
500
100
| tPHL - tPLH
|
Receiver Skew
50
ns
| tPHL - tPLH
|
Transition-Region Slew Rate (U)
(EB)
90
V/µs
Vcc = 3.3V, RL = 3kΩ, TAMB =
25°C, measurements taken from
6
30
-3.0V to +3.0V or +3.0V to -3.0V
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
3
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
6
4
200
150
100
50
2
1Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
0
-2
-4
-6
T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad
0
2.7
3
3.5
4
4.5
5
0
250
500
1000
1500
2000
Supply Voltage (V)
Load Capacitance (pF)
Figure 1. Transmitter Skew VS. Load Capacitance
Figure 2. Transmitter Output Voltage VS. Supply
Voltage for the SP3243EU
40
35
6
2Mbps
1.5Mbps
4
2
1Mbps
1Mbps
30
25
20
15
10
5
120Kbps
20Kbps
250Kbps
1 TX at full data rate
2 TX’s at1/16 data rate
0
-2
-4
-6
1 Transmitter at full Data Rate
2 Transmitters at 15.5 Kbps
1.5Mbps
2Mbps
All Transmitters loades 3K + Load Cap
0
0
250
500
1000
1500
2000
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Load Capacitance (pF)
Figure 3. Transmitter Output Voltage VS. Load
Capacitance for the SP3243EU
Figure 4. Supply Current VS. Load Capacitance for
the SP3243EU
6
25
20
15
4
TxOUT +
2
0
10
1 Transmitter at 250Kbps
-2
2 Transmitters at 15.6Kbps
TxOUT -
-4
5
0
All drivers loaded with 3K // 1000pF
-6
2.7
3
3.5
4
4.5
5
0
1000
2000
3000
4000
5000
Supply Voltage (V
)
DC
Load Capacitance (pF)
Figure 5. Supply Current VS. Supply Voltage for the
Figure 6. Transmitter Output Voltage VS. Load
SP3243EU
Capacitance for the SP3243EB
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
4
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
25
- Slew
20
+ Slew
15
10
1 Transmitter at 250Kbps
2 Transmitter at 15.6Kbps
5
All drivers loaded 3K + Load Cap
0
0
500 1000
2000 3000 4000 5000
Load Capacitance (pF)
Figure 7. Slew Rate VS. Load Capacitance
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
5
PIN NUMBER
NAME
FUNCTION
SP3243E
SP3243EUCR
QFN
28
26
22
29
31
32
2
C1+
Positive terminal of the voltage doubler charge-pump capacitor
Regulated +5.5V output generated by the charge pump
Negative terminal of the voltage doubler charge-pump capacitor
Positive terminal of the inverting charge-pump capacitor
Negative terminal of the inverting charge-pump capacitor
Regulated -5.5V output generated by the charge pump
RS-232 receiver input.
28
27
24
1
V+
C1-
C2+
C2-
2
V-
3
R1IN
4
R2IN
RS-232 receiver input
5
3
R3IN
RS-232 receiver input
6
4
R4IN
RS-232 receiver input
7
5
R5IN
RS-232 receiver input
8
6
R1OUT
R2OUT
R2OUT
R3OUT
R4OUT
R5OUT
STATUS
T1IN
TTL/CMOS receiver output
19
18
20
17
16
15
21
14
13
17
16
18
15
14
13
19
12
11
TTL/CMOS receiver output
Non-inverting receiver-2 output, active in shutdown
TTL/CMOS receiver output
TTL/CMOS receiver output
TTL/CMOS receiver output
TTL/CMOS Output indicating online and shutdown status
TTL/CMOS driver input
T2IN
TTL/CMOS driver input
T3IN
TTL/CMOS driver input
12
23
10
21
ONLINE
Apply logic HIGH to override AUTO ON-LINE® circuitry
keeping drivers acive (SHUTDOWN must also be logic
HIGH, refer to Table 2)
T1OUT
RS-232 driver output
9
7
T2OUT
T3OUT
RS-232 driver output
RS-232 driver output
10
11
8
9
GND
VCC
Ground
25
26
22
23
25
20
+3.0V to +5.5V supply voltage
SHUTDOWN Apply logic LOW to SHUTDOWN driver and charge pump.
This overrides all AUTO ON-LINE® circuitry and ONLINE
(Refer to table 2)
NC
No Connection
-
1,24,27,30
Table 1. Device Pin Description
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
6
VCC
+
+
26
0.1
µ
F
F
C5
C1
VCC
28
27
3
C1+
V+
V-
+
+
0.1
µ
µ
C3
C4
0.1
µ
F
F
24
1
C1-
C2+
SP3243E
+
0.1
µ
C2
0.1
F
2
14
13
C2-
T1IN
T1OUT
T2OUT
T3OUT
9
T IN
2
10
11
RS-232
TTL/CMOS
INPUTS
OUTPUTS
T3IN
12
R2OUT
20
19
R1IN
R2IN
R3IN
R4IN
R5IN
R OUT
1
4
5
6
7
8
5kΩ
R2OUT
R3OUT
R4OUT
R5OUT
18
17
16
15
TTL/CMOS
OUTPUTS
5kΩ
RS-232
INPUTS
5kΩ
5kΩ
5kΩ
V
CC
22
23
SHUTDOWN
ONLINE
To µ P Supervisor
Circuit
21
STATUS
GND
25
Figure 8. SP3243E Typical Operating Circuit
1
2
3
4
5
6
7
8
24
NC
NC
GND
C1-
ONLINE
SHUTDOWN
STATUS
23
R IN
1
22
R IN
2
21
R IN
3
SP3243E
20
19
18
17
R IN
4
R IN
5
T OUT
T OUT
R OUT
1
2
R OUT
1
2
Figure 9. SP3243E QFN Pinout Configuration
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
7
DESCRIPTION
In many portable or hand-held applications, an
RS-232cablecanbedisconnectedoraconnected
peripheral can be turned off. Under these condi-
tions,theinternalchargepumpandthedriverswill
be shut down. Otherwise, the system automati-
cally comes online. This feature allows design
engineers to address power saving concerns
without major design changes.
The SP3243E transceivers meet the EIA/TIA-
232andITU-TV.28/V.24communicationprotocols
and can be implemented in battery-powered,
portable, or hand-held applications such as
notebook or palmtop computers. The SP3243E
devices feature Exar's proprietary and patented
(U.S.-- 5,306,954) on-board charge pump cir-
cuitrythatgenerates±5.5VRS-232voltagelevels
from a single +3.0V to +5.5V power supply. The
SP3243EU devices can operate at a data rate
of 1000kbps fully loaded.
THEORY OF OPERATION
The SP3243E series is made up of four basic
circuit blocks:
1. Drivers
2. Receivers
The SP3243E is a 3-driver/5-receiver device,
ideal for portable or hand-held applications.
The SP3243E includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
3. the Exar proprietary charge pump, and
4. AUTO ON-LINE® circuitry.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative
to the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5Vminimumfullyloaded. Thedriveroutputsare
protected against infinite short-circuits to ground
without degradation in reliability. These drivers
comply with the EIA-TIA-232-F and all previous
RS-232 versions. Unused drivers inputs should
be connected to GND or VCC.
The SP3243E series is an ideal choice for power
sensitivedesigns.The SP3243Edevicesfeature
AUTO ON-LINE® circuitry which reduces the
power supply drain to a 1µA supply current.
V
CC
Thedrivershaveaminimumdatarateof250kbps
(EB) or 1000kbps (EU) fully loaded.
+
+
26
0.1 µF
0.1 µF
C5
C1
V
CC
28
27
3
C1+
V+
V-
+
+
C3
C4
0.1 µF
0.1 µF
24
1
C1-
C2+
SP3243E
Figure 11 shows a loopback test circuit used to
test the RS-232 Drivers. Figure 12 shows the
testresultswhereonedriverwasactiveat1Mbps
and all three drivers loaded with an RS-232 re-
ceiver in parallel with a 250pF capacitor. Figure
13 shows the test results of the loopback circuit
with all drivers active at 250kbps with typical
RS-232loadsinparallelwith1000pFcapacitors.A
superiorRS-232datatransmissionrateof1Mbps
makes the SP3243EU an ideal match for high
speed LAN and personal computer peripheral
applications.
+
C2
0.1 µF
2
C2-
T1 IN
T1OUT
T2 OUT
T3 OUT
9
TxD
RTS
DTR
14
T2IN
T3IN
10
11
13
12
RS-232
OUTPUTS
R2OUT
20
19
UART
or
R
1 IN
R1 OUT
4
5
RxD
CTS
5KΩ
5KΩ
Serial µC
R2IN
R3IN
R4IN
R5IN
R2OUT
R3OUT
R4OUT
R5OUT
18
17
16
15
DSR
DCD
RI
6
7
8
RS-232
INPUTS
5KΩ
5KΩ
5KΩ
V
CC
22
23
SHUTDOWN
ONLINE
21
STATUS
GND
25
µ P
Supervisor
IC
V
IN
RESET
Figure 10. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
8
+3V to +5V
Device: SP3243E
+
+
0.1 µF
0.1 µF
C5
C1
V
CC
SHUTDOWN
TxOUT
RxOUT
R2OUT
C1+
V+
V-
+
+
C3
C4
0.1 µF
0.1 µF
0
1
High-Z
Active
High-Z
Active
Active
Active
C1-
C2+
SP3243
+
C2
0.1 µF
C2-
T1OUT
TXOUT
T1IN
Table 2. SHUTDOWN Truth Tables
TTL/CMOS
INPUTS
Note: InAUTOON-LINE® ModewhereONLINE=GND
and SHUTDOWN = VCC, the device will shut down if
there is no activity present at the Receiver inputs.
TXIN
R1OUT
R1IN
5KΩ
TTL/CMOS
OUTPUTS
Receivers
RXOUT
RXIN
5KΩ
The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. Re-
ceivers are High-Z when the AUTO ON-LINE®
circuitry is enabled or when in shutdown. The
truthtablelogicoftheSP3243driverandreceiver
outputs can be found in Table 2.
1000pF
1000pF
V
CC
SHUTDOWN
ONLINE
STATUS
To µP Supervisor
Circuit
GND
18
Figure 11. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
The SP3243E includes an additional non-in-
verting receiver with an output R2OUT. R2OUT
is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows a Ring Indicator (RI) signal from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5KΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Figure 12. Loopback Test results at 1Mbps
Figure 13. Loopback Test results at 250Kbps
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
9
Charge Pump
Phase 4
The charge pump is a Exar–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of
the input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compli-
ant RS-232 levels regardless of power supply
fluctuations.
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultane-
ous with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND, al-
lowing the charge pump cycle to begin again.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
besymmetrical. Olderchargepumpapproaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design. The clock
rate for the charge pump typically operates at
greater than 250kHz. The external capacitors
can be as low as 0.1µF with a 16V breakdown
voltage rating.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump
is disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— VSS charge storage — During this phase of the
clock cycle, the positive side of capacitors C1 and
C2 areinitiallychargedtoVCC. Cl+ isthenswitched
toGNDandthechargeinC1– istransferredtoC2–.
SinceC2+ isconnectedtoVCC,thevoltagepotential
across capacitor C2 is now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
SimultaneouswiththetransferofthevoltagetoC3,
thepositivesideofcapacitorC1 isswitchedtoVCC
and the negative side is connected to GND.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at VCC, the volt-
age potential across C2 is 2 times VCC.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
10
Minimum recommended charge pump capacitor value
Input Voltage Vcc
Charge pump capacitor value for SP32XX
C1 - C4 = 0.1µF
3.0V to 3.6V
4.5V to 5.5V
3.0V to 5.5V
C1 = 0.047µF, C2 - C4 = 0.33µF
C1 - C4 = 0.22µF
The Exar-patented charge pumps are designed
to operate reliably with a range of low cost
capacitors. Either polarized or non polarized
capacitors may be used. If polarized capacitors
are used they should be oriented as shown in
the Typical Operating Circuit. The V+ capaci-
tor may be connected to either ground or Vcc
(polarity reversed.)
reduces ripple on the transmitter outputs and
may slightly reduce power consumption. C2,
C3, and C4 can be increased without changing
C1’s value.
For best charge pump efficiency locate the
charge pump and bypass capacitors as close
as possible to the IC. Surface mount capacitors
are best for this purpose. Using capacitors with
lower equivalent series resistance (ESR) and
self-inductance, along with minimizing parasitic
PCB trace inductance will optimize charge pump
operation. Designersarealsoadvisedtoconsider
that capacitor values may shift over time and
operating temperature.
Thechargepumpoperateswith0.1µFcapacitors
for3.3Voperation. Forothersupplyvoltages,see
thetableforrequiredcapacitorvalues.Donotuse
values smaller than those listed. Increasing the
capacitor values (e.g., by doubling in value)
AUTO ONLINE CIRCUITRY
The SP3243E devices have a patent pending
AUTO ON-LINE® circuitry on board that saves
power in applications such as laptop computers,
palmtop (PDA) computers and other portable
systems.
When the external transmitters are disabled or
the cable is disconnected, the receiver inputs will
be pulled down by their internal 5kΩ resistors to
ground. When this occurs over a period of time,
the internal transmitters will be disabled and the
device goes into a shutdown or standy mode.
When ONLINE is HIGH, the AUTO ON-LINE®
mode is disabled.
The SP3243E devices incorporate an AUTO
ON-LINE® circuitthatautomaticallyenablesitself
when the external transmitters are enabled and
the cable is connected. Conversely, the AUTO
ON-LINE® circuit also disables most of the inter-
nal circuitry when the device is not being used
and goes into a standby mode where the device
typically draws 1µA. This function is externally
controlled by the ONLINE pin. When this pin is
tiedtoalogicLOW, theAUTOON-LINE® function
is active. Once active, the device is enabled until
there is no activity on the receiver inputs. The
receiver input typically sees at least +3V, which
are generated from the transmitters at the other
end of the cable with a +5V minimum.
The AUTO ON-LINE® circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
11
S
H
U
T
+2.7V
0V
RECEIVER
RS-232 INPUT
VOLTAGES
D
O
W
N
-2.7V
VCC
STATUS
0V
tSTSL
t
STSH
tONLINE
+5V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
-5V
Figure 14. AUTO ON-LINE® Timing Waveforms
The first stage, shown in Figure 21, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit is
duplicated for each of the other receivers.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.
When the SP3243E devices are shut down, the
charge pumps are turned off. V+ charge pump
output decays to VCC, the V- output decays to
GND. The decay time will depend on the size
of capacitors used for the charge pump. Once
in shutdown, the time required to exit the shut
down state and have valid V+ and V- levels is
typically 200µs.
ThesecondstageoftheAUTOON-LINE® circuitry,
shown in Figure 22, processes all the receiver's
RXINACT signals with an accumulated delay that
disables the device to a 1µA supply current.
The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmit-
ters are disabled, or the SHUTDOWN pin is
invoked.Thetypicalaccumulateddelayisaround
20µs.
For easy programming, the STATUS can be
used to indicate DSR or a Ring Indicator sig-
nal. Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE® circuitry so this
connection acts like a shutdown input pin.
When the SP3243E drivers or internal charge
pump are disabled, the supply current is reduced
to 1µA. This can commonly occur in hand-held
or portable applications where the RS-232 cable
is disconnected or the RS-232 drivers of the con-
nected peripheral are turned off.
The AUTO ON-LINE® mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE® function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON-
LINE® operating modes. The truth table logic of
the SP3243E driver and receiver outputs can be
found in Table 2.
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SP3243E_100_072309
12
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
SS
C
–5V
–5V
3
Figure 15. Charge Pump — Phase 1
V
CC
= +5V
C
4
+
–
V
V
Storage Capacitor
DD
+
–
+
C
1
C
2
–
+
–
Storage Capacitor
SS
C
3
-5.5V
Figure 16. Charge Pump — Phase 2
V
= +5V
CC
C
+5V
4
+
–
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
+
–
SS
C
–5V
–5V
3
Figure 17. Charge Pump — Phase 3
V
CC
= +5V
+5.5V
+
C
4
+
–
+
V
Storage Capacitor
DD
+
–
C
1
C
2
–
–
V
SS
Storage Capacitor
C
3
Figure 18. Charge Pump — Phase 4
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SP3243E_100_072309
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The SP3243E driver outputs are able to maintain
voltage under loading of up to 2.5mA per driver,
ensuring sufficient output for mouse-driving ap-
plications.
6
4
Vout+
Vout-
2
0
+
-
V
OUT
0
0
-2
-4
-6
Load Current Per Transmitter [mA]
1
VOUT
Figure 19. SP3243E Driver Output Voltages vs. Load
Current per Transmitter
V
CC
+
+
26
0.1 µF
0.1 µF
C5
C1
V
CC
28
27
3
C1+
V+
V-
+
+
C3
C4
0.1 µF
0.1 µF
24
1
C1-
SP3243E
C2+
+
C2
0.1 µF
2
14
13
C2-
T1IN
T1OUT
T2OUT
T3OUT
9
T2IN
T3IN
10
11
12
R2OUT
20
19
R1IN
R2IN
R3IN
R4IN
R5IN
R1OUT
4
5
5k Ω
R2OUT
R3OUT
R4OUT
R5OUT
18
5k Ω
6
7
8
17
16
15
5k Ω
5k Ω
5k Ω
DB-9
Connector
VCC
22
23
SHUTDOWN
ONLINE
1
2
3
4
5
6
To µP Supervisor
Circuit
21
STATUS
GND
25
7
8
9
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
Figure 20. Circuit for the connectivity of the SP3243E with a DB-9 connector
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
14
RS-232 SIGNAL
AT RECEIVER
INPUT
SHUTDOWN
INPUT
TRANSCEIVER
ONLINE INPUT
STATUS OUTPUT
STATUS
Normal Operation
(Auto-Online)
YES
NO
HIGH
HIGH
HIGH
LOW
LOW
HIGH
LOW
LOW
HIGH
LOW
LOW
HIGH
Normal Operation
Shutdown
(Auto-Online)
NO
LOW
YES
NO
Shutdown
Shutdown
HIGH / LOW
HIGH / LOW
Table 3. AUTO ON-LINE® Logic
R INACT
X
Inactive Detection Block
RS-232
Receiver Block
R OUT
X
R IN
X
Figure 21. Stage I of AUTO ON-LINE® Circuitry
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
STATUS
R1INACT
R4INACT
R5INACT
R2INACT
R3INACT
SHUTDOWN
Figure 22. Stage II of AUTO ON-LINE® Circuitry
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SP3243E_100_072309
15
current when the ESD source is applied to the
connector pins. The test circuit for IEC1000-4-2
is shown on Figure 24. There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
ESD TOLERANCE
The SP3243E series incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications
and environments sensitive to electro-static dis-
chargesandassociatedtransients.Theimproved
ESD tolerance is at least +15kV without damage
nor latch-up.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
throughair. Thissimulatesanelectricallycharged
person ready to connect a cable onto the rear of
the system only to find an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the sys-
tem. This energy, whether discharged directly
or through air, is predominantly a function of
the discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
There are different methods of ESD testing ap-
plied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semi-con-
ductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body’s potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 23. This method
will test the IC’s capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the ICs tend to be
handled frequently.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the ESD
arc. The discharge current rise time is constant
sincetheenergyisdirectlytransferredwithoutthe
air-gap arc. In situations such as hand held sys-
tems, the ESD charge can be directly discharged
to the equipment from a person already holding
the equipment. The current is transferred on to
the keypad or the serial port of the equipment
directly and then travels through the PCB and
finally to the IC.
TheIEC-1000-4-2,formerlyIEC801-2,isgenerally
used for testing ESD on equipment and systems.
Forsystemmanufacturers,theymustguaranteea
certainamountofESDprotectionsincethesystem
itself is exposed to the outside environment and
human presence. The premise with IEC1000-4-
2 is that the system is required to withstand an
amount of static electricity when ESD is applied
to points and surfaces of the equipment that are
accessible to personnel during normal usage.
The transceiver IC receives most of the ESD
R
S
R
C
SW1
SW2
Device
C
DC Power
Source
S
Under
Test
Figure 23. ESD Test Circuit for Human Body Model
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
16
Contact-Discharge Model
R
R
R
V
C
S
SW1
SW2
Device
Under
Test
C
DC Power
Source
S
and
add up to 330Ω for IEC1000-4-2.
R
V
R
S
Figure 24. ESD Test Circuit for IEC1000-4-2
ThecircuitmodelsinFigures23and24represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
30A
15A
0A
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kΩan100pF,respectively. ForIEC-1000-4-2,
thecurrentlimitingresistor(RS)andthesourceca-
pacitor (CS) are 330Ω an 150pF, respectively.
t = 0ns
t = 30ns
t →
Figure 25. ESD Test Waveform for IEC1000-4-2
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capaci-
tor injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the
test point.
DEVICE PIN
TESTED
HUMAN BODY
MODEL
IEC1000-4-2
Air Discharge Direct Contact
Level
Driver Outputs
Receiver Inputs
+15kV
+15kV
+15kV
+15kV
+8kV
+8kV
4
4
Table 4. Transceiver ESD Tolerance Levels
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SP3243E_100_072309
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PACKAGE: 28 PIN WSOIC
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SP3243E_100_072309
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PACKAGE: 32 PIN QFN
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SP3243E_100_072309
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PACKAGE: 28 PIN SSOP
e
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SP3243E_100_072309
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PACKAGE: 28 PIN TSSOP
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SP3243E_100_072309
21
PRODUCT NOMENCLATURE
SP3243 E U EY L /TR
Tape and Reel options
“L” suffix indicates Lead Free packaging
Package Type A= SSOP
Y= TSSOP
T= WSOIC
Part Number
R= QFN
Temperature Range C= Commercial Range 0ºc to 70ºC
E= Extended Range -40ºc to 85ºC
Speed Indicator Blank= 120Kbps
B= 250Kbps
H= 460kbps
U= 1Mbps
ESD Rating E= 15kV HBM and IEC 1000-4
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SP3243E_100_072309
22
ORDERING INFORMATION
Part Number
Data Rate (kbps)
120
Temp. Range
Package
SP3243ECA-L
SP3243ECT-L
SP3243ECY-L
SP3243EEA-L
SP3243EET-L
SP3243EEY-L
SP3243EBCA-L
SP3243EBCT-L
SP3243EBCY-L
SP3243EBER-L
SP3243EBEA-L
SP3243EBET-L
SP3243EBEY-L
SP3243EBER-L
SP3243EHCA-L
SP3243EHCT-L
SP3243EHEA-L
SP3243EHET-L
SP3243EUCA-L
SP3243EUCT-L
SP3243EUCY-L
SP3243EUER-L
SP3243EUEA-L
SP3243EUET-L
SP3243EUEY-L
SP3243EUER-L
0C to +70C
0C to +70C
0C to +70C
-40C to +85C
-40C to +85C
-40C to +85C
0C to +70C
0C to +70C
0C to +70C
0C to +70C
-40C to +85C
-40C to +85C
-40C to +85C
-40C to +85C
0C to +70C
0C to +70C
-40C to +85C
-40C to +85C
0C to +70C
0C to +70C
0C to +70C
0C to +70C
-40C to +85C
-40C to +85C
-40C to +85C
-40C to +85C
28 Pin SSOP
28 Pin WSOIC
28 Pin TSSOP
28 Pin SSOP
28 Pin WSOIC
28 Pin TSSOP
28 Pin SSOP
28 Pin WSOIC
28 Pin TSSOP
32 Pin QFN
120
120
120
120
120
250
250
250
250
250
28 Pin SSOP
28 Pin WSOIC
28 Pin TSSOP
32 Pin QFN
250
250
250
460
28 Pin SSOP
28 Pin WSOIC
28 Pin SSOP
28 Pin WSOIC
28 Pin SSOP
28 Pin WSOIC
28 Pin TSSOP
32 Pin QFN
460
460
460
1000
1000
1000
1000
1000
1000
1000
1000
28 Pin SSOP
28 Pin WSOIC
28 Pin TSSOP
32 Pin QFN
For Tape and Reel option add "/TR", Example: SP3243ECA-L/TR.
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SP3243E_100_072309
23
REVISION HISTORY
DATE
REVISION DESCRIPTION
02/05/06
07/23/09
--
Legacy Sipex Datasheet
1.0.0
Convert to Exar Format, Update ordering information and
change revision to 1.0.0.
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reli-
ability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are
only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully
checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2009 EXAR Corporation
Datasheet July 2009
Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
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SP3243E_100_072309
24
SP3243EBCY-L CAD模型
引脚图
封装焊盘图
SP3243EBCY-L 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| SP3243EBCY-L/TR | EXAR | 3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers | 完全替代 |
|
SP3243EBCY-L 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| SP3243EBCY-L/TR | EXAR | 3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers | 获取价格 |
|
| SP3243EBCY/TR | SIPEX | Intelligent +3.0V to +5.5V RS-232 Transceivers | 获取价格 |
|
| SP3243EBEA | SIPEX | Intelligent +3.0V to +5.5V RS-232 Transceivers | 获取价格 |
|
| SP3243EBEA-L | EXAR | 3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers | 获取价格 |
|
| SP3243EBEA-L/TR | EXAR | 3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers | 获取价格 |
|
| SP3243EBEA/TR | SIPEX | Intelligent +3.0V to +5.5V RS-232 Transceivers | 获取价格 |
|
| SP3243EBEP | EXAR | Line Driver/Receiver, | 获取价格 |
|
| SP3243EBEP-L | EXAR | Line Driver/Receiver, | 获取价格 |
|
| SP3243EBEP-L/TR | EXAR | Line Driver/Receiver, | 获取价格 |
|
| SP3243EBEP/TR | EXAR | Line Driver/Receiver, | 获取价格 |
|
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