SP334CT-L-TR [EXAR]
Programmable RS-232/RS-485 Transceiver;
| 型号： | SP334CT-L-TR |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Programmable RS-232/RS-485 Transceiver |
| 文件： | 总14页 (文件大小：725K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SP334
Programmable RS-232/RS-485 Transceiver
• +5V Single Supply Operation
• Software Programmable RS-232 or RS-485
Selection
• Three RS-232 Drivers and Five Receivers
in RS-232 Mode
• Two RS-485 Full-Duplex Transceivers in
RS-485 Mode
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TI3
TXEN(n/c)
TX4(n/c)
TX3
TI2
TI1
RXEN
RS232/RS485
RI5
VCC
TX1
TX2
RX5
RX4
RX3
RX2
RX1
RI4
SP334
GND
C1+
• Full Differential Driver Tri-State (Hi-Z) Control
• Receiver Output Tri-State Control
V+
C2+
C1–
RI3
C2–
RI2
V–
RI1
(in RS-232 Mode)
DESCRIPTION
The SP334 is a programmable RS-232 and/or RS-485 transceiver IC. The SP334 contains
three drivers and five receivers when selected in RS-232 mode; and two drivers and two
receivers when selected in RS-485 mode.
The RS-232 transceivers can typically operate at 230kbps while adhering to
the RS-232 specifications. The RS-485 transceivers can operate up to ꢀ0Mbps
while adhering to the RS-485 specifications. The RS-485 drivers can be disabled
(High-Z output) by the TXEN enable pin. The RS-232 and RS-485 receiver outputs can be
disabled by the RXEN pin.
TYPICAL APPLICATIONS CIRCUIT
+5V
5
VCC
9
C1+
0.1µF
10
14
0.1µF
0.1µF
12
11
V+
C1-
SP334 V-
C2+
13
0.1µF
C2-
TXEN
2
TTL/CMOS
TTL/CMOS
Vcc
7
TX2
400KΩ
RS-485
27 TI1
T1
6
3
TX1
TX4
RS-485
RS-485
Vcc
400KΩ
TI3
1
TTL/CMOS
TTL/CMOS
T3
R1
4
TX3
RS-485
RS-485
RI1 15
RX1
19
15KΩRI2 16
15KΩ
RS-485
RI4 18
RS-485
RS-485
21 RX3
26
15KΩ
R3
TTL/CMOS
TTL/CMOS
RI3 17
15KΩ
RXEN
25
+5V
RS232/ RS485
8
GND
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 5ꢀ0-668-70ꢀ7 • www.exar.com
SP334_ꢀ00_090909
ꢀ
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
VCC.......................................................................+7V
Input Voltages
Storage Temperature.......................-65˚C to +150˚C
Power Dissipation
28-pin WSOIC...................................ꢀ000mW
Package Derating:
Logic............................-0.5V to (Vcc+0.5V)
Drivers.........................-0.5V to (Vcc+0.5V)
Receivers......................+/-30V @ ≤100mA
Driver Outputs..................................................+/-ꢀ5V
Maximum Data Rate...........................8Mbps (note ꢀ)
28-pin WSOIC
øJA................................................40 °C/W
Note ꢀ: Exceeding the maximum data rate of 8Mbps at TA = 85°C may permanently damage the device
SPECIFICATIONS
Limits are specified at TA = 25°C and VCC = +5.0V unless otherwise noted.
PARAMETER
Logic Inputs
MIN.
TYP.
MAX.
UNITS CONDITIONS
VIL
0.8
Volts
Volts
VIH
2.0
LOGIC OUTPUTS
VOL
0.4
Volts
Volts
µA
IOUT = -3.2mA
VOH
2.4
IOUT = ꢀ.0mA
Output Tri-state Leakage
RS-232 DRIVER
DC Characteristics
HIGH Level Output
LOW Level Output
Open Circuit Voltage
Short Circuit Current
Power Off Impedance
AC Characteristics
Slew Rate
ꢀ0
0.4V ≤ VOUT ≤ +2.4V
+5.0
-ꢀ5.0
-ꢀ5
+ꢀ5.0
-5.0
Volts
Volts
Volts
mA
RL = 3kΩ, VIN = 0.8V
RL = 3kΩ, VIN = 2.0V
+ꢀ5
+/-ꢀ00
VOUT = 0V
300
Ω
VCC = 0V, VOUT = +/-2.0V
30
V/µs
µs
RL = 3kΩ, CL = 50pF; VCC = +5.0V,
TA @ 25°C
Transistion Time
ꢀ.56
RL = 3KΩ, CL = 2500pF;
between +/-3V, TA @ +25°C
Maximum Data Rate
Propagation Delay tPHL
Propagation Delay tPLH
RS-232 RECEIVER
DC Characteristics
HIGH Threshold
ꢀ20
235
2
kbps
µs
RL = 3kΩ, CL = 2500pF
8
8
Measured from ꢀ.5V of VIN to 50%
of VOUT; RL = 3kΩ
2
µs
ꢀ.7
ꢀ.2
3.0
Volts
Volts
Volts
kΩ
LOW Threshold
0.8
3
Receiver Open Circuit Bias
Input Impedance
+2.0
7
5
VIN = +ꢀ5V to -ꢀ5V
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SP334_ꢀ00_090909
2
SPECIFICATIONS
Limits are specifed at TA = 25°C and VCC = +5.0V unless otherwise
PARAMETER
MIN.
TYP.
MAX.
UNITS CONDITIONS
RS-232 RECEIVER (continued)
AC Characteristics
Maximum Data Rate
ꢀ20
235
kbps
Propagation Delay tPHL
Propagation Delay tPLH
RS-485 DRIVER
0.25
0.25
ꢀ
ꢀ
µs
µs
Measured from 50% of VIN to ꢀ.5V
of VOUT
DC Characteristics
Open circuit Voltage
Differential Output
6.0
5.0
Volts
ꢀ.5
28.0
ꢀ0
Volts RL = 54Ω, CL = 50pF
Volts |VT| - |VT|
Volts
Balance
+/-0.2
3.0
Common-Mode Output
Output Current
mA
mA
RL = 54Ω
Short Circuit Current
AC Characteristics
Maximum Data Rate
Maximum Data Rate
Output Transition Time
Propagation Delay tPHL
Propagation Delay tPLH
Driver Output Skew
RS-485 RECEIVER
DC Characteristics
Common Mode Range
Receiver Sensitivity
Input Impedance
+/-250
8
Terminated in -7V to +ꢀ0V
Mbps RL = 54Ω
Mbps RL = 54Ω, TA = +85°C, Note ꢀ
30
80
80
5
ns
ns
ns
ns
Rise/Fall time, ꢀ0%-90%
ꢀ20
ꢀ20
20
See Figures 3 & 5, RDIFF = 54Ω,
CLꢀ = CL2 = ꢀ00pF
Per Figure 5, tSKEW = |tDPHL - tDPLH
|
-7.0
ꢀ2
+ꢀ2
Volts
Volts
kΩ
+/-0.2
-7V ≤ VCM ≤ +12V
-7V ≤ VCM ≤ +12V
ꢀ5
AC Characteristics
Maximum Data Rate
Maximum Data Rate
Propagation Delay tPHL
Propagation Delay tPLH
Differential Receiver Skew
ꢀ0
Mbps
8
Mbps TA = +85°C, Note ꢀ
ꢀ30
ꢀ30
ꢀ0
200
200
20
ns
ns
ns
See Figures 3 & 7, RDIFF = 54Ω,
CLꢀ = CL2 = ꢀ00pF
tSKEW = |tPHL - tPLH|, RDIFF = 54Ω,
CLꢀ = CL2 = ꢀ00pF, see Figure 8
ENABLE TIMING
RS-485 DRIVER
Enable Time (see Figures 4 and 6)
Enable to LOW
ꢀ00
ꢀ00
ꢀ50
ꢀ50
ns
ns
CL = ꢀ5pF, Sꢀ Closed
CL = ꢀ5pF, S2 Closed
Enable to HIGH
Note ꢀ: Exceeding the maximum data rate of 8Mbps at TA = 85°C may damage the device.
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SP334_ꢀ00_090909
3
SPECIFICATIONS
Limits are specifed at TA = 25°C and VCC = +5.0V unless otherwise
PARAMETER
MIN.
TYP.
MAX.
UNITS CONDITIONS
RS-485 Driver Continued
Disable Time (see Figures 4 and 6)
Disable from LOW
ꢀ00
ꢀ00
ꢀ20
ꢀ20
ns
ns
CL = ꢀ5pF, Sꢀ Closed
Disable from HIGH
CL = ꢀ5pF, S2 Closed
RS-485 RECEIVER
Enable Time (see Figures 2 and 8)
Enable to LOW
ꢀ00
ꢀ00
ꢀ50
ꢀ50
ns
ns
CL = ꢀ5pF, Sꢀ Closed
CL = ꢀ5pF, S2 Closed
Enable to HIGH
Disable Time (see Figures 2 and 8)
Disable from LOW
ꢀ00
ꢀ00
ꢀ20
ꢀ20
ns
ns
CL = ꢀ5pF, Sꢀ Closed
CL = ꢀ5pF, S2 Closed
Disable from HIGH
POWER REQUIREMENTS
Supply Voltage VCC
Supply Current ICC
+4.75
+5.25
Volts
No Load (TX Disabled)
No Load (RS-232 Mode)
No Load (RS-485 Mode)
ENVIRONMENTAL
Operating Temperature
Commercial (_C_)
ꢀ2
20
ꢀ5
20
50
50
mA
mA
mA
TXEN = 0V
RS232/RS485 = 0V
RS232/RS485 = +5V
0
70
ºC
ºC
ºC
Industrial (_E_)
-40
-65
+85
Storage Temperature
+ꢀ50
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SP334_ꢀ00_090909
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RECEIVER INPUT GRAPH
RS-485 RECEIVER
+1.0mA
+12V
-7V
-3V
+6V
1 Unit Load
Maximum Input Current
Versus Voltage
-0.6mA
TEST CIRCUITS
1kΩ
V
A
Test Point
Receiver
Output
CC
R
R
S
1
V
OD
C
1kΩ
RL
V
OC
S
2
B
Figure ꢀ. Driver DC Test Load Circuit
Figure 2. Receiver Timing Test Load Circuit
V
CC
CL1
S
1
A
A
500Ω
DI
RL
Output
Under
Test
RO
B
B
CL2
15pF
C
L
S
2
Figure 3. Driver/Receiver Timing Test Circuit
Figure 4. Driver Timing Test Load #2 Circuit
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SP334_ꢀ00_090909
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SWITCHING WAVEFORMS
f ≥1MHz; tR ≤10ns; tF ≤10ns
1.5V
+3V
1.5V
DRIVER INPUT
0V
B
tPLH
tPHL
1/2VO
1/2VO
DRIVER
OUTPUT
VO
A
tDPLH
tDPHL
+
VO
DIFFERENTIAL
OUTPUT
0V
–
VO
VA –VB
tF
tR
tSKEW= |tDPLH-tDPHL
|
Figure 5. Driver Propagation Delays
f = 1MHz; tR< 10ns; tF < 10ns
+3V
1.5V
1.5V
TXEN
A,B
0V
5V
tZL
tLZ
2.3V
Output normally LOW
Output normally HIGH
0.5V
0.5V
VOL
VOH
A,B
2.3V
tZH
0V
tHZ
Figure 6. Driver Enable and Disable Times
f = 1MHz; t
1.5V
; t
R ≤10ns F ≤ 10ns
+
–
VOD2
VOD2
0V
0V
A – B
INPUT
VOH
RECEIVER OUT
VOL
1.5V
OUTPUT
tPHL
tPLH
Figure 7. Receiver Propagation Delays
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SP334_ꢀ00_090909
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+3V
0V
1.5V
1.5V
RXEN
f = 1MHz; tR ≤ 10ns; tF ≤ 10ns
tZL
tLZ
5V
1.5V
RECEIVER OUT
Output normally LOW
Output normally HIGH
0.5V
0.5V
V
IL
V
IH
RECEIVER OUT
1.5V
tZH
0V
tHZ
tSKEW = |tPHL-tPLH
|
Figure 8. Receiver Enable and Disable Times
TTL
Input
TTL
INPUT
Driver Output
A
Driver Output B
DRIVER
OUTPUT
Differential
Output
VA -VB
Figure 9. Typical RS-232 Driver Output
Figure ꢀ0. Typical RS-485 Driver Output
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TI3
TXEN(n/c)
TX4(n/c)
TX3
TI2
TI1
RXEN
RS232/RS485
RI5
VCC
TX1
TX2
RX5
RX4
RX3
RX2
RX1
RI4
SP334
GND
C1+
V+
C2+
C1–
RI3
C2–
RI2
V–
RI1
(in RS-232 Mode)
Figure ꢀꢀ. SP334 Pinout
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SP334_ꢀ00_090909
7
+5V
5
VCC
9
C1+
+5V
0.1µF
0V
0.1µF
0.1µF
12
11
10
14
C1-
C2+
V+
V-
SP334
5
VCC
9
C1+
13
0.1µF
10
14
C2-
0.1µF
0.1µF
0.1µF
12
11
V+
C1-
SP334 V-
25
C2+
RS232/RS485
0V
13
0.1µF
C2-
Vcc
400KΩ
TXEN
2
TX1
TX2
TX3
6
7
27 TI1
TTL/CMOS
TTL/CMOS
RS-232
RS-232
RS-232
T1
T2
TTL/CMOS
Vcc
Vcc
Vcc
7
TX2
400KΩ
400KΩ
RS-485
27 TI1
28 TI2
T1
TTL/CMOS
TTL/CMOS
6
3
TX1
TX4
RS-485
RS-485
Vcc
400KΩ
TI3
400KΩ
1
2
TI3
4
3
T3
1
TTL/CMOS
TTL/CMOS
T3
R1
4
TX3
RS-485
RS-485
N/C
N/C
RI1 15
RX1
19
15KΩRI2 16
19 RX1
20 RX2
RI1 15
RI2 16
RI3 17
RS-485
TTL/CMOS
RS-232
RS-232
R1
15KΩ
5KΩ
5KΩ
RI4 18
RS-485
RS-485
21 RX3
26
TTL/CMOS
TTL/CMOS
R2
R3
15KΩ
R3
TTL/CMOS
TTL/CMOS
RI3 17
21 RX3
22 RX4
15KΩ
RS-232
RS-232
5KΩ
5KΩ
RXEN
25
+5V
RS232/ RS485
RS-485 MDDE
8
RI4 18
RI5 24
GND
TTL/CMOS
TTL/CMOS
R4
R5
23
8
RX5
RS-232
0V
5KΩ
26
RXEN
GND
RS-232 MODE
Figure ꢀ2. Typical Operating Circuit
THEORY OF OPERATION
Cꢀ– is transferred to C2–. Since C2+ is con-
nected to +5V, the voltage potential across
capacitor C2 is now ꢀ0V.
The SP334 is made up of four separate
circuit blocks — the charge pump, drivers,
receivers,anddecoder.Eachofthesecircuit
blocks is described in more detail below.
Phase 2
—V transfer—Phasetwooftheclockcon-
nectSsSthe negative terminal of C2 to the VSS
storage capacitor and the positive terminal
of C2 to ground, and transfers the generated
–l0V to C . Simultaneously, the positive side
of capaci3tor C ꢀ is switched to +5V and the
negative side is connected to ground.
Charge–Pump
ThechargepumpisaExar–patenteddesign
(U.S.5,306,954)andusesauniqueapproach
compared to older less efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical ꢀ0V
power supplies. Figure ꢀ7(a) shows the
waveform found on the positive side of
capacitor C2, and Figure ꢀ7(b) shows the
negative side of capacitor C2. There is a
free–running oscillator that controls the four
phases of the voltage shifting. A description
of each phase follows.
Phase 3
— VDD charge storage — The third phase
of the clock is identical to the first phase
— the charge transferred in Cꢀ produces
–5V in the negative terminal of C , which
is applied to the negative side of cꢀapacitor
C2. Since C2+ is at +5V, the voltage potential
across C2 is l0V.
Phase 1
—VSS chargestorage—Duringthisphaseof
theclockcycle,thepositivesideofcapacitors
Cꢀ and C are initially charged to +5V. C + is
then swit2ched to ground and charge onꢀ
Phase 4
— V transfer — The fourth phase of the
clockDcDonnects the negative terminal of C2
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SP334_ꢀ00_090909
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V
= +5V
CC
to ground and transfers the generated l0V
across C2 to C4, the V storage capacitor.
Again, simultaneouslyDwDith this, the positive
side of capacitor Cꢀ is switched to +5V and
the negative side is connected to ground,
and the cycle begins again.
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
SS
C
–5V
–5V
3
Since both V+ and V– are separately gen-
erated from VCC in a no–load condition, V+
and V– will be symmetrical. Older charge
pump approaches that generate V– from
V+ will show a decrease in the magnitude
of V– compared to V+ due to the inherent
inefficiencies in the design.
Figure ꢀ3. Charge Pump Phase ꢀ.
V
= +5V
CC
C
4
+
–
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
+
–
V
SS
C
–10V
3
The clock rate for the charge pump typically
operates at ꢀ5kHz. The external capacitors
must be a minimum of 0.ꢀµF with a ꢀ6V
breakdown rating.
Figure ꢀ4. Charge Pump Phase 2.
V
= +5V
CC
External Power Supplies
Forapplicationsthatdonotrequire+5Vonly,
external supplies can be applied at the V+
and V– pins. The value of the external sup-
ply voltages must be no greater than ±l0V.
The current drain for the ±ꢀ0V supplies is
used for RS-232. For the RS-232 driver the
currentrequirementwillbe3.5mAperdriver.
The external power supplies should provide
apowersupplysequenceof:+l0V, then+5V,
followed by –l0V.
C
+5V
4
+
–
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
+
–
SS
C
–5V
–5V
3
Figure ꢀ5. Charge Pump Phase 3.
V
= +5V
CC
C
+
+10V
4
–
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
+
3
–
SS
C
Figure ꢀ6. Charge Pump Phase 4.
+10V
a) C2+
GND
GND
b) C2-
-10V
Figure ꢀ7. Charge Pump Waveforms
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SP334_ꢀ00_090909
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Drivers
output, a pull–up resistor of 100kΩ to +5V
should be connected to the inverting input
for a logic low, or the non–inverting input
for a logic high. For single-ended receiv-
ers, a pull–down resistor to ground of 5kΩ
is internally connected, which will ensure a
logic high output.
The SP334 has three independent RS-232
single-endeddriversandtwodifferentialRS-
485 drivers. Control for the mode selection
isdonebytheRS232/RS485selectpin.The
drivers are pre-arranged such that for each
mode of operation the relative position and
functionality of the drivers are set up to ac-
commodatetheselectedinterfacemode.As
the mode of the drivers is changed, the elec-
trical characteristics will change to support
the requirements of clock, data, and control
line signal levels. Unused driver inputs can
be left floating; however, to ensure a desired
state with no input signal, pull–up resistors
to +5V or pull–down resistors to ground are
suggested. Since the driver inputs are both
TTLorCMOScompatible,anyvalueresistor
less than 100kΩ will suffice.
The RS-232 receiver has a single–ended
input with a threshold of 0.8V to 2.4V. The
RS-232 receiver has an operating voltage
range of ±ꢀ5V and can receive signals up
to ꢀ20kbps. RS-232 receivers are used in
RS-232 mode for all signal types include
data, clock, and control lines of the RS-232
serial port.
ThedifferentialRS-485receiverhasaninput
impedanceof15kΩandadifferentialthresh-
old of ±200mV. Since the characteristics of
an RS-422 receiver are actually subsets of
RS-485, the receivers for RS-422 require-
ments are identical to the RS-485 receivers.
All of the differential receivers can receive
data up to ꢀ0Mbps.
When in RS-232 mode, the single-ended
RS-232driversproducecompliantRS-232E
and ITU V.28 signals. Each of the three
drivers output single-ended bipolar signals
in access of ±5V with a full load of 3kΩ and
2500pF applied as specified. These drivers
can also operate at least ꢀ20kbps.
Enable Pins
The SP334 drivers can be enabled by use
of the TXEN pin. A logic HIGH will enable
the driver outputs and a logic LOW will tri-
state the outputs. The drivers can only be
tri-stated in RS-485 mode. The drivers are
always active in RS-232 mode.
When programmed to RS-485 mode, the
differentialRS-485driversproducecomplaint
RS-485signals.EachRS-485driveroutputs
a unipolar signal on each output pin with a
magnitude of at least ꢀ.5V while loaded with
a worst case of 54Ω between the driver's
two output pins. The signal levels and drive
capability of the RS-485 drivers allow the
drivers to also comply with RS-422 levels.
The transmission rate for the differential
drivers is ꢀ0Mbps.
The Receiver outputs can also be tri-stated
by the use of the RXEN pin. A logic LOW
will enable the receiver outputs and a logic
HIGHwilltri-statetheoutputs..Thereceiver
tri-state capability is offered for both RS-232
and RS-485 modes. The input impedance
of the receivers during tri-state is at least
12kΩ.
Receivers
The SP334 has five single-ended receivers
whenprogrammedforRS-232modeandtwo
differential receivers when programmed for
RS-485 mode.
Applications
The SP334 allows the user flexibility in hav-
ing a RS-232 or RS-485 serial port without
usingtwodifferentdiscreteactiveIC's.Figure
ꢀ8 shows a connection to a standard DB-9
RS-232 connector. In RS-485 mode, the
SP334 is a full duplex transceiver, however,
a half duplex configuration can be made by
connecting the driver outputs to receiver
inputs.
Control for the mode selection is done by
the same select pin as the drivers. As the
operating mode of the receivers is changed,
the electrical characteristics will change to
support the requirements of the appropriate
serial standard. Unused receiver inputs can
beleftfloatingwithoutcausingoscillation.To
ensure a desired state of the receiver
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 5ꢀ0-668-70ꢀ7 • www.exar.com
SP334_ꢀ00_090909
ꢀ0
+5V
5
VCC
9
C1+
0.1µF
0V
0.1µF
0.1µF
12
11
10
14
C1-
V+
V-
SP334
C2+
13
C2-
0.1µF
25
RS232/RS485
0V
Vcc
400KΩ
TX1
TX2
TX3
6
7
4
27 TI1
T1
T2
TxD
Vcc
Vcc
400KΩ
28 TI2
RTS
DTR
400KΩ
1
DCD
DSR
1
TI3
T3
6
9
RxD
RTS
19 RX1
20 RX2
RI1 15
RI2 16
RI3 17
RxD
R1
5KΩ
5KΩ
TxD
CTS
CTS
DSR
R2
R3
DTR
RI
21 RX3
22 RX4
5KΩ
5KΩ
RI4 18
RI5 24
SG
DCD
RI
R4
R5
23
8
RX5
5
5KΩ
26
0V
RXEN
GND
Figure 18. SP334 Configuration to a DB-9 Serial Port
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 5ꢀ0-668-70ꢀ7 • www.exar.com
SP334_ꢀ00_090909
ꢀꢀ
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 5ꢀ0-668-70ꢀ7 • www.exar.com
SP334_ꢀ00_090909
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ORDERING INFORMATION
Model
Temperature Range
Package Types
SP334CT-L..........................................................................0°C to +70°C.............................................................................................28-pin WSOIC
SP334CT-L/TR....................................................................0°C to +70°C.............................................................................................28-pin WSOIC
SP334ET-L....................................................................... -40°C to +85°C.............................................................................................28-pin WSOIC
SP334ET-L/TR................................................................. -40°C to +85°C.............................................................................................28-pin WSOIC
Note: /TR = Tape and Reel
REVISION HISTORꢁ
DATE
2000
REVISION DESCRIPTION
SP334/ꢀ0 Legacy Sipex Datasheet
09/09/09
ꢀ.0.0
Convert to Exar Format. Add typical application circuit to page ꢀ and Revision
History table. Remove EOL part numbers and update ordering information per
PDN 08ꢀꢀ26-0ꢀ. Change revision to ꢀ.0.0. Add Maximum Data Rate to Absolute
Maximum Ratings. Add RS-485 Driver and Receiver data rate column for 8Mbps
maximum at Tmax and add Note ꢀ.
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliabil-
ity. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for
illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2009 EXAR Corporation
Datasheet August 2009
Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
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SP334_ꢀ00_090909
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Mouser Electronics
Authorized Distributor
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SP334ET-L SP334CT-L SP334CT-L/TR SP334ET-L/TR
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