SP483ECN-L/TR [EXAR]
Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDSO8, LEAD FREE, SOIC-8;
| 型号： | SP483ECN-L/TR |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDSO8, LEAD FREE, SOIC-8 驱动 信息通信管理 光电二极管 接口集成电路 驱动器 |
| 文件： | 总11页 (文件大小：465K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SP483E
Enhanced Low EMI Half-Duplex
RS-485 Transceiver
Description
The SPꢅ±3E is
FEATURES
a
half-duplex transceiver that meets the
ꢀ■
ꢀ■
ꢀ■
5V only
Low power BiCMOS
Driver / receiver enable for multi-drop
configurations
Enhanced ESD specifications:
±15ꢀV ꢁuman Body Model
±15ꢀV ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ ꢇir Discharge
±±ꢀV ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ Contact
Discharge
specifications of RS-ꢅ±5 and RS-ꢅꢆꢆ serial protocols with enhanced
ESD performance. The ESD tolerance has been improved on
these devices to over ±15ꢀV for both ꢁuman Body Model and
ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ ꢇir Discharge Method. This device is pin-to-pin
compatible with MaxLinear’s SPꢅ±3 device as well as popular
industry standards. ꢇs with the original versions, the SPꢅ±3E feature
MaxLinear’s BiCMOS design allowing low power operation without
sacrificing performance. The SPꢅ±3E is internally slew rate limited to
reduce EMꢂ and can meet the requirements of RS-ꢅ±5 and RS-ꢅꢆꢆ up
to ꢆ5ꢄꢀbps. The SPꢅ±3E is also equipped with a low power shutdown
mode.
ꢀ■
ꢀ■
ꢀ■
Low EMꢂ transceiver limited to ꢆ5ꢄꢀbps
Low power 1µꢇ shutdown mode
Ordering ꢂnformation - Bacꢀ Page
Block Diagram
RO 1
R
8 VCC
7 B
2
RE
DE 3
DI 4
6 A
D
5 GND
SPꢅ±3E
REV 1.0.1
1/11
SP483E
Absolute Maximum Ratings
These are stress ratings only and functional operation of the
device at these ratings or any other above those indicated
in the operation sections of the specifications below is not
implied. Exposure to absolute maximum rating conditions
for extended periods of time may affect reliability.
V
CC
...............................................................................7.ꢄV
ꢂnput Voltages
Logic........................ -ꢄ.3V to (V + ꢄ.5V)
CC
Drivers ..................... -ꢄ.3V to (V + ꢄ.5V)
CC
Receivers...........................................±15V
Output Voltages
Logic........................ -ꢄ.3V to (V + ꢄ.5V)
CC
Drivers ...............................................±15V
Receivers..................-ꢄ.3V to (V + ꢄ.5V)
CC
Storage Temperature .................................-ꢃ5˚C to +15ꢄ˚C
Power Dissipation....................................................5ꢄꢄmW
Electrical Characteristics
T
ꢇMB
= T
to T and V = 5V ±5ꢈ unless otherwise noted.
MꢇX CC
MꢂN
PꢇRꢇMETERS
MꢂN.
TYP.
MꢇX.
UNꢂTS
CONDꢂTꢂONS
SP483E Driver DC Characteristics
Differential output voltage
V
CC
V
CC
V
CC
V
V
V
Unloaded; R = ∞Ω ; Figure 1
Differential output voltage
2
With load; R = 50Ω (RS-422); Figure 1
With load; R = 27Ω (RS-485); Figure 1
Differential output voltage
1.5
Change in magnitude of driver
differential output voltage for
complimentary states
0.2
V
R = 27Ω or R = 50Ω; Figure 1
Driver common-mode output voltage
Input high voltage
3
V
V
R = 27Ω or R = 50Ω; Figure 1
Applies to DE, DI, RE
Applies to DE, DI, RE
Applies to,DI
2.0
Input low voltage
0.8
10
1
V
Input current, driver input
Input current, control lines
Driver short circuit current
µA
µA
Applies to,DE, RE
±250
±250
mA
mA
-7V ≤ V ≤ 12V
O
V
OUT
= HIGH
Driver short circuit current
= LOW
-7V ≤ V ≤ 12V
O
V
OUT
REV 1.0.1
ꢆ/11
SP483E
Electrical Characteristics (Continued)
T
ꢇMB
= T
to T and V = 5V ±5ꢈ unless otherwise noted.
MꢇX CC
MꢂN
PꢇRꢇMETERS
MꢂN.
TYP.
MꢇX.
UNꢂTS
CONDꢂTꢂONS
SP483E Driver AC Characteristics
RE = 5V, DE = 5V; R
= 54Ω,
= 54Ω,
= 54Ω,
DIFF
DIFF
DIFF
Maximum data rate
250
250
250
kbps
ns
C
L1
= C = 100pF
L2
See Figures 3 & 5, R
= C = 100pF
Driver input to output, t
800
2000
PLH
PHL
C
L1
L2
See Figures 3 & 5, R
= C = 100pF
Driver input to output, t
Driver skew
800
100
2000
800
ns
ns
ns
C
L1
L2
See Figures 3 and 5, t
= |t
- t
|
SKEW
DPHL DPLH
From 10%-90%; R
= 54Ω
DIFF
Driver rise or fall time
250
2000
C
L1
= C = 100pF; See Figures 3 and 6
L2
Driver enable to output high
Driver enable to output low
Driver disable time from high
Driver disable time from low
SP483E Receiver DC Characteristics
Differential input threshold
Input hysteresis
250
250
300
300
2000
2000
3000
3000
ns
ns
ns
ns
C = 100pF, See Figures 4 and 6, S closed
L 2
C = 100pF, See Figures 4 and 6, S closed
L
1
C = 15pF, See Figures 4 and 6, S closed
L
2
C = 15pF, See Figures 4 and 6, S closed
L
1
-0.2
3.5
0.2
Volts
mV
-7V ≤ V
≤ 12V
CM
20
15
V
V
V
= 0V
CM
Output voltage HIGH
Volts
Volts
= 200mV, I = -4mA
O
ID
ID
Output voltage LOW
0.4
= 200mV, I = 4mA
O
Three-state ( high impedance) output
current
±1
µA
0.4V ≤ V ≤ 2.4V; RE = 5V
O
Input resistance
12
7
kΩ
mA
mA
mA
-7V ≤ V
≤ 12V
CM
Input current (A, B); V = 12V
1.0
-0.8
95
DE = 0V, V = 0V or 5.25V, V = 12V
CC IN
IN
Input current (A, B); V = -7V
DE = 0V, V = 0V or 5.25V, V = -7V
CC IN
IN
Short circuit current
0V ≤ V ≤ V
O CC
SP483E Receiver AC Characteristics
Maximum data rate
250
250
kbps
ns
RE = 0V, DE = 0V
See Figures 3 & 7,
t
PLH ;
Receiver input to output
2000
2000
R
= 54Ω, C = C = 100pF
DIFF
L1 L2
t
See Figures 3 & 7,
PHL ;
Receiver input to output
Differential receiver skew
250
ns
ns
R
DIFF
= 54Ω, C = C = 100pF
L1 L2
R
DIFF
= 54Ω, C = C = 100pF,
L1
L2
100
|t
- t
|
See Figures 3 and 7
PHL PLH
Receiver enable to output low
Receiver enable to output high
Receiver Disable from low
Receiver Disable from high
45
45
45
45
70
70
70
70
ns
ns
ns
ns
C
C
C
C
= 15pF, Figures 2 & 8; S Closed
1
RL
RL
RL
RL
= 15pF, Figures 2 & 8; S Closed
2
= 15pF, Figures 2 & 8; S Closed
1
= 15pF, Figures 2 & 8; S Closed
2
REV 1.0.1
3/11
SP483E
Electrical Characteristics, Continued
T
ꢇMB
= T
to T and V = 5V ±5ꢈ unless otherwise noted
MꢇX CC
MꢂN
PꢇRꢇMETERS
MꢂN.
TYP.
MꢇX.
UNꢂTS
CONDꢂTꢂONS
SP483E Shutdown Timing
Time to shutdown
50
200
600
ns
ns
RE = 5V, DE = 0V
C = 100pF; See Figures 4 and 6; S Closed
Driver enable from shutdown to
output high
2000
L
2
Driver enable from shutdown to
output low
2000
2500
2500
ns
ns
ns
C = 100pF; See Figures 4 and 6; S Closed
L 1
Receiver enable from shutdown to
output high
300
300
C = 15pF; See Figures 2 and 8; S Closed
L 2
Receiver enable from shutdown to
output low
C = 15pF; See Figures 2 and 8; S Closed
L
1
Power Requirements
Supply voltage V
Supply current
4.75
5.25
10
Volts
CC
900
600
1
µA
µA
µA
RE, DI = 0V or V ; DE = V
CC CC
No load
RE = 0V, DI = 0V or 5V; DE = 0V
DE = 0V, RE = V
Shutdown mode
CC
Environmental and Mechanical
Operating Temperture
Commercial (_C_)
Industrial (_E_)
0
70
85
°C
°C
°C
-40
-65
Storage Temperature
Package
150
NSOIC (_N)
Pin Functions
Pin Number
Pin Name
Description
Receiver output
1
ꢆ
3
ꢅ
5
RO
RO 1
R
8 VCC
Receiver output enable active LOW
Driver output enable active HIGH
Driver input
RE
DE
Dꢂ
2
7 B
RE
DE 3
DI 4
6 A
Ground connection
GND
D
5 GND
Non-inverting driver output /
receiver input
ꢃ
ꢇ
Inverting driver output /
receiver input
7
±
B
SPꢅ±3E
Pinout (Top View)
Positive supply 4.75V ≤ Vcc ≤ 5.25V
VCC
REV 1.0.1
ꢅ/11
SP483E
Test Circuits
A
1kΩ
Test Point
1kΩ
R
R
Receiver
Output
V
CC
S
1
V
OD
C
RL
V
OC
S
2
B
Figure 1: RS-ꢅ±5 Driver DC Test Load Circuit
Figure ꢆ: Receiver Timing Test Load Circuit
CL1
A
A
V
CC
DI
RDIFF
S
1
RO
500Ω
Output
Under
Test
B
B
CL2
15pF
C
L
S
2
Figure 3: RS-ꢅ±5 Driver/Receiver Timing Test Circuit
Figure ꢅ: Driver Timing Test Load #ꢆ Circuit
Switching Waveforms
100kHz; t ≤ 10ns; t ≤ 10ns
f =
R
F
+3V
1.5V
1.5V
DRIVER INPUT
0V
B
t
t
PHL
PLH
1/2V
1/2V
O
O
DRIVER
OUTPUT
V
O
A
+
t
t
DPLH
DPHL
V
DIFFERENTIAL
OUTPUT
O
0V
–
V
V –V
O
A
B
t
t
F
R
t
= |t
-t
|
SKEW
DPLH DPHL
Figure 5: Driver Propagation Delays
REV 1.0.1
5/11
SP483E
Switching Waveforms (Continued)
f = 100kHz; t < 10ns; t < 10ns
R
F
+3V
1.5V
1.5V
DE
A,B
A,B
0V
5V
t
t
LZ
ZL
2.3V
Output normally LOW
Output normally HIGH
0.5V
0.5V
V
OL
V
OH
2.3V
0V
t
t
HZ
ZH
Figure ꢃ: Driver Enable and Disable Times
f = 100kHz; t
; t
R ≤10ns F ≤ 10ns
+
–
VOD2
VOD2
0V
0V
A – B
R
INPUT
VOH
VOL
1.5V
1.5V
OUTPUT
tPHL
tPLH
t SKEW = | tPHL- tPLH
|
Figure 7: Receiver Propagation Delays
f = 100kHz; tR ≤ 10ns; tF ≤ 10ns
+3V
1.5V
1.5V
RE
R
0V
5V
tZL
1.5V
tLZ
Output normally LOW
Output normally HIGH
0.5V
0.5V
V
IL
V
IH
R
1.5V
tZH
0V
tHZ
Figure ±: Receiver Enable and Disable Times
REV 1.0.1
ꢃ/11
SP483E
Description
Shutdown Mode
The SPꢅ±3E is a half-duplex differential transceiver that
meets the requirements of RS-ꢅ±5 and RS-ꢅꢆꢆ. Fabricated
with a MaxLinear proprietary BiCMOS process, this product
requires a fraction of the power of older bipolar designs.
The SPꢅ±3E is equipped with a Shutdown mode. To
enable the shutdown state, both driver and receiver must
be disabled simultaneously. ꢇ logic LOW on DE (pin 3)
and a Logic ꢁꢂGꢁ on RE (pin ꢆ) will put the SPꢅ±3E into
Shutdown mode. ꢂn Shutdown, supply current will drop to
typically 1µꢇ.
The RS-ꢅ±5 standard is ideal for multi-drop applications and
for long-distance interfaces. RS-ꢅ±5 allows up to 3ꢆ drivers
and 3ꢆ receivers to be connected to a data bus, maꢀing
it an ideal choice for multi-drop applications. Since the
cabling can be as long as ꢅ,ꢄꢄꢄ feet, RS-ꢅ±5 transceivers
are equipped with a wide (-7V to 1ꢆV) common mode range
to accommodate ground potential differences. Because
RS-ꢅ±5 is a differential interface, data is virtually immune to
noise in the transmission line.
ꢂNPUTS
DE
OUTPUTS
LꢂNE
CONDꢂTꢂON
RE
Dꢂ
ꢇ
B
X
X
X
X
1
1
ꢄ
1
1
ꢄ
No Fault
No Fault
X
1
0
Z
Z
0
1
Z
Z
Drivers
X
X
The driver outputs of the SPꢅ±3E are differential outputs
meeting the RS-ꢅ±5 and RS-ꢅꢆꢆ standards. The typical
voltage output swing with no load will be ꢄ Volts to 5 Volts.
With worst case loading of 5ꢅΩ across the differential
outputs, the drivers can maintain greater than 1.5V voltage
levels. The drivers have an enable control line which is
active ꢁꢂGꢁ. ꢇ logic ꢁꢂGꢁ on DE (pin 3) will enable the
differential driver outputs. ꢇ logic LOW on the DE (pin 3)
will tri-state the driver outputs.
Fault
Table 1: Transmit Function Truth Table
ꢂNPUTS
OUTPUTS
RE
DE
ꢄ
ꢇ - B
ꢄ.ꢆV
R
1
ꢄ
1
Z
ꢄ
ꢄ
ꢄ
1
The SPꢅ±3E has internally slew rate limited driver outputs
to minimize EMꢂ. The maximum data rate for the SPꢅ±3E
drivers is ꢆ5ꢄꢀbps under load.
ꢄ
-ꢄ.ꢆV
ꢄ
ꢂnputs Open
X
ꢄ
Receivers
Table ꢆ: Receive Function Truth Table
The SPꢅ±3E receivers have differential inputs with an
input sensitivity as low as ±ꢆꢄꢄmV. ꢂnput impedance of
the receivers is typically 15ꢀΩ (1ꢆꢀΩ minimum). ꢇ wide
common mode range of -7V to 1ꢆV allows for large ground
potential differences between systems. The receivers have
a tri-state enable control pin. ꢇ logic LOW on RE (pin ꢆ) will
enable the receiver, a logic ꢁꢂGꢁ on RE (pin ꢆ) will disable
the receiver.
The SPꢅ±3E receiver is rated for data rates up to ꢆ5ꢄꢀbps.
The receivers are equipped with the fail-safe feature. Fail-
safe guarantees that the receiver output will be in a ꢁꢂGꢁ
state when the input is left unconnected.
REV 1.0.1
7/11
SP483E
performed by using a test model as shown in Figure 9.
This method will test the ꢂC’s capability to withstand an ESD
transient during normal handling such as in manufacturing
areas where the ꢂC’s tend to be handled frequently. The
ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ, formerly ꢂEC±ꢄ1-ꢆ, is generally used for
testing ESD on equipment and systems.
ESD Tolerance
The SPꢅ±3E incorporates ruggedized ESD cells on all
driver output and receiver input pins. The ESD structure
is improved over our previous family for more rugged
applications and environments sensitive to electro-static
discharges and associated transients. The improved ESD
tolerance is at least ±15ꢀV without damage or latch-up.
For system manufacturers, they must guarantee a certain
amount of ESD protection since the system itself is exposed
to the outside environment and human presence. The
premise with ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ is that the system is required to
withstand an amount of static electricity when ESD is applied
to points and surfaces of the equipment that are accessible
to personnel during normal usage. The transceiver ꢂC
receives most of the ESD current when the ESD source is
applied to the connector pins. The test circuit for ꢂECꢃ1ꢄꢄꢄ-
ꢅ-ꢆ is shown on Figure 1ꢄ. There are two methods within
ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ, the ꢇir Discharge method and the Contact
Discharge method.
There are different methods of ESD testing applied:
a) MꢂL-STD-±±3, Method 3ꢄ15.7
b) ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ ꢇir-Discharge
c) ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ Direct Contact
The ꢁuman Body Model has been the generally accepted
ESD testing method for semiconductors. This method is
also specified in MꢂL-STD-±±3, Method 3ꢄ15.7 for ESD
testing. The premise of this ESD test is to simulate the
human body’s potential to store electro-static energy and
discharge it to an integrated circuit. The simulation is
R
S
R
C
SW1
SW2
Device
Under
Test
C
DC Power
Source
S
Figure 9: ESD Test Circuit for ꢁuman Body Model
Contact-Discharge Model
R
R
R
C
S
V
SW1
SW2
Device
Under
Test
C
DC Power
Source
S
and
add up to 330Ω for IEC61000-4-2.
R
V
R
S
Figure 1ꢄ: ESD Test Circuit for ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ
REV 1.0.1
±/11
SP483E
ESD Tolerance (Continued)
With the ꢇir Discharge Method, an ESD voltage is applied to
the equipment under test (EUT) through air. This simulates
an electrically charged person ready to connect a cable onto
the rear of the system only to find an unpleasant zap just
before the person touches the bacꢀ panel. The high energy
potential on the person discharges through an arcing path to
the rear panel of the system before he or she even touches
the system. This energy, whether discharged directly or
through air, is predominantly a function of the discharge
current rather than the discharge voltage. Variables with an
air discharge such as approach speed of the object carrying
the ESD potential to the system and humidity will tend to
change the discharge current. For example, the rise time of
the discharge current varies with the approach speed.
30A
15A
0A
t = 0ns
t = 30ns
The Contact Discharge Method applies the ESD current
directly to the EUT. This method was devised to reduce
the unpredictability of the ESD arc. The discharge current
rise time is constant since the energy is directly transferred
without the air-gap arc. ꢂn situations such as hand held
systems, the ESD charge can be directly discharged to the
equipment from a person already holding the equipment.
The current is transferred on to the ꢀeypad or the serial port
of the equipment directly and then travels through the PCB
and finally to the ꢂC.
t →
Figure 11: ESD Test Waveform for ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ
For the ꢁuman Body Model, the current limiting resistor
(R ) and the source capacitor (C ) are 1.5ꢀΩ an 1ꢄꢄpF,
S
S
respectively.
For ꢂEC-ꢃ1ꢄꢄꢄ-ꢅ-ꢆ, the current limiting
resistor (R ) and the source capacitor (C ) are 33ꢄΩ an
15ꢄpF, respectively.
S
S
The higher C value and lower R value in the ꢂECꢃ1ꢄꢄꢄ-
The circuit model in Figures 9 and 1ꢄ represent the typical
ESD testing circuit used for all three methods. The CS is
initially charged with the DC power supply when the first
switch (SW1) is on. Now that the capacitor is charged, the
second switch (SWꢆ) is on while SW1 switches off.
S
S
ꢅ-ꢆ model are more stringent than the ꢁuman Body Model.
The larger storage capacitor injects a higher voltage to the
test point when SWꢆ is switched on. The lower current
limiting resistor increases the current charge onto the test
point.
The voltage stored in the capacitor is then applied through
R , the current limiting resistor, onto the device under test
S
(DUT). ꢂn ESD tests, the SWꢆ switch is pulsed so that the
device under test receives a duration of voltage.
ꢂECꢃ1ꢄꢄꢄ-ꢅ-ꢆ
DEVꢂCE PꢂN TESTED
ꢁUMꢇN BODY MODEL
ꢇir Discharge
±15ꢀV
Direct Contact
±±ꢀV
Level
Driver Outputs
Receiver ꢂnputs
±15ꢀV
±15ꢀV
ꢅ
ꢅ
±15ꢀV
±±ꢀV
Table 1: Transceiver ESD Tolerance Levels
REV 1.0.1
9/11
SP483E
Mechanical Dimensions
NSOꢂC±
Top View
Side View
Front View
Drawing No:
Revision:
POD-00000108
A
REV 1.0.1
1ꢄ/11
SP483E
Ordering Information(1)
Part Number
Operating Temperature Range
Lead-Free
Pacꢀage
Pacꢀaging Method
SP483ECN-L/TR
SP483EEN-L/TR
0°C to 70°C
Reel
Reel
Yes(2)
8-pin NSOIC
-40°C to 85°C
NOTE:
1. Refer to www.exar.com/SPꢅ±3E for most up-to-date Ordering ꢂnformation.
ꢆ. Visit www.exar.com for additional information on Environmental Rating.
Revision History
Revision
Date
Description
05
2000
Legacy Sipex Datasheet
Convert to Exar Format. Update ordering information. Change ESD specification to
IEC61000-4-2.
1.0.0
1.0.1
02/09/12
2/7/18
Update to MaxLinear logo. Remove GND from Differential Output Voltage min (page 2). Up-
date format and ordering information table. Truth Tables moved to page 7 description section.
Removed obsolete PDIP from mechanicals and mechanical dimensions.
Corporate Headquarters:
59ꢃꢃ La Place Court
Suite 1ꢄꢄ
Carlsbad, Cꢇ 9ꢆꢄꢄ±
Tel.:+1 (7ꢃꢄ) ꢃ9ꢆ-ꢄ711
Fax: +1 (7ꢃꢄ) ꢅꢅꢅ-±59±
www.maxlinear.com
High Performance Analog:
1ꢄꢃꢄ Rincon Circle
San Jose, Cꢇ 95131
Tel.: +1 (ꢃꢃ9) ꢆꢃ5-ꢃ1ꢄꢄ
Fax: +1 (ꢃꢃ9) ꢆꢃ5-ꢃ1ꢄ1
Email: serialtechsupport@exar.com
www.exar.com
The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc.. MaxLinear, Inc. assumes
no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the
user. Without limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic,
mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of MaxLinear, Inc.
Maxlinear, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support
system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless MaxLinear, Inc. receives, in writing, assurances to its satisfaction that: (a) the
risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of MaxLinear, Inc. is adequately protected under the circumstances.
MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written
license agreement from MaxLinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property.
Company and product names may be registered trademarks or trademarks of the respective owners with which they are associated.
© 2000 - 2018 MaxLinear, Inc. All rights reserved
REV 1.0.1
SP483E_DS_020718
11/11
相关型号：
SP483ECP-L
Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDIP8, LEAD FREE, PLASTIC, DIP-8
EXAR
©2020 ICPDF网 联系我们和版权申明