SP6122CUA-L-2.5 [EXAR]
Switching Controller, 2A, 390kHz Switching Freq-Max, PDSO8, MICRO, PLASTIC, SOIC-8;型号: | SP6122CUA-L-2.5 |
厂家: | EXAR CORPORATION |
描述: | Switching Controller, 2A, 390kHz Switching Freq-Max, PDSO8, MICRO, PLASTIC, SOIC-8 开关 光电二极管 |
文件: | 总20页 (文件大小:116K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
SP6122
Low Voltage, Micro 8, PFET, Buck Controller
Ideal for 1A to 5A, Small Footprint, DC-DC Power Converters
■ Optimized for Single Supply, 3V - 7V Applications
■ High Efficiency, Greater than 90% Possible
■ Small Micro 8 Package
■ 20ns/1nF PFET Output Driver
■ Fast Transient Response
■ Open Drain Fault Output Pin
■ Internal, 2ms, Soft Start Circuit (300kHz)
■ Accurate 1.5% Reference
1
2
3
4
8
7
6
5
VCC
PDRV
GND
ISET
SP6122
FFLAG
VOUT
8 Pin µSOIC
ENABLE
ISENSE
■ Factory Programmable Output Voltage
■ Factory Programmable Frequency, up to 600kHz
■ Loss-less Adjustable Current Limit with High side
RDS(ON) Sensing
■ Hiccup or Lock-up Fault Modes
■ Minimum On-Time, “Jitter & Frequency Stabilized”
PFM Control: Simplifies Input and Output Filter
design, provides great Light Load Efficiency and
allows for Low Drop Out Regulation.
APPLICATIONS
■ Video Cards
■ High Power Portable
■ Microcontrollers
■ I/O & Logic
■ Industrial Control
■ Distributed Power
■ Low Voltage Power
■ Low 5µA Sleep Mode Quiescent Current
■ Low 300µA Protected Mode Quiescent Current
■ Ultra Low, 150µA Unprotected Mode Quiescent
Current
■ Output Over Voltage Protection
DESCRIPTION
The SP6122 is a PWM/PFM minimum on-time controller designed to work from a single
5V or 3.3V input supply. It is engineered specifically for size and minimum components
count, simplifying the transition from a linear regulator to a switcher solution. However,
unlike other “micro” parts, the SP6122 has an array of value added features like optional
hiccup mode, over current protection, TTL enable, “jitter and frequency stabilization” and
a fault flag pull down pin. Combined with reference and driver specifications usually found
on more expensive integrated circuits, the SP6122 delivers great performance and value
in a micro 8 package.
3.0V to 7.0V
V
IN
Available in 300kHz or 600kHz
1.5V Adjustable
1.8V, 2.5V and 3.3V Fixed
RSET
CV
CC
V
PDRV
GND
CC
®®
MP2
FFLAG
FFLAG
SP6122
V
I
OUT
SET
1A to 5A
L1
ENABLE
ENABLE
I
V
OUT
SENSE
DFLY
C
OUT
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
1
VCC .............................................................................................................. 7V
All other pins ...................................... -0.3V to VCC+0.3V
Peak Output Current < 10µs
PDRV ......................................................................... 2A
Storage Temperature .............................. -65°C to 150°C
Power Dissipation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of
the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect
reliability.
Lead Temperature (Soldering, 10 sec) ................. 300°C
ESD Rating ...................................................... 2kV HBM
SPECIFICATIONS
Unless otherwise specified: 0°C < TAMB < 70°C, 3.0V < VCC < 5.5V, CPDRV = 1nF, VENABLE = VCC, VFFLAG = VCC
,
I
SET = ISENSE = VCC, GND = 0V
PARAMETER
MIN
TYP
MAX
UNITS CONDITIONS
QUIESCENT CURRENT
VCC Supply Current,
OVC Enabled
-
300
400
µA
No Switching, ISET = ISENSE = VCC
No Switching, ISET = ISENSE = 0
VCC Supply Current,
OVC Disabled
-
-
250
150
-
-
µA
µA
VCC Supply Current,
OVC Disabled, Ultra Low IQ
No Switching, ISET = 0,
ISENSE=VCC
VCC Supply Current, Sleep Mode
-
5
15
µA
Enable=0
REFERENCE
Output Voltage, Initial Accuracy
VR*0.985
VR
VR
5
VR*1.015
V
V
VR = Factory Set Voltage,
see Note
Output Voltage, Over Line,
Load and Temperature
VR*0.980
VR*1.020
VR = Factory Set Voltage,
see Note
PWM/PFM Reference
Comparator Hysteresis
-
-
-
-
mV
µA
Internal Hysteresis at Feedback
Terminal
VOUT Input Current
23
VOUT = VR
OSCILLATOR
Oscillator Frequency
F*0.7
-
F
F*1.3
-
kHz
ns
F = Factory Set Frequency,
see Note
Measured during Startup
Minimum Pulse Width during
Startup (Blanking Time)
200
Soft Start
Soft Start Ramp Time
(600kHz part)
-
-
-
1
2
-
-
-
ms
ms
mV
VOUT = VR – 30mV, Measure
time from ENABLE = 1V to
PDRV Low
Soft Start Ramp Time
(300kHz part)
VOUT = VR – 30mV, Measure
time from ENABLE = 1V to
PDRV Low
Soft Start Voltage when
PDRV Switches
250
Measure VSoft Start when
PDRV goes Low. (internal)
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
2
SPECIFICATIONS
Unless otherwise specified: 0°C < TAMB < 70°C, 3.0V < VCC < 5.5V, CPDRV = 1nF, VENABLE = VCC, VFFLAG = VCC
,
I
SET = ISENSE = VCC, GND = 0V
PARAMETER
MIN
TYP
MAX
UNITS CONDITIONS
RDS OVER CURRENT COMPARATOR
Over Current Comparator
Threshold Voltage
130
150
180
-
mV
V(ISET) - V(ISENSE) 25°C only
Current into ISET 25°C only
Threshold Voltage Temperature
Coefficient
-
3300
ppm/°C
ISET Sink Current
18
-
23
28
-
µA
ISET Current Temperature
Coefficient
4000
ppm/°C
ISENSE Input Bias Current
-
-
-
100
VCC
nA
V
ISET, ISENSE Common Mode
Input Range
2.0
Over Current Peak Detection
Time Constant
-
10
-
µs
ENABLE INPUT & FFLAG OUTPUT
ENABLE Threshold
-
1.1
5
-
V
ENABLE Pin Source Current
FFLAG Sink Current
2
3
10
µA
mA
7.5
V(FFLAG) = 1V
GATE DRIVER
PDRV Rise Time
PDRV Fall Time
20
20
75
75
ns
ns
0.5V to 4.5V
4.5V to 0.5V
NOTE: Available Output Voltages: 1.5V Adj., 1.8V, 2.5V, 3.3V
Available Frequencies: 300kHz, 600kHz
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
3
PIN DESCRIPTION
PIN #
PIN NAME
DESCRIPTION
1
2
VCC
Main Supply Pin: Decouple close to pin.
FFLAG
Fault Flag Pull-down Pin: Sinks current during a fault condition. Can
be hooked up to ENABLE to initiate Hiccup Timing.
3
4
VOUT
Regulated Output Voltage: This voltage is divided internally and
compared to a 1.5%, 1.25V reference at the PWM/PFM comparator.
ENABLE
Enable Input: Floating this pin or pulling above 1.1V enables the part.
Pulling this pin to less than 0.65V will disable the part. If FFLAG is
hooked to ENABLE, a capacitor on ENABLE will control hiccup timing.
5
ISENSE
Negative Input to the Over Current Amplifier/Comparator: This input
is subtracted from the ISET input and gained by a factor of 3.3. The
output of this amplifier is compared with a 0.5V threshold, yielding a
150mV threshold. This threshold has a 3300 ppm/°C temperature
coefficient. If the subtraction exceeds 150mV, charge is pumped into
a capacitor until the capacitor hits VCC/2. At this time, the over current
fault is activated. If ISET = 0V and ISENSE = VCC, the part enters an
unprotected, 150µA quiescent current mode.
6
ISET
Positive Input to the Over Current Amplifier: 23µA flows into the ISET
pin if it is pulled through a resistor to VIN. This current has a
4000ppm/°C temperature coefficient and can be used via external
resistor to raise the overcurrent trip point from 150mV to some higher
value. If ISET = 0V and ISENSE = 0V, the part enters an unprotected,
250µA quiescent current mode.
7
8
GND
Power and Analog Ground: Hook directly to output ground.
Drive for PFET High Side Switch: 1nF/20ns Output Driver.
PDRV
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
4
BLOCK DIAGRAM
Reset
0.5V/ms (300kHz)
1.0V/ms (600kHz)
Soft Start
Dominant
SS
-
R
SS
Latch
+
PFET OFF
QB
S
Reset
1.25V
Dominant
4
ENABLE
Reference
-
POR
QB
Run
Latch
R
Soft Start Clock
+
VOUT * K1
TON
1V
Q
S
Start On Time
Min On Time Clock
VCC
1
RESET
Dominant
S
QB
Loop
Latch
Driver
Logic
PFET
Driver
Reference
Comparator
-
8
7
PDRV
GND
PFET OFF
R
Q
VOUT
3
6
X K1
+
Blank
200ns Blanking
One Shot
ISET
PDRV
23µA
(4000 ppm/°C)
Over Current
(Gated S&H)
Reset
POR
2
+
FFLAG
Dominant
X 3.3
+
S
ISENSE
5
-
FAULT
500mV
(3300 ppm/°C)
-
Q
R
POR
ISET
ISENSE
ISET < 1V
Low IQ
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
5
either signal the upstream circuitry or to
engage a hiccup mode that will restart the
SP6122. Tying FFLAG to ENABLE allows
the controller to restart without assistance.
Lastly, the SP6122 includes a powerful 4Ω
PFETdriverstagedesignedtodriveaPFET
associated with high speed converter de-
signs in the 1 A – 5 A range.
OPERATION
General Overview
The SP6122 is a minimum on-time, PFM
controller for low cost DC/DC step down
converters. The main control loop consists
ofaREFERENCECOMPARATOR, anON-
TIME CLOCK, a LOOP LATCH and a
BLANKING ONESHOT. The REFERENCE
comparatorhas10mVofinternalhysteresis
anda1.25Vinternalreference. Bothhyster-
esis and reference voltage are multiplied
upward by the internal feedback resistor
divider, K1. This value is set by the factory
and determines the output voltage of the
converter. This divider is also used in the
on-time algorithm for the controller. If the
output voltage drops below K1*1.25V, then
theDRIVERLOGICtellsthePFETswitchto
be “on” for a certain minimum time. The on-
time is set by the Soft Start CLOCK fre-
quency and is factory programmed to run at
300kHz or 600kHz. When the part is en-
abled, through VCC or the ENABLE pin, the
DRIVER LOGIC is configured to first look at
the fixed frequency Soft Start loop. The
output voltage is then controlled by a 0.5V/
ms (300 kHz) internal ramp. When the out-
putvoltagereachesK1*1.25V,theSoftStart
loop is switched off and the main loop takes
over. In order for the main loop to appear to
run at the same frequency as the fixed
frequency Soft Start CLOCK, the on-time is
modulated by a VOUT/VCC relationship. As a
result, the SP6122 creates driver wave-
forms that look like PWM waveforms. In an
efforttoreducejitterandenhancethis“PWM-
like” appearance, trailing edge blanking is
incorporated to prevent spurious switching
after the PFET switch has turned off.
Enable
Low quiescent mode or “Sleep Mode” is
initiated by pulling the ENABLE pin below
650mV. The ENABLE pin has an internal
4µA pull-up current and does not require
any external interface for normal operation.
If the ENABLE pin is driven from a voltage
source, the voltage must be above 1.1V in
order to guarantee proper “awake” opera-
tion. Assuming that VCC is above about
2.9V, the SP6122 transitions from “Sleep
Mode” to “Awake Mode” in about 20µs –
30µs and from “Awake Mode” to “Sleep
Mode” in a few microseconds. SP6122 qui-
escent current in sleep mode is 5µA typical.
During Sleep Mode, the PFET switch is
turned off, the internal SS voltage is held
low and the FFLAG pin is high impedance.
Low Current Operation
Ifovercurrentfaultprotectionisnotneeded,
the SP6122 offers two options to lower its
quiescent current. By grounding both ISET
and ISENSE pins, the circuitry responsible for
over current detection is turned off. This
option results in a saving of about 50µA in
quiescent current. Option two requires that
ISET is grounded and ISENSE is greater
than 1.3V. This option put the SP6122 in a
low performance mode that cuts the operat-
ing frequency roughly in half and slows
down critical comparators in the main loop.
Option two can result in additional saving of
100µA bringing the total quiescent current
to only 150µA (typ).
Fault management is controlled either
through power-on-reset (POR) or RDSon
sense over current protection. Should an
over current condition occur, the SP6122
will completely “lock-up” and turn the PFET
switch off. The only way to recover will be to
either cycle the ENABLE pin or VCC. A Fault
flag output (FFLAG) has been included to
Power On Reset (POR)
The POR command is given every time the
bandgap reference is started. The internal
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
6
1.25 V reference is compared against a 1V
NFET threshold. When the reference is
below the threshold, FAULT and RUN
latches are reset, the internal SS voltage is
discharged and the PFET switch is “off”.
The SP6122 is allowed to begin a soft start
cycle when the internal 1.25V is greater
than the 1 V threshold. Note this is a “loose”
threshold and should not be used to guar-
antee under voltage lock out with respect to
VCC. Care should be take to ensure that VCC
does not “get stuck” on the way to its regu-
lated value.
dVOUT/dt creates an average sustained cur-
rent in the output capacitor, this current
must be considered while calculating peak
inrush current and over current thresholds.
An expression to determine the excess in-
rush current due to the dVOUT/dt of the
output capacitor is:
ICOUT = COUT*K1*0.5 V/ms
Lock Up & Hiccup Modes
As previously stated, if the SP6122 detects
an over current condition and initiates a
fault, the power supply remains “locked up”.
That is, the FFLAG pin immediately pulls
low (if loaded) and the PFET switch turns
off. This condition is permanent unless the
either the VCC or ENABLE is cycled. How-
everifFFLAGistiedtoENABLE,theSP6122
will restart without assistance (Hiccup
Mode). Furthermore, therestarttimecanbe
controlled by the addition of a small capaci-
tor on the ENABLE pin to ground. The
restart time is equal to the amount of time it
takes for the 4µA ENABLE pin current to
charge the external capacitor to an NFET
threshold (roughly 1V). The waveforms that
describe the Hiccup Mode operation are
shown below.
Soft Start
Soft start is required on step-down control-
lerstopreventexcessinrushcurrentthrough
the power train during start-up. On the
SP6122, this is managed through turning
the PFET switch on with a fixed frequency
clock and then turning the switch off when
divided down version of the output voltage
exceeds the internal SS voltage ramp. The
internal SS voltage ramp rises with a 0.5 V/
ms slew rate (300 kHz part) and the internal
feedbackvoltagefollowsthisrateofchange.
The presence of the output capacitor cre-
atesextracurrentdrawduringstartup.Since
SS
Voltage
dVSS/dt = 0.5Vms
0.25V
150mV
0V
VISET - VISENSE
0V
Comparator
Reference
Voltage
VOUT = V(1.25 REF) * K1
1.25V
V(VCC
)
FFLAG
Voltage
0V
0V
V(VCC
)
ILOAD
ENABLE
Voltage
Inductor
Current
dVENABLE/dt = 4µA/CENABLE
1.0V
0V
0A
V(VCC
)
V(VIN
)
PDRV
Voltage
SWN
Voltage
0V
0V
TIME
TIME
Figure 2:
Figure 1:
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
7
Over Current Protection
in an effort to match the thermal character-
istics of the PFET switch. It assumed that
theSP6122willbeusedincompactdesigns
where there is a high amount of thermal
coupling between the PFET and the con-
troller.
Over current protection on the SP6122 is
implemented through detection of an ex-
cess voltage condition across the PFET
switch during conduction. This is typically
referred to as high side RDSon detection.
The over current comparator charges a
sampling capacitor each time V(ISET) –
V(ISENSE) exceeds 150mV (typ) and the
PDRV voltage is low. The discharge cur-
rent/charge current ratio on the sampling
capacitor is about 2%. Therefore, provided
that the over current condition persists, the
capacitor voltage will be pumped up during
each time PDRV switches low and this
voltage will trigger an over current condition
upon reaching a CMOS inverter threshold.
There are many advantages to this ap-
proach. First, thefilteringactionofthegated
S/H scheme protects against false trigger-
ing during a transient load condition or sup-
ply line noise. In addition, the total amount
of time to trigger the fault depends on the
on-timeofthePFETswitch.Ten,1µspulses
are equivalent to twenty, 500ns pulses or
one, 1µs pulse, however, depending on the
period, each scenario takes a different
amount of total time to trigger a fault. There-
fore, the fault becomes an indicator of aver-
age power in the PFET switch. Also, be-
cause the CMOS trip threshold is depen-
dent on VCC, the over current scheme is
protected against false triggering due to
changes in line voltage.
Light Load Operation
One of the advantages of the SP6122 mini-
mum on-time control scheme is the loop’s
ability to seamlessly and efficiently transi-
tion from heavy loads to light loads. In most
other control schemes, the controller is no-
tified about a light load condition and then
must abruptly change control schemes in
order to maintain efficiency. The SP6122
simply reduces the frequency when the
average load current is less than the aver-
age inductor ripple current. As a result,
switching loss decreases as the load cur-
rent decreases and overall efficiency is
maintained.
Output Driver
The driver stage consists of a high side, 4
ohm PFET driver. The following waveforms
illustrate basic behavior of the driver.
Gate Driver Test Conditions
5 V
90 %
90 %
10 %
RISE TIME
FALL TIME
PDRV
10 %
V(VCC)
Although the 150mV threshold is fixed, the
overall RDSon detection voltage can be
increased by placing a resistor from ISET to
VCC. A 23µA sink current programs the
additional voltage.
PDRV
Voltage
0 V
V(VCC) = VIN
SWN
Voltage
The 150 mV threshold and 23µA ISET cur-
rent have 3300 ppm/°C and 4000 ppm/°C
temperature coefficients, respectively.
These TC’s are designed into the SP6122
0V
- V(VDIODE
)
TIME
Figure 2:
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
8
APPLICATION INFORMATION
7A. The body of the applications section
contains:
As an SP6122 application example, we will
use the circuit from the SP6122 Evaluation
Board Manual. This evaluation board uses
the Sipex SP6122CU-A2, 1.5V adjustable,
300kHz PFET controller to realize a 3.3V to
1.9V step down converter. The board is
optimized for 1A – 4A operation and has an
RDSon over current trip threshold of about
• Data for the Evaluation Board
• Guidelines for Component Selection
• Features and Protection
• Layout Guidelines
• Introduction to the “Buck Cad Calculator”
+3.3V
V
IN
C
IN
C1
4.7
47
µF
+
µ
F
Ceramic
Ceramic
1
8
7
6
5
PMOS
V
PDRV
GND
CC
Q1
®®
FDS6375
FFLAG
1
2
3
4
FFLAG
J1
RS
1.00k
SP6122
V
I
OUT
SET
2
22
µH
+1.9V
ENABLE
V
OUT
ENABLE
I
SENSE
V
OUT
L1
CEN
4.7nF
R1
499
+
3
DS
STPS2L25U
C
OUT
470µF
GND
R2
1.91k
Figure 1. SP6122 Evaluation Board Application Schematic
Spreadsheet
89
88
87
86
85
84
83
Data For Evaluation Board
The SP6122 is engineered for size and mini-
mum pin count, yet has a very accurate 2.0%
reference over line, load and temperature.
Figure 2 data shows a typical SP6122 Evalu-
ationBoardEfficiencyplot, withefficienciesto
88% and output currents to 4A. Load Regula-
tion plot in Figure 3 shows an essentially flat
response of only 3mV change for up to 4A
load. Figure 4 Line Regulation illustrates a
1.90V output that varies only 4mV or 0.2% for
an input voltage change from 3.0V to 5.5V.
While data on individual power supply boards
may vary, the capability of the SP6122 of
achieving high accuracy over load and line
shown here is quite impressive and desirable
for accurate power supply design.
0
1
2
3
4
5
I
(A)
LOAD
Figure 2. SP6122 Efficiency with VIN = 3.3V,
VOUT = 1.9V.
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
9
Data For Evaluation Board: continued
1.902
1.901
1.900
1.905
1.904
1.903
1.902
1.901
1.899
1.898
1.897
1.900
1.899
0
1
2
3
4
5
3
4
5
6
I
(A)
LOAD
I
(A)
LOAD
Figure 4. SP6122 Line Regulation with ILOAD = 2A.
Figure 3. SP6122 Load Regulation with Input
Voltage = 3.3V.
Guidelines for Component Selection
GENERAL
cost, settheinductorripplecurrentbetween
20%to40%ofthemaximumoutputcurrent.
The SP6122 is a minimum on-time PFM
controller. This means there is no error amp
controlling the loop. Although an internal
algorithm adjusts the on-time approximate
the performance of a fixed frequency con-
troller, the loop control is generated by
looking at OUTPUT RIPPLE. The peak to
peak value of this output ripple must be no
less than 2% of the DC output voltage in
ordertomaintainreasonablefixedfrequency
operation. In addition, as with all PFM con-
trollers, board layout is critical and careful
attention must be paid to minimize paths
that can generate noise. Fortunately, the
SP6122isdesignedforsimplicityandminimal
external components, making it easy to de-
signsmall, quietpowerconvertersupto12W.
The inductor operating point and switching
frequency determine the inductor value as
seen in the following expression:
L = (VOUT + VDIODE)*(VIN – VOUT)/
((VIN + VDIODE)*( FS KR IOUT(max)))
Where FS = switching frequency (see Soft
Start Frequency Specification)
KR = ratio of the ac inductor ripple current to
the maximum output current
VDIODE = forward Schottky diode voltage
For an application with 1.9V out, 4A maxi-
mumIOUT,3.3Vinputsupply,400mVtypical
forward diode voltage, 300kHz clock fre-
quency and a 30% inductor ripple current, a
2.2µH inductor was selected (see Table 1
SP6122 Component Selection).
INDUCTOR SELECTION
In a SP6122 application, the main factors
for choosing an inductor are likely to be
cost, size, saturation current and efficiency.
If you use low inductor values, you get the
smallest size, but you may cause larger
ripple currents and poor efficiency and re-
quire more output capacitance to smooth
the output ripple. Increasing the inductor
valuewilldecreasetheoutputvoltageripple
but degrade the transient response. For a
goodcompromisebetweensize,lossesand
The peak to peak inductor ripple current is:
IPP = (VOUT + VDIODE)*(VIN – VOUT)/
((VIN + VDIODE)*( FS L))
For that same 2.2µH inductor application,
the IPP = 1.32A.
The inductor must be selected to not satu-
rate the core at the peak inductor current:
IPEAK = IOUT(max) + IPP/2
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
10
Guidelines for Component Selection: continued
Again,forthatsame2.2µHapplication,IPEAK
= 4.6A. Therefore, a 2.2µH inductor with at
least a 5A rating would be desired.
high switching frequencies because they
have low core losses as long as the satura-
tion current is avoided.
The type of core material to use must also
be determined. For low cost, powdered iron
cores can be used, and they have a gradual
saturationcharacteristic,buttheycancause
ac core loss when the inductor value is low
and ripple current is high. Ferrite cores, on
the other hand, have an abrupt saturation
characteristic and the inductor value drops
sharply when the peak design current is
exceeded. But, ferrites are preferred for
Table 1 lists examples of both shielded and
unshielded ferrite core inductors for applica-
tionsappropriateforSP6122applicationsfrom
2A to 5A output current. The inductors listed
are both shielded and unshielded, the cus-
tomer can decide what is needed for their
application.FortheSP6122EvaluationBoard,
theunshieldedferriteinductor2.2µHCoilcraft
DO3316P-222 was selected for its cost/per-
formance features.
INDUCTORS - SURFACE MOUNT Note: Components highlighted in bold are those used on the SP6122 Evaluation Board.
INDUCTOR SPECIFICATION
Inductance
Manufacturer/
Part No.
Series R
Isat
(A)
Size LxWxH
(mm)
Manufacturer
Website
(µH)
(Ω)
Inductor Type
1.5
Coilcraft DO3316P-152
0.010
0.012
0.015
0.006
0.008
0.010
0.019
0.024
0.029
8.0
7.0
6.4
10.0
7.5
6.0
3.7
3.2
2.7
12.9x9.4x5.0
12.9x9.4x5.0
12.9x9.4x5.0
10x10x3.8
Unshielded Ferrite Core
Unshielded Ferrite Core
Unshielded Ferrite Core
Shielded Ferrite Core
Shielded Ferrite Core
Shielded Ferrite Core
Unshielded Ferrite Core
Unshielded Ferrite Core
Unshielded Ferrite Core
www.coilcraft.com
www.coilcraft.com
www.coilcraft.com
www.sumida.com
www.sumida.com
www.sumida.com
www.murata.com
www.murata.com
www.murata.com
2.2 Coilcraft DO3316P-222
3.3 Coilcraft DO3316P-332
1.5 Sumida CDRH104R-1R5
2.5 Sumida CDRH104R-2R5
3.8 Sumida CDRH104R-3R8
10x10x3.8
10x10x3.8
1.5
2.2
3.3
Murata LQN6C1R5M04
Murata LQN6C2R2M04
Murata LQN6C3R3M04
5.0x5.7x4.7
5.0x5.7x4.7
5.0x5.7x4.7
CAPACITORS - SURFACE MOUNT & THROUGH HOLE Note: Components highlighted in bold are those used on the SP6122 Evaluation Board.
CAPACITOR SPECIFICATION
Capacitance
Manufacturer/
Part No.
ESR
Ripple Current
Size LxWxH
(mm)
Voltage
(V)
Capacitor
Type
Manufacturer
Website
(
)
µF
Ω (max)
(A) @ 25°C
470
47
SANYO 6TPB470M
0.035
3.0
4.0
4.0
2.7
7343H
1812
10.0 SMT Tant.
6.3 SMT X5R Cer.
10.0 SMT X5R Cer.
www.sanyovideo.com
www.tdk.com
TDK C4532X5R0J476M 0.005
4.7 TDK C3216X5R1C475M 0.020
100 SANYO 16SA100M 0.030
1206
www.tdk.com
8Dx10L
16.0Thru-hole OS-CON www.sanyovideo.com
PMOS SWITCH - SURFACE MOUNT Note: Components highlighted in bold are those used on the SP6122 Evaluation Board.
PMOS SPECIFICATION
RDS(ON)
Gate Charge
nc @ 3.3V
Crss
(pF)
Id (max)
(A)
Package
Type
Manufacturer
Website
Manufacturer/Part No.
Fairchild FDS6375
Siliconix SI4463DY
Intersil ITF86172SK8T
Ω @ 3.3V
0.022
0.015
0.023
15
34
17
300
800
400
8
10
8
SO-8
SO-8
SO-8
www.fairchildsemi.com
www.siliconix.com
www.intersil.com
SCHOTTKY DIODE - SURFACE MOUNT Note: Components highlighted in bold are those used on the SP6122 Evaluation Board.
DIODE SPECIFICATION
V
IF(AV)
(A)
Size LxWxH Reverse V
Package
Type
Manufacturer
Website
F @ IF
Manufacturer/Part No.
STMicro STPS2L25U
On-Semi MBRD835L
(V)
(mm)
(V)
25
35
0.50
0.50
4.0
5.5x3.9x2.5
9.4x6.7x2.3
SMB
www.st.com
8.0
DPAK
www.onsemi.com
Table 1: SP6122 Component Selection
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
11
Guidelines for Component Selection: continued
The copper loss in the inductor can be
calculated from the equation:
waveform. For a 1.9V output voltage, the
required ripple is a reasonable 38 mV. The
designer must chose all other trade-offs
wisely to maintain this ripple
2
2
P
L(Cu) =IL(RMS) RWINDING IOUT(max) RWINDING
For the 2.2µH example with 0.012Ω ESR in
the winding, 4A load and 1.9V output, the
copper loss in the inductor is 190mW.
0.02 * VOUT < IPP * RESR
and
∆ILOAD * RESR < ∆VTOL
OUTPUT CAPACITOR SELECTION
where:
The output capacitor is typically selected
based on its ability to maintain the output
within specified tolerance limits during load
transients. During an output load transient,
the output capacitor must supply all the
additional current demanded by the load
until the SP6122 adjusts the inductor cur-
rent to the new value. Therefore the capaci-
tance must be large enough so that the
output voltage is held up while the inductor
current ramps up or down to the value
corresponding to the new load current. For
power converters delivering greater than
1A at less than 1MHz switching frequency,
the output capacitor is typically greater than
100µF. Typically, tantalum and OSCON
capacitors are used to get high output ca-
pacitance in a small space. These capaci-
tors have a high Equivalent Series Resis-
tance (ESR) when compared to ceramic
capacitors and this ESR is both a curse and
ablessing. Unfortunately, theESR(Equiva-
lent Series Resistance) in the output ca-
pacitor causes a step in the output voltage
equal to the ESR value multiplied by the
change in load current. As a result, in a
power supply using a tantalum, aluminum
electrolytics or OSCON output capacitor,
the value of output capacitance (or number
of output capacitors) is typically chosen to
minimize the output variation due to the
load step imposed on this ESR. However,
the SP6122 takes advantage of the natural
presence of this ESR to control the loop.
Because the inductor ripple current also
flows through this ESR, and output ripple
voltage is created and the waveform is
resembles a miniature current-mode timing
VOUT = DC output voltage
RESR = ESR of the output capacitor
DILOAD = change in current due to load
step
DVTOL = tolerable deviation due to load
transient
IPP = peak to peak inductor ripple current
Output ripple is due primarily to the output
ripple current and the output capacitor ESR
value as seen in the following equation:
∆VOUT IPP RESR
For our SP6122 evaluation board example
with ESR = 35mΩ and IPP = 1.32A, ∆VOUT
=
46mV. Note that a 4A step creates a 140mV
deviation. If this is unacceptable, ESR and
IPP must be reconsidered in order to im-
prove step response and maintain output
ripple.
Recommendedcapacitorsthatcanbeused
effectively in SP6122 applications are: low-
ESR aluminum electrolytic capacitors,
OSCON capacitors that provide a very high
performance/size ratio for electrolytic ca-
pacitors and low-ESR tantalum capacitors.
AVX TPS series and Kemet T510 surface
mount capacitors are popular tantalum ca-
pacitors that work well in SP6122 applica-
tions. POSCAP from Sanyo is a solid elec-
trolytic chip capacitor that has low ESR and
high capacitance. For the same ESR value,
POSCAP has lower profile compared with a
tantalum capacitor.
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
12
Guidelines for Component Selection: continued
INPUT CAPACITOR SELECTION
age derating to protect the input capacitors
from surge fall-out.
The input capacitor should be selected for
ripple current rating, capacitance and volt-
age rating. The input capacitor must meet
the ripple current requirement imposed by
the switching current. In continuous con-
duction mode, the source current of the
high-side MOSFET is approximately a
square wave of duty cycle VOUT/VIN. Most of
this current is supplied by the input bypass
capacitors. The RMS value of input capaci-
tor current is determined at the maximum
output current and under the assumption
that the peak to peak inductor ripple current
is low, it is given by:
For accurate control it is important to keep
ripple voltages on Vin to a minimum. Vin
powers the SP6122 and its internal refer-
ence used to maintain output regulation, so
proper input bypassing is critical to reduce
referencenoise. Withareferencecompara-
tor internal hysteresis of 5mV, and a 1.25V
reference voltage, noise on the VCC of the
ICC should be kept to about 20mV or less to
reduce reference noise effect on output
regulation.
The use of very low ESR capacitors is recom-
mendedforVinbypassing, throughtheuseof
parallel combinations of tantalum capacitors
or even better using some of the new large
valued multi-layer ceramic capacitors. ESR
valuesaslowas0.005Ωcanbeobtainedwith
a 47µF ceramic (see table 1 capacitor selec-
tion)andtheseceramiccapacitorswillreduce
thepowerlossintheinputcapacitancegreatly
by their reduced ESR values.
ICIN(RMS) = IOUT(MAX)SQRT(D(1-D))
The worse case occurs when the duty cycle
D is 50% and gives an RMS current value
equal to IOUT/2. Select input capacitors with
adequate ripple current rating to ensure
reliable operation. The power dissipated in
the input capacitor is:
2
PCIN = ICIN (RMS) RESR(CIN)
For the SP6122 example using the 47µF
ceramic input capacitor, the PCIN = 20mW,
which is very efficient, and the input ripple
voltage at the VIN post (not the VCC pin of the
IC) is about 90mV.
This can become a significant part of power
losses in a converter and hurt the overall
energy transfer efficiency. The input volt-
age ripple primarily depends on
the input capacitor ESR and capacitance.
Ignoring the inductor ripple current, the in-
put voltage ripple can be determined by:
MOSFET SELECTION
A SP6122 design uses a PMOS switch on
the high side, without the need for a high
side charge pump, simplifying the applica-
tion circuit. The losses associated with the
PMOS can be divided into conduction and
switching losses. Conduction losses are
related to the on resistance of the PMOS,
and increase with the load current. Switch-
ing losses occur on each on/off transition
when the PMOS experiences both high
current and voltage. The switching losses
are difficult to quantify due to all the vari-
ables affecting turnon/turnoff time. How-
ever, the following equation provides an
approximation on the switching losses as-
sociated with the PMOS driven by SP6122.
∆VIN = IOUT (MAX) RESR(CIN)
IOUT(MAX)VOUT(VIN - VOUT)/( FS CIN VIN
+
2
)
The capacitor type suitable for the output
capacitors can also be used for the input
capacitors. However, exercise extra cau-
tion when tantalum capacitors are consid-
ered. Tantalum capacitors are known for
catastrophic failure when exposed to surge
current, and input capacitors are prone to
such surge current when power supplies
areconnected‘live’tolowimpedancepower
sources. Certain tantalum capacitors, such
as AVX TPS series, are surge tested. For
generic tantalum capacitors, use 2:1 volt-
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
13
Guidelines for Component Selection: continued
PSH(MAX) 1/2 IOUT(MAX)VIN(MAX)(tRISE + FALL)FS
t
Thermal calculation must be conducted to
ensure the MOSFET can handle the maxi-
mum load current. The junction tempera-
tureoftheMOSFET, determinedasfollows,
must stay below the maximum rating.
where tRISE (SP6122) for 8A PMOS is typi-
cally 20ns and tFALL (SP6122) for 8A PMOS
is typically 40ns.
Switching losses need to be taken into
account for high switching frequency, since
they are directly proportional to switching
frequency. The conduction losses associ-
ated with the PMOS is determined by:
TJ(MAX) = TA (MAX) + PMOSFET(MAX) RθJA
where
T
A (MAX) = maximum ambient temperature
PMOSFET(MAX) = maximum power dissipation
of the MOSFET, including both switching
and conduction losses
2
PCH(MAX) = IOUT (MAX) RDS(ON)
D
Where RDS(ON) = drain to source on resis-
tance.
RθJA = junction to ambient thermal resistance.
The total power losses of the PMOS are the
sum of switching and conduction losses.
For input voltages of 3.3V and 5V, conduc-
tionlossesoftendominateswitchinglosses.
Therefore,loweringtheRDS(ON) ofthePMOS
always improves efficiency even though it
gives rise to higher switching losses due to
RθJA of the device depends greatly on the
board layout, as well as device package.
Significant thermal improvement can be
achievedinthemaximumpowerdissipation
through the proper design of copper mount-
ing pads on the circuit board. For example,
in a SO-8 package, placing two 0.04 square
inches copper pad directly under the pack-
age, without occupying additional board
space, can increase the maximum power
from approximately 1 to 1.2W.
increased CRSS
.
For the SP6122 design example, the
Fairchild PMOS FDS6375 was selected for
its low RDS(ON) and good switching charac-
teristics including low gate charge at the
3.3V input. Using table 1 values for RDS(ON)
and tRISE and tFALL for the SP6122, we
calculate;
For the PMOS FDS6375, assuming TA (MAX)
= 20°C, PMOSFET(MAX) = PSH(MAX) + PCH(MAX)
= 321mW, and assuming per FDS6375
2
data sheet, RθJA = 50°C/W if using 0.5 in
pad of 2oz Cu,
PSH(MAX) = 119mW and PCH(MAX) = 203mW.
TJ(MAX) = 36°C
RDS(ON) varies greatly with the gate driver
voltage.TheMOSFETvendorsoftenspecify
RDS(ON) on multiple gate to source voltages
(VGS), as well as provide typical curve of
RDS(ON) versus VGS. For 5V input, use the
RDS(ON) specifiedat4.5VVGS. Atthetimeof
this publication, vendors, such as Fairchild,
Siliconix and International Rectifier, have
started to specify RDS(ON) at VGS less than
3V. This has provided necessary data for
designsinwhichtheseMOSFETsaredriven
with 3.3V and made it possible to use
SP6122 in 3.3V only applications.
which is only a 16°C rise from ambient.
SCHOTTKY DIODE SELECTION
The schottky diode is selected for low for-
ward voltage, current capability and fast
switching speed. The average power dissi-
pation of the schottky diode is determined
by
PDIODE = VF IOUT (1- D)
Where VF is the forward voltage of the
schottky diode at IOUT
.
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
14
Guidelines for Component Selection: continued
For the SP6122 example, the schottky
STPS2L25U has VF = 0.5V for IOUT of 4A,
Since RIN2 has ±50% tolerance, ib change
is +20µA/-7µA. If the SP6122 is trimmed to
1.5V output, Vb will be fixed at 1.5V in a
closed loop. As a result, i2 is not affected by
the variation of the internal resistors, and
the +20uA/-7uA current variation will be
passed on to i3.
the power loss in the schottky PDIODE
848mW.
=
Note that this power dissipation is 2.5 times
greaterthantheMOSFET.Ifweassumethe
same thermal conductivity as the MOSFET
(according to the data sheets, this is close)
weshouldgeta40°CriseduetotheSchottky
diode alone. It is apparent that due to the
proximity of all the components involved
that the board temperature is higher than
ambient and this temperature rise must be
considered when attempting to protect the
power converter.
V
OUT = Vb+i3*R1,
Therefore,
DVOUT = Di3*R1 = +20µA/-7µA*R1.
That is, the additional variation on the out-
put voltage is caused by the internal voltage
divider. Forexample,withR1selectedtobe
500Ω, the variation on the output voltage
will be +10mV/-3.5mV.
Features and Protection
SP6122 Evaluation Board Divider Resis-
tors: The values of R1 and R2 are selected
to program 1.9V output, with 1.5V trim volt-
PROGRAMMING THE SP6122 OUTPUT
VOLTAGE
As you can see by the schematic in Figure 5,
the SP6122 uses an internal feedback di-
vider to initially trim the output voltage using
RIN1 and RIN2, where RIN2 is approximately
62.5K. To accommodate the user who
wants to externally program the SP6122
output voltage, the SP6122 Evaluation
Board has 2 external divider resistors, R1
and R2, which can be used to program the
output voltage above, but not below the
voltage set by the internal resistor divider.
The relationships for the external divider
resistors are derived below:
age Vb, and R1 = 500Ω:
i3 = (VOUT-Vb)/R1=(1.9-1.5)/500 = 800µA.
The external voltage divider will add only
800µA to the load. Divider Resistor R2 is:
R2 = Vb/(i3-i1) =1.5/(800µA-20µA) = 1.9k
The user of the SP6122 Evaluation Board
canusetheaboveequationsfori3andR2to
modify R2 and change the output voltage to
be any voltage from Vb (1.5V) to as high as
the input voltage. And if you want the output
voltage to be the preset voltage Vb (1.5V),
just short a wire across R1.
i1 = VA/RIN2 = 1.25/62.5k = 20µA
SOFT START
V
The SP6122 has a built-in soft start feature
that automatically limits the inrush currents
to reasonable levels for most power sup-
plies. For our 300kHz, 1.9V example, the
soft start time is 2 ms. The inrush current on
start up is:
OUT
®
®
R1
500
i3
i2
SP6122
Vb
Pin 3
R
IN1
R2
1.9k
Va
–
+
i1
R
62.5k
IINRUSH = 470µF * 1.9V/2ms = 447mA
IN2
Error
Amplifier
This extra current must be factored in when
calculating over current margins.
+
–
1.25V
Figure 5: Schematic: Output Voltage Divider Resistors
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
15
Features and Protection: continued
LOCK-UP AND HICCUP MODES
detection threshold at any temperature can
be calculated with reasonable accuracy at
room temperature. For our evaluation board
example:
Basically, when the SP6122 sees an over
current fault, the part can react in two ways.
If the FFLAG is not tied to ENABLE, the part
will put the driver into a low impedance state
to the high rail during a fault. The ENABLE
pin must be manually cycled to remove the
fault. This mode is useful when power sup-
ply sequencing and system fault manage-
ment is complex. If the FFLAG pin is tied to
ENABLE, then a ‘hiccup’ time can be de-
signed by adding a capacitor from ENABLE
to ground. The 4µA ENABLE pin charge
current acts as a timer. The driver will be put
into a low impedance state to the high rail for
a certain amount of time.
ITRIP = (150mV + ISETRSET)/RDS(ON)
=
(150mV + 23µA*1kΩ)/25mΩ = 6.92A
This is the about the same trip threshold at
room, hot or cold because a temperature
coefficienthasbeenaddedtoboththe150mV
andthe23µAsetcurrents. Thistemperature
coefficient tracks the 25mΩ RDSon of the
external FET. Due to the small size of these
power supplies, thermal coupling exists be-
tween the PFET and the SP6122, making
this thermal compensation reasonable, but
not perfect. Notice there is about a 50% pad
between the maximum usable current (5A)
and the over current trip threshold (7A) in
order to accommodate PFET and overall
system variation.
TOFF = CENABLE* 1.1V/4µA
ForCENABLE =4.7nF, thistimeequals1.3ms.
This represents a ‘cool off’ time required for
the power supply to cycle and see if the fault
has been removed. This mode is useful for
shorttermfaultsorinsinglesupplysystems.
RDS(ON) OVER CURRENT PROTECTION
Fault conditions are detected via an over
voltage condition across the PMOS switch
during conduction. This is commonly known
as RDSon sensing. RDSon sensing is inac-
curate but efficient and is used where an
indicatorofovercurrentbehaviorisrequired
for protection. Two advanced features are
incorporated in the SP6122 RDSon sensing
scheme. The sensing environment is very
noisy. Typical schemes require some exter-
nal filtering in order to avoid spurious faults
due to noise or load transients, often com-
promising the protection and performance
at low duty ratios. The SP6122 incorporates
a 10µs internal sample and hold filter after
the main sense comparator. In this fashion,
small pulse widths can be detected while
maintaining adequate filtering against false
glitches. In addition, temperature compen-
sation is added such that the over current
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
16
Layout Guidelines
PCB layout plays a critical role in proper
function of the converters and EMI control.
Inswitchmodepowersupplies, loopscarry-
ing high di/dt give rise to EMI and ground
bounce. Thegoaloflayoutoptimizationisto
identify these loops and minimize them. It is
also crucial on how to connect the controller
ground such that its operation is not af-
fected by noise. The following guidelines
should be followed to ensure proper opera-
tion.
1. A ground plane is recommended for
minimizing noises, copper losses and
maximizing heat dissipation.
2. Connect the ground of the feedback
divider to the GND pin of the IC. Then
connect this pin as close as possible to
the ground of the output capacitor.
3. The Vcc bypass capacitor should be right
next to the Vcc and GND pins.
4. The traces connecting to the feedback
resistorsandcurrentsensecomponents
should be short and far away from the
switch node and switching components.
5. Minimize the trace length/maximize the
trace width between the PDRV pin and
the gate of the PMOS.
6. Minimize the loop composed of input
capacitors, PMOS and Schottky diode,
as this loop carries high di/dt current.
Also increase the trace width to reduce
copper losses.
7. Maximize the trace width of the loop
connecting the inductor, output capaci-
tors, and Schottky diode.
8. For an layout example of an SP6122
powersupply(3.3Vinand1.9Voutat4A)
see the SP6122 Evaluation Board
Manual.
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
17
SP6122 Design Calculator Example: Evaluation Board with 3.3VIN, 1.9VOUT
Table 2, SP6122 Design Calculator, illus-
trates the calculations and formulas con-
tained in the Sipex Non-Synchronous Buck
Cad Calculator spreadsheet, (available in
theapplicationssectionoftheSipexwebsite
at www.sipex.com). The example shown is
the same SP6122 Evaluation Board used
previously with VIN = 3.3V, VOUT = 1.9V at
4A. As you can see, the SP6122 efficiency
at 4A output is calculated to be 84.3%.
Compare this with the Typical Performance
Characteristics curve of 84.5%, which is
very close considering the tolerances of
various components, and you see how use-
ful this easy design calculator is to evaluate
your SP6122 designs.
SP6122 Non-Synchronous Buck Design Calculator
STEADY STATE CALCULATION
Enter Values
IN = Input Voltage (V)
OUT = Output Voltage (V)
Calculation Results
3.3 D = Duty Cycle
Formula
V
0.58 = VOUT/V
IN
V
1.9 Iripple = Ripple Current (A)
1.22 = (V -VOUT)*VOUT/(Fs*1000*L*0.000001*V )
IN
IN
Fs = Switching Frequency (kHz)
IOUT = Load Current (A)
300 Ipeak = Peak Inductor Current (A)
4.61 = IOUT+Iripple/2
4
Output Ripple (mV)
2.2 Iin = Max Input Current (A)
Max Input Ripple (mV)
42.75 = Iripple*ESRout
2.56 = IOUT*D/0.9
L = Inductance (µH)
ESRin = Input Capacitor ESR (mΩ)
5
96.99 = IOUT*ESRin+Iin*(1-D)/(Fs*C *0.000001)
IN
CIN = Input Capacitance (µF)
47 Iin_rms = Input Cap RMS Current (A)
1.98 = IOUT*SQRT(D*(1-D))
ESROUT = Output Capacitor ESR (Ω)
35
EFFICIENCY CALCULATION
Enter Values
Calculation Results
Formula
RGH = GH Impedance (Ω)
PMOS
4
Pic = IC Power (switching) (mW)
31.35 = Icc*V +Chs*V *Fs*0.001
IN
IN
TRISE = SP6122 typ. PMOS rise time (ns)
TFALL = SP6122 typ. PMOS rise time (ns)
Chs = PMOS Gate Charge @ VIN (nc)
Rhs = RDS(ON) @ VIN (mΩ)
20 Psch = Schottky Conducting Loss (mw) 848.48 = Vf*IOUT*(1-D)*1000
40
15 Pch = PMOS Conducting Loss (mW)
22 Psh = PMOS Switching Loss (mW)
Phs = Total PMOS Loss (mW)
202.67 = IOUT*IOUT*D*Rhs
118.80 = 1/2*IOUT*V *(TRISE+TFALL)*Fs*0.001
IN
321.47 = Pch + Psh
Vf = Schottky Forward Voltage
ICC = Supply Current (no switch) (mA)
ESR_L = Inductor ESR (mΩ)
0.5 Pl = Inductor loss (mW)
192.00 = IOUT*IOUT*ESR_L
19.54 = ESRIN*Iin_rms*Iin_rms
1412.84 = Pic+Pls+Phs+Pl+Psch
5
PcIN = Input Capacitor Loss(mW)
12 Pltot = Total Power Losses (mW)
Efficiency (%)
84.32 = VOUT*IOUT/(VOUT*IOUT - Pltot/1000)*100
Table 2: Design Calculator
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
18
8 PIN PLASTIC
MICRO SMALL
OUTLINE (µSOIC)
PACKAGE:
0.0256
BSC
12.0˚
±4˚
0.012
±0.003
0.008
0˚ - 6˚
0.0965
±0.003
0.006
±0.006
R .003
0.006
±0.006
0.118
±0.004
0.16
±0.003
3.0˚
±3˚
12.0˚
±4˚
0.0215
1
±0.006
0.020
0.020
0.037
Ref
1
2
0.116
±0.004
0.034
±0.004
0.116
±0.004
0.040
±0.003
0.013
±0.005
0.118
±0.004
0.004
±0.002
0.118
±0.004
All package dimensions in inches
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
19
ORDERING INFORMATION
Operating Temperature Range
Part Number
Package Type
(300kHz)
SP6122CUA-1.5 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUA-1.5/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
SP6122CUA-1.8 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUA-1.8/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
SP6122CUA-2.5 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUA-2.5/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
SP6122CUA-3.3 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUA-3.3/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
(600kHz)
SP6122CUB-1.5 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUB-1.5/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
SP6122CUB-1.8 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUB-1.8/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
SP6122CUB-2.5 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUB-2.5/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
SP6122CUB-3.3 ....................................... 0°C to 70°C ............................................ 8 Pin µSOIC
SP6122CUB-3.3/TR.................................. 0°C to 70°C ..................... (Tape & Reel) 8 Pin µSOIC
Co rp o ra tio n
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Rev. 5/22/01
SP6122 Low Voltage, Micro 8, PFET, Buck Controller
© Copyright 2001 Sipex Corporation
20
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