XR-2207M [EXAR]
Voltage-Controlled Oscillator; 电压控制振荡器
| 型号： | XR-2207M |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Voltage-Controlled Oscillator |
| 文件： | 总24页 (文件大小：249K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
XR-2207
Voltage-Controlled
Oscillator
...the analog plus companyTM
June 1997–3
FEATURES
APPLICATIONS
D Excellent Temperature Stability (20ppm/°C)
D Linear Frequency Sweep
D FSK Generation
D Voltage and Current-to-Frequency Conversion
D Stable Phase-Locked Loop
D Adjustable Duty Cycle (0.1% to 99.9%)
D Two or Four Level FSK Capability
D Waveform Generation
D Wide Sweep Range (1000:1 Minimum)
D Logic Compatible Input and Output Levels
D Wide Supply Voltage Range ($4V to $13V)
D Low Supply Sensitivity (0.1% /V)
– Triangle, Sawtooth, Pulse, Squarewave
D FM and Sweep Generation
D Wide Frequency Range (0.01Hz to 1MHz)
D Simultaneous Triangle and Squarewave Outputs
GENERAL DESCRIPTION
The XR-2207 is a monolithic voltage-controlled oscillator
(VCO) integrated circuit featuring excellent frequency
stability and a wide tuning range. The circuit provides
simultaneous triangle and squarewave outputs over a
frequency range of 0.01Hz to 1MHz. It is ideally suited for
FM, FSK, and sweep or tone generation, as well as for
phase-locked loop applications.
TheXR-2207hasatypicaldriftspecificationof20ppm/°C.
The oscillator frequency can be linearly swept over a
1000:1 range with an external control voltage; and the
duty cycle of both the triangle and the squarewave
outputs can be varied from 0.1% to 99.9% to generate
stable pulse and sawtooth waveforms.
ORDERING INFORMATION
Operating
Temperature Range
Part No.
XR-2207M
XR-2207CP
XR-2207D
XR-2207ID
Package
14 Lead 300 Mil CDIP
-55°C to +125°C
0°C to +70°C
0°C to +70°C
14 Lead 300 Mil PDIP
16 Lead 300 Mil JEDEC SOIC
16 Lead 300 Mil JEDEC SOIC
-40°C to +85°C
V
CC
1
GND BIAS
BLOCK DIAGRAM
10
11
14
13
A1
A2
TWO
SWO
Triangle Wave Out
Square Wave Out
2
3
C1
C1
Timing
Capacitor
VCO
12
V
EE
4
5
6
7
R1
R2
R3
R4
Binary
Keying
Inputs
9
8
BKI2
BKI1
Timing
Resistors
Current
Switches
Figure 1. Block Diagram
Rev. 2.02
E1975
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
1
XR-2207
PIN CONFIGURATION
1
2
3
4
5
16
15
14
13
12
V
NC
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
V
C1
TWO
SWO
CC
C1
C2
R1
R2
R3
NC
TWO
SWO
V
EE
BIAS
GND
BKI2
C2
R1
R2
R3
R4
V
EE
BIAS
GND
BKI2
BKI1
6
7
11
10
9
R4
BKI1
8
8
14 Lead PDIP, CDIP (0.300”)
16 Lead SOIC (Jedec, 0.300”)
PIN DESCRIPTION
Pin #
Symbol
VCC
C1
Type Description
1
2
Positive Power Supply.
I
I
I
I
I
I
I
I
Timing Capacitor Input.
Timing Capacitor Input.
Timing Resistor 1 Input.
Timing Resistor 2 Input.
Timing Resistor 3 Input.
Timing Resistor 4 Input.
3
C2
4
R1
5
R2
6
R3
7
R4
8
BKI1
BKI2
GND
BIAS
VEE
SWO
TWO
NC
Binary Keying 1 Timing Resistor Select Input.
Binary Keying 2 Timing Resistor Select Input.
Ground Pin.
9
10
11
12
13
14
15, 16
I
Bias Input for Single Supply Operation.
Negative Power Supply.
O
O
Square Wave Output Signal.
Triangle Wave Output Signal.
Only SOIC-16 Package.
Rev. 2.02
2
XR-2207
ELECTRICAL CHARACTERISTICS
Test Conditions: Test Circuit of Figure 3 and Figure 4, V = V = 6V, T = +25°C, C = 5000pF, R = R =
CC
EE
A
1
2
R = R = 20kΩ, RL = 4.7kΩ, Binary Inputs Grounded, S and S Closed Unless Otherwise Specified
3
4
1
2
XR-2207ID/XR-2207M
XR-2207CP/D
Parameters
Units
Conditions
Min.
Typ.
Max.
Min.
Typ.
Max.
General Characteristics
Supply Voltage
Single Supply
Split Supplies
8
26
8
26
V
V
See Figure 3
See Figure 4
See Figure 3
$4
$13
$4
$13
Supply Current
Single Supply
5
7
5
8
mA
Measure at Pin 1, S1, S2
Open
Split Supply
Positive
See Figure 4
5
4
7
6
5
4
8
7
mA
mA
Measure at Pin 1, S1, S2
Open
Negative
Measured at Pin 12, S1, S2
Open
Oscillator Section - Frequency Characteristics
Upper Frequency Limit
Lowest Practical Frequency
Frequency Accuracy
0.5
1.0
0.01
$1
0.5
0.5
1.0
0.01
$1
0.5
MHz
Hz
C =500pF, R3 = 2kΩ
C =50µF, R3 = 2MΩ
$3
$5
% of fO
% of fO
Frequency Matching
Frequency Stability
Temperature
20
50
30
ppm/°C 0°C < TA< 70°C
Power Supply
0.15
0.15
%V
Sweep Range
1000:1 3000:1
1000:1
fH/fL
R3 = 1.5kΩ for fH1
R3 = 2MΩ for fL
Sweep Linearity
10:1 Sweep
%
C =5000pF
1
5
2
1.5
5
fH=10kHz, fL= 1kHz
fH=100kHz, fL= 100Hz
$10% FM Deviation
1000:1 Sweep
FM Distortion
0.1
0.1
%
Recommended Range of
Timing Resistors
1.5
75
10
2000
1.5
2000
kΩ
Ω
See Characteristic Curves
Impedance at Timing Pins
DC Level at Timing Terminals
Binary Keying Inputs
Switching Threshold
75
10
Measured at Pins 4, 5, 6, or 7
mV
1.4
2.2
5
2.8
1.4
2.2
5
2.8
V
Measured at Pins 8 and 9,
Referenced to Pin 10
Input Impedance
kΩ
Notes
Bold face parameters are covered by production test and guaranteed over operating temperature range.
Rev. 2.02
3
XR-2207
ELECTRICAL CHARACTERISTICS (CONT’D)
XR-2207ID/XR-2207M
Parameters
XR-2207CP/D
Units
Conditions
Min.
Typ.
Max.
Min.
Typ.
Max.
Output Characteristics
Triangle Output
Amplitude
Impedance
DC Level
Measured at Pin 13
4
6
10
4
6
10
VPP
Ω
+100
0.1
+100
0.1
mV
%
Referenced to Pin 10
Linearity
From 10% to 90% to Swing
Squarewave Output
Measured at Pin 13, S2
Closed
Amplitude
11
12
0.2
200
20
11
12
0.2
200
20
Vpp
V
Saturation Voltage
Rise Time
0.4
0.4
Referenced to Pin 12
CL ꢀ 10pF
nsec
nsec
Fall Time
CL ꢀ 10pF
Notes
Bold face parameters are covered by production test and guaranteed over operating temperature range.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26V
Storage Temperature Range . . . . . -65°C to +150°C
Power Dissipation (package limitation)
Ceramic package . . . . . . . . . . . . . . . . . . . . . . . 750mW
Derate above +25°C . . . . . . . . . . . . . . . . . . 6mW/°C
Plastic package . . . . . . . . . . . . . . . . . . . . . . . . . 625mW
Derate above +25°C . . . . . . . . . . . . . . . . . . 5mW/°C
SOIC package . . . . . . . . . . . . . . . . . . . . . . . . . 500mW
Derate above +25°C . . . . . . . . . . . . . . . . . 4mW/°C
Rev. 2.02
4
XR-2207
V
CC
1
Q1 Q2
Q3 Q4
Q14
Q15
2R
Q13
R
–
+
Triangle Wave
Output
R
Q5
14
R
R
Q19
2R
Q12
Timing
Capacitor
R1
R3
R4
2
3
Q10 Q11
4R
Q6
Q7
Q8
Q9
R2
7
6
5
4
Timing Resistors
Q16
Square Wave
Output
Q18
R5
Q20
R6
Q21
R7
13
9
8
Q17
Binary
Keying
Inputs
Q27
B
A
B
A
10
Q22
Q25 Q26
Q24
Ground
BIAS
11
Q23
V
EE
12
Figure 2. Equivalent Schematic Diagram
Rev. 2.02
5
XR-2207
PRECAUTIONS
SYSTEM DESCRIPTION
The XR-2207 functional blocks are shown in the block
diagram given in Figure 1. They are a voltage controlled
oscillator (VCO), four current switches which are
controlled by binary keying inputs, and two buffer
amplifiers for triangle and squarewave outputs. Figure 2
isasimplifiedXR-2207schematicdiagramthatshowsthe
circuit in greater detail.
The following precautions should be observed when
operating the XR-2207 family of integrated circuits:
1. Pulling excessive current from the timing terminals
will adversely affect the temperature stability of the
circuit. To minimize this disturbance, it is
recommended that the total current drawn from pins
4, 5, 6, and 7 be limited to ꢀ 6mA. In addition,
permanent damage to the device may occur if the
total timing current exceeds 10mA.
The VCO is a modified emitter-coupled current controlled
multivibrator. Its oscillation is inversely proportional to the
value of the timing capacitor connected to pins 2 and 3,
2. Terminals 2, 3, 4, 5, 6 , and 7 have very low internal
impedance and should, therefore, be protected from
accidental shorting to ground or the supply voltage.
and directly proportional to the total timing current I . This
T
current is determined by the resistors that are connected
from the four timing terminals (pins 4, 5, 6 and 7) to
ground, and by the logic levels that are applied to the two
binarykeyinginputterminals(pins8and9). Fourdifferent
3. The keying logic pulse amplitude should not exceed
the supply voltage.
oscillation frequencies are possible since I can have four
T
different values.
The triangle output buffer has a low impedance output
(10Ω TYP) while the squarewave is an open-collector
type. An external bias input allows the XR-2207 to be
used in either single or split supply applications.
V
CC
V
CC
S2
I+
C
0.1µF
RL
1
2
3
Square Wave
Output
13
14
11
V+ C1
C2
SWO
TWO
BIAS
8
9
Binary
Keying Inputs
A
B
Triangle Wave
Output
XR-2207
V
CC
0.1µF
10
5.1K
GND
R1 R2 R3 R4 V-
4
5
6
7
12
3.9K
R1 R2 R3 R4
S1
Figure 3. Test Circuit for Single Supply Operation
Rev. 2.02
6
XR-2207
V
CC
V
CC
S2
C
I+
0.1µF
RL
Square Wave
Output
1
2
C1
3
C2
13
14
11
V+
SWO
TWO
BIAS
8
A
B
Triangle Wave
Output
Binary
Keying Inputs
9
XR-2207
10
GND
R1 R2 R3 R4 V-
I-
4
5
6
7
12
V
EE
R1 R2 R3 R4
0.1µF
S1
Figure 4. Test Circuit for Split Supply Operation
OPERATING CONSIDERATIONS
Bypass Capacitors
The recommended value for bypass capacitors is 1µF
although larger values are required for very low frequency
operation.
Supply Voltage (Pins 1 and 12)
The XR-2207 is designed to operate over a power supply
range of $4V to $13V for split supplies, or 8V to 26V for
single supplies. Figure 5 shows the permissible supply
voltage for operation with unequal split supply voltages.
Figure 6 and Figure 7 show supply current versus supply
voltage Performance is optimum for $6V split supply, or
12V single supply operation. At higher supply voltages,
the frequency sweep range is reduced.
Timing Resistors (Pins 4, 5, 6, and 7)
The timing resistors determine the total timing current, I ,
T
available to charge the timing capacitor. Values for timing
resistors can range from 2kΩ to 2MΩ; however, for
optimum temperature and power supply stability,
recommended values are 4kΩ to 200kΩ (see Figure 8,
Figure 9, Figure 10andFigure 11). Toavoidparasiticpick
up, timing resistor leads should be kept as short as
possible. For noisy environments, unused or deactivated
timing terminals should be bypassed to ground through
0.1µF capacitors.
Ground (Pin 10)
For split supply operation, this pin serves as circuit
ground. For single supply operation, pin 10 should be AC
grounded through a 1µF bypass capacitor. During split
supply operation, a ground current of 2I flows out of this
T
Timing Capacitor (Pins 2 and 3)
terminal, where I is the total timing current.
T
The oscillator frequency is inversely proportional to the
timing capacitor, C. The minimum capacitance value is
limited by stray capacitances and the maximum value by
physical size and leakage current considerations.
Recommended values range from 100pF to 100µF. The
capacitor should be non-polarized.
Bias for Single Supply (Pin 11)
For single supply operation, pin 11 should be externally
biased to a potential between V /3 and V /2V (see
Figure 3). The bias current at pin 11 is nominally 5% of the
+
+
total oscillation timing current, I .
T
Rev. 2.02
7
XR-2207
25
20
35
30
25
20
R =Parallel Combination
T
of Activated Timing
Resistors
T =25°C
A
15
R =5kΩ
Typical
T
R =2kΩ
T
R =3kΩ
T
Operating
Range
15
10
R =200kΩ
T
10
5
R =20kΩ
T
R =2MkΩ
T
5
0
0
$4
$6
$8
$10 $12
$14
-5
-10
-15
-20
Negative Supply (V)
8
10 12 14 16 18 20 22 24 26 28
Single Supply Voltage (V)
+
Figure 5. Operating Range for Unequal Split
Supply Voltages
Figure 6. Positive Supply Current, 1 (Measured
at Pin 1) vs. Supply Voltage
15
T =25°C
A
T =25°C
A
1MΩ
10
5
100kΩ
Timing
Resistor
Range
10kΩ
1kΩ
0
0
$4V
$8V
$12V
0
0
$6
$8
$10
$12 $14
Split Supply Voltage (V)
8
16
24
Single Supply Voltage (V)
-
Figure 7. Negative Supply Current, I
Figure 8. Recommended Timing Resistor
Value vs. Power Supply Voltage
(Measured at Pin 12) vs. Supply Voltage
Rev. 2.02
8
XR-2207
7
6
5
1.04
1.02
V =$6V
S
R =2MΩ
T
C=5000pF
R =20kΩ
T
4
3
2
1
0
1.00
.98
R =200kΩ
T
-1
-2
-3
-4
-5
.96
T =25°C
A
R =2kΩ
T
R =Total
T
.94
.92
Timing
Resistance
C=5000pF
-6
-7
$2
$4
$6
$8
$10
$12 $14
1K
10K
100K
1M
10M
Split Supply Voltage (V)
Timing Resistance (Ω)
4
8
12
16
20
24
28
Single Supply Voltage (V)
Figure 9. Frequency Accuracy vs.
Timing Resistance
Figure 10. Frequency Drift vs. Supply Voltage
+2%
+1%
V =$6V
S
C=5000pF
2MΩ
200kΩ
2kΩ
4kΩ
0
20kΩ
4kΩ
20kΩ
-1%
-2%
-3%
200kΩ
R=2kΩ
2MΩ
-50
-25
0
+25 +50 +75 +100 +125
Temperature (°C)
Figure 11. Normalized Frequency Drift with
Temperature
Rev. 2.02
9
XR-2207
Binary Keying Inputs (Pins 8 and 9)
Timing Capacitor
C
V
CC
1
The logic levels applied to the two binary keying inputs
allow the selection of four different oscillator frequencies.
The internal impedance at these pins is approximately
5kΩ. Keying voltages, which are referenced to pin 10, are
< 1.4 V for “zero” and > 3V for “one” logic levels. Table 1
relates binary keying input logic levels, and selected
timing pins to oscillator output frequency for each of the
four possible cases.
2
IT/2
3
IT/2
Ib
T4
T3
T2
T1
10
Figure 12 shows the oscillator control mechanism in
greater detail. Timing pins 4, 5, 6 and 7 correspond to the
emitters of switching transistor pairs T1, T2, T3, and T4
respectively, which are internal to the integrated circuit.
The current switches, and corresponding timing
terminals, are activated by external logic signals applied
to pins 8 and 9.
A
B
Binary
Keying
Controls
8
9
V
4
5
6
7
I1 I2 I3 I4
R1 R2 R3 R4
12
V
EE
Logic Level
Selected
Timing Pins
Frequency
Figure 12. Simplified Schematic of Frequency
Control Mechanism
Pin 8
Pin 9
0
0
1
1
0
1
0
1
6
f1
6 and 7
5
f1 + Df1
f2
Squarewave Output (Pin 13)
The squarewave output at pin 13 is an “open-collector”
stage capable of sinking up to 20mA of load current. R
4 and 5
f2 + Df2
L
serves as a pull-up load resistor for this output.
Recommended values for R range from 1kΩ to 100kΩ.
L
Table 1. Logic Table for Binary Keying Controls
Triangle Output (Pin 14)
Theoutputatpin14isatrianglewavewithapeakswingof
approximately one-half of the total supply voltage. Pin 14
has a 10Ω output impedance and is internally protected
against short circuits.
Definitions:
1
R3C
1
R4C
1
R2C
1
R1C
MODES OF OPERATION
Split Supply Operation
f1 +
Df1 +
Df2 +
Df2 +
Figure 13 is the recommended configuration for split
supply operation. The circuit operates with supply
voltages ranging from $4V to $13V. Minimum drift
occurs with $6V supplies. For operation with unequal
supply voltages, see Figure 5.
Logic Levels: 0 = Ground, 1 ꢀ 3V
Note
For single supply operation, logic levels are referenced to
voltage at pin 10
With the generalized circuit of Figure 13A, the frequency
of operation is determined by the timing capacitor, C, and
the activated timing resistors (R through R ). The timing
1
4
resistors are activated by the logic signals at the binary
Rev. 2.02
10
XR-2207
keying inputs (pins 8 and 9), as shown in the logic table
(Table 1). If a single timing resistor is activated, the
frequency is 1/RC. Otherwise, the frequency is either
peak-to-peak voltage swing equal to the supply voltages.
This output is an “open-collector” type and requires an
external pull-up load resistor (nominally 5kΩ) to the
positive supply. The triangle waveform obtained at pin 14
is centered about ground and has a peak amplitude of
1/(R ||R )C or 1/(R ||R )C.
1
2
3
4
Figure 13B shows a fixed frequency application using a
single timing resistor that is selected by grounding the
+
V /2.
Note
binary keying inputs. The oscillator frequency is 1/R C.
3
For Single-Supply Operation, Logic Levels are referenced to
voltage at Pin 10.
The squarewave output is obtained at pin 13 and has a
V
CC
C
V
CC
CB
RL
1
2
3
Square Wave
Output
V+ C1
C2
13
14
8
SWO
TWO
BIAS
A
Triangle Wave
Output
Keying Inputs
9
XR-2207
B
11
10
GND
V-
12
R1 R2 R 3 R4
4
5
6
7
R1 R2 R3 R4
V
EE
CB
CB = Bypass Cap
V
EE
A. General Case
V
CC
C
V
CC
CB
RL
1
2
3
Square Wave
Output
C
C
2
V+
1
13
8
SWO
A
B
14
11
Triangle Wave
Output
9
TWO
BIAS
XR-2207
10
GND
f=1/R3<C
R1 R2 R 3 R4 V-
4
5
6
7
12
V
EE
R3
CB
CB = Bypass Cap
V
EE
B. Fixed Frequency Case
Figure 13. Split-Supply Operation
Rev. 2.02
11
XR-2207
Single Supply Operation
For single supply operation, the DC voltage at pin 10 and
the timing terminals (pins 4 through 7) are equal and
The circuit should be interconnected as shown in
Figure 14A or Figure 14B for single supply operation. Pin
12 should be grounded, and pin 11 biased from V
approximately 0.6V above V , the bias voltage at pin 11.
B
The logic levels at the binary keying terminals are
referenced to the voltage at pin 10.
CC
through a resistive divider to a value of bias voltage
+
+
between V /3 and V /2. Pin 10 is bypassed to ground
through a 1µF capacitor.
V
CC
C
V
CC
CB
RL
1
2
3
Square Wave
Output
V+
C1
C2
13
14
8
SWO
TWO
BIAS
A
B
Keying Inputs
CB
Triangle Wave
Output
9
XR-2207
11
10
V
CC
GND
5.1K
R1 R2 R 3 R4 V-
4
5
6
7
12
3.9K
CB = Bypass Cap
R1
R3 R4
R2
A. General Case
V
CC
C
CB
V
CC
RL
1
2
3
Square Wave
Output
V+
C1
C2
13
8
9
SWO
TWO
A
B
14
11
Triangle Wave
Output
XR-2207
10
BIAS
V
CC
GND
5.1K
3.9K
R1 R2 R 3 R4 V-
4
5
6
7
1 2
CB
R3
f=1/R3<C
CB = Bypass Cap
B. Single Frequency
Figure 14. Single Supply Operation
Rev. 2.02
12
XR-2207
Frequency Control (Sweep and FM)
The circuit of Figure 15canoperatebothwithpositiveand
negative values of control voltage. However, for positive
The frequency of operation is controlled by varying the
values of V with small (R /R ) ratio, the direction of the
C
C
3
total timing current, I , drawn from the activated timing
T
timing current I is reversed and the oscillations will stop.
T
pins 4, 5, 6, or 7. The timing current can be modulated by
Figure 16 shows an alternate circuit for frequency control
where two timing pins, 6 and 7, are activated. The
frequency and the conversion gain expressions are the
same as before, except that the circuit will operate only
applying a control voltage, V , to the activated timing pin
C
through a series resistor R . As the control voltage
C
becomes more negative, both the total timing current, I ,
T
and the oscillation frequency increase.
with negative values of V . For V > 0, pin 7 becomes
C
C
The circuits given in Figure 15 and Figure 16 show two
different frequency sweep methods for split supply
operation.
deactivated and the frequency is fixed at:
1
R3
f +
Both binary keying inputs are grounded for the circuit in
Figure 15. Therefore, only timing pin 6 is activated.
The circuit given in Figure 17 shows the frequency sweep
method for single supply operation. Here, the oscillation
frequency is given as:
1
R3C
f +
The frequency of operation, normally
is now
proportional to the control voltage, V , and determined
C
as:
R3
RC
VC
VT
1
R3C
ǒ1 *
Ǔ
ƪ1 )
ƫ
f +
VCR3
RCV-
1
R3C
ƪ1 * ƫ Hz
f +
where VT = Vbias + 0.7V.
If R = 2MΩ, R = 2kΩ, C = 5000pF, then a 1000:1
frequency sweep would result for a negative sweep
This equation is valid from VC = 0V (RC is in parallel with
R3) to
3
C
voltage V ꢀ V-.
C
RC
R3
The voltage to frequency conversion gain, K, is controlled
by the series resistance RC and can be expressed as:
ǒ1 ) Ǔ
VC + VT
Df
1
Caution
K +
+
HzńV
TotaltimingcurrentIT mustbelessthan6mAoverthe frequency
control range.
DVC
RCCV-
Rev. 2.02
13
XR-2207
V
CC
V
CC
C
CB
4.7K
1
2
3
Square Wave
13
14
11
Output
V+ C1
C2
SWO
TWO
BIAS
8
A
Triangle Wave
Output
9
XR-2207
B
VCR3
RCV-
1
CR3
ƪ1 *
ƫ
f +
10
GND
R1 R2 R3 R4 V-
4
5
6
7
12
IT
V
EE
IO
IC
CB
CB = Bypass Cap
R3
R
C
V
EE
V
C
V
C
Sweep or FM input
Figure 15. Frequency Sweep Operation, Split Supply
V
CC
V
CC
C
CB
4.7K
1
2
3
13
14
11
V+ C1
C2
Square Wave
Output
SWO
TWO
BIAS
8
9
A
Triangle Wave
Output
V
CC
B
XR-2207
VCR3
RCV-
1
CR3
ƪ1 *
ƫ
f +
10
GND
R1 R2 R3 R4 V-
4
5
6
7
12
V
EE
IO
IC
CB
CB = Bypass Cap
R3
R
C
V
EE
V
C
V
C
Sweep or FM input
Figure 16. Alternate Frequency Sweep Operation, Split Supply
Rev. 2.02
14
XR-2207
V
CC
V
CC
1µF
C
Square Wave
4.7K
Output
1
2
3
Triangle Wave
Output
13
14
11
V+ C1
C2
SWO
8
A
TWO
BIAS
R3
RC
VC
VT
1
CR3
9
ǒ1 *
Ǔ
ƫ
ƪ1 )
f +
XR-2207
B
Vbias
V
CC
10
GND
5.1K
R1 R2 R3 R4 V-
1µF
3.9K
4
5
6
7
12
1µF
V
EE
V
T
1µF
R3
RC
VC-
VC+
VC
Sweep or FM input
Figure 17. Frequency Sweep Operation, Single Supply
Duty Cycle Control
R2
R2 ) R3
Duty Cycle +
The duty cycle of the output waveforms can be controlled
by frequency shift keying at the end of every half cycle of
oscillator output. This is accomplished by connecting one
or both of the binary keying inputs (pins 8 or 9) to the
squarewave output at pin 13. The output waveforms can
then be converted to positive or negative pulses and
sawtooth waveforms.
and can be varied from 0.1% to 99.9% by proper choice of
timing resistors. The frequency of oscillation, f, is given
as:
2
1
ƪ
ƫ
f +
C R2 ) R3
Figure 18 is the recommended circuit connection for duty
cycle control. Pin 8 is shorted to pin 13 so that the circuit
switches between the “0,0” and the “1,0” logic states
given in Table 1. Timing pin 5 is activated when the output
is “high,” and the timing pin is activated when the
squarewave output goes to a low state.
The frequency can be modulated or swept without
changing the duty cycle by connecting R and R to a
2
3
common control voltage V , instead of V
(see
EE
C
Figure 15).
The sawtooth and the pulse output
The duty cycle of the output waveforms is given as:
waveforms are shown in Figure 19.
Rev. 2.02
15
XR-2207
4.7K
V
CC
V
CC
C
CB
1
2
3
V+
C1
C2
13
14
11
Pulse
Output
8
SWO
A
B
9
TWO
BIAS
XR-2207
Sawtooth
Output
10
GND
R1
R 2 R3 R4
V-
4
5
6
7
12
V
EE
R2
R3
CB
CB = Bypass Cap
V
EE
Figure 18. Duty Cycle Control
Rev. 2.02
16
XR-2207
On-Off Keying
TheXR-2207canbekeyedonandoffbysimplyactivating
an open circuited timing pin. Under certain conditions, the
circuit may exhibit very low frequency (<1Hz) residual
oscillationsinthe“off”stateduetointernalbiascurrents. If
this effect is undesirable, it can be eliminated by
connecting a 10MΩ resistor from pin 3 to V
.
CC
A. Squarewave and Triangle Outputs
Two-Channel FSK Generator (Modem Transmitter)
The multi-level frequency shift-keying capability of
XR-2207 makes it ideally suited for two-channel FSK
generation. A recommended circuit connection for this
application is shown in Figure 20.
For two-channel FSK generation, the “mark” and “space”
frequencies of the respective channels are determined by
the timing resistor pairs (R , R ) and (R , R ). Pin 8 is the
1
2
3
4
“channel-select” control in accord with Figure 11. For a
“high” logic level at pin 8, the timing resistors R and R
1
2
are activated. Similarly, for a “low” logic level, timing
resistors R and R are enabled.
B. Pulse and Sawtooth Outputs
3
4
The “high” and “low” logic levels at pin 9 determine the
respective high and low frequencies within the selected
FSK channel. When only a single FSK channel is used,
the remaining channel can be deactivated by connecting
pin 8 to either V
or ground. In this case, the unused
CC
timing resistors can also be omitted from the circuit.
The low and high frequencies, f and f , for a given FSK
1
2
channel can be fine tuned using potentiometers
connected in series with respective timing resistors. In
fine tuning the frequencies, f should be set first with the
1
C. Frequency Shift Keyed Outputs
Figure 19. Output Waveforms
logic level at pin 9 in a “low” level.
Typical frequency drift of the circuit for 0°C to 75°C
operation is $0.2%. Since the frequency stability is
directly related to the external timing components, care
must be taken to use timing components with low
temperature coefficients.
Rev. 2.02
17
XR-2207
V
CC
V
CC
C
1µF
RL
1
2
3
C1
C2
V+
13
14
11
FSK
Output
8
9
SWO
Channel
Select
A
B
3V
f2
f1
TWO
BIAS
XR-2207
Keying
Input
OV
f1
f2
10
GND
R1 R2 R3 R4 V-
4
5
6
7
12
R1
R2 R3 R4
1µF
10K
10K
10K
10K
V
EE
Figure 20. Multi-Channel FSK Generation
Rev. 2.02
18
XR-2207
14 LEAD CERAMIC DUAL-IN-LINE
(300 MIL CDIP)
Rev. 1.00
14
1
8
7
E
E
1
D
A
1
Base
A
Plane
Seating
Plane
L
e
c
B
α
B1
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
A
0.100
0.015
0.014
0.045
0.008
0.685
0.250
0.200
0.060
0.026
0.065
0.018
0.785
0.310
2.54
0.38
0.36
1.14
0.20
5.08
1.52
0.66
1.65
0.46
19.94
7.87
A
1
B
B1
c
D
E1
E
17.40
6.35
0.300 BSC
0.100 BSC
7.62 BSC
2.54 BSC
e
L
0.125
0.200
3.18
5.08
α
0°
15°
0°
15°
Note: The control dimension is the inch column
Rev. 2.02
19
XR-2207
14 LEAD PLASTIC DUAL-IN-LINE
(300 MIL PDIP)
Rev. 1.00
8
7
14
1
E
1
E
D
A
2
A
L
Seating
Plane
C
A
α
1
B
e
A
e
B
B
e
1
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
A
0.145
0.015
0.115
0.014
0.030
0.008
0.725
0.300
0.240
0.210
0.070
0.195
0.024
0.070
0.014
0.795
0.325
0.280
3.68
0.38
2.92
0.36
0.76
0.20
5.33
1.78
4.95
0.56
1.78
0.38
20.19
8.26
7.11
A
A
B
B
1
2
1
C
D
E
18.42
7.62
6.10
E
e
1
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
e
A
e
B
L
0.310
0.430
0.160
7.87
10.92
4.06
0.115
2.92
α
0°
15°
0°
15°
Note: The control dimension is the inch column
Rev. 2.02
20
XR-2207
16 LEAD SMALL OUTLINE
(300 MIL JEDEC SOIC)
Rev. 1.00
D
16
1
9
E
H
8
C
A
Seating
Plane
α
e
B
A
1
L
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
A
0.093
0.004
0.013
0.009
0.398
0.291
0.104
0.012
0.020
0.013
0.413
0.299
2.35
0.10
0.33
0.23
2.65
0.30
0.51
0.32
10.50
7.60
A
B
1
C
D
E
e
10.10
7.40
0.050 BSC
1.27 BSC
H
L
0.394
0.419
0.050
10.00
0.40
10.65
1.27
0.016
α
0°
8°
0°
8°
Note: The control dimension is the millimeter column
Rev. 2.02
21
XR-2207
Notes
Rev. 2.02
22
XR-2207
Notes
Rev. 2.02
23
XR-2207
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im-
prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de-
scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits are
free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary
depending upon a user’s specific application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly
affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the
user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circum-
stances.
Copyright 1975 EXAR Corporation
Datasheet June 1997
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 2.02
24
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