EMP114-Q5 [EXCELICS]
7.0 - 9.0 GHz Surface-Mounted PA; 7.0 - 9.0 GHz的表面贴装PA型号: | EMP114-Q5 |
厂家: | EXCELICS SEMICONDUCTOR, INC. |
描述: | 7.0 - 9.0 GHz Surface-Mounted PA |
文件: | 总3页 (文件大小:120K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EMP114-Q5
UPDATED: 04/24/2008
7.0 – 9.0 GHz Surface-Mounted PA
FEATURES
•
•
•
•
7.0 – 9.0 GHz Operating Frequency Range
30.0dBm Output Power at 1dB Compression
17.0 dB Typical Small Signal Gain
-40dBc OIMD3 @Each Tone Pout 20dBm
APPLICATIONS
•
•
Point-to-point and point-to-multipoint radio
Military Radar Systems
Caution! ESD sensitive device.
ELECTRICAL CHARACTERISTICS (Ta = 25 °C, 50 ohm, VDD=7V, IDQ=800mA)
SYMBOL
PARAMETER/TEST CONDITIONS
MIN
TYP
MAX
UNITS
F
Operating Frequency Range
7.0
9.0
GHz
Output Power at 1dB Gain Compression
Small Signal Gain
P1dB
Gss
28.5
15.0
30.0
17.0
dBm
dB
Output 3rd Order Intermodulation Distortion
OIMD3
-40
-12
-5
-37
dBc
dB
@∆f=10MHz, Each Tone Pout 20dBm
Input RL
Input Return Loss
Output RL Output Return Loss
dB
Idss
VDD
Rth
Tb
Saturate Drain Current
Power Supply Voltage
Thermal Resistance1
V
DS =3V, VGS =0V
990
-35
1230
7
1400
8
mA
V
10
oC/W
Operating Base Plate Temperature
+85
ºC
ABSOLUTE MAXIMUM RATINGS FOR CONTINUOUS OPERATION2,3
SYMBOL
VDS
CHARACTERISTIC
Drain to Source Voltage
CONTINUOUS
8 V
-4 V
VGS
Gate to Source Voltage
Drain Current
IDD
Idss
IGSF
Forward Gate Current
Input Power
18mA
PIN
@ 3dB compression
150°C
TCH
Channel Temperature
Storage Temperature
Total Power Dissipation
TSTG
-65/150°C
PT
12.0W
1. Rth is mounting dependent. Measured result when used with Excelics recommended evaluation board.
2. Operating the device beyond any of the above rating may result in permanent damage.
3. Bias conditions must also satisfy the following equation VDS*IDS < (TCH –THS)/RTH; where THS = ambient temperature
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
Page 1 of 3
May 2008
EMP114-Q5
UPDATED: 04/24/2008
7.0 – 9.0 GHz Surface-Mounted PA
CHIP OUTLINE AND PIN ASSIGNMENT
Top View
Bottom View
0.197±0.002
0.197±0.002
16
20
0.164
15
1
EMP114
-Q5
11
5
0.042
0.034
0.016
10
6
0 REF
0 REF
0.026±0.002
0.012±0.002
Additional Notes:
1) Ground Plane must be soldered to PCB RF ground
2) All dimensions are in inches
3) Refer to Excelics application notes on QFNs for further guidelines
4) Pin Assignment:
Top View
Bottom View
Vd1
Vd2
Vd2
Vd1
16
20
15
1
EMP114
-Q5
RFin
RFout
RFout
RFin
11
5
10
6
Vg
Vg
Pin
Assignment
1, 2, 4, 5
NC
RFin
Vg
3
6
7, 8, 9, 10, 11, 12, 14, 15
NC
RFout
Vd2
13
16
17, 18, 19
20
NC
Vd1
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
Page 2 of 3
May 2008
EMP114-Q5
UPDATED: 04/24/2008
7.0 – 9.0 GHz Surface-Mounted PA
Recommended Circuit Schematic:
V
d
V
d
22uF
0.1uF
0.1uF
22uF
V
d1NC NC NC
Vd2
NC
NC
NC
NC
EMP114
-Q5
RFin
RFout
NC
NC
NC
NC
NC NC NC NC
Vg
Vg
22uF
0.1uF
Notes:
1) External bypass capacitors should be placed as close to the package as possible.
2) Dual biasing sequence required:
a. Turn-on Sequence: Apply Vg = -2.5V, followed by Vd = 7V, lastly increase Vg until required Idq
b. Turn-off Sequence: Turn off Vd, followed by Vg
3) Demonstration board available upon request.
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
Page 3 of 3
May 2008
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