EM5303AGE [EXCELLIANCE]
5V/12V Synchronous Buck PWM Controller;型号: | EM5303AGE |
厂家: | Excelliance MOS |
描述: | 5V/12V Synchronous Buck PWM Controller |
文件: | 总11页 (文件大小:387K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EM5303/A
5V/12V Synchronous Buck PWM Controller
General Description
Applications
EM5303/A is a synchronous rectified PWM
controller operating with 5V or 12V supply voltage.
This device operates at 200/300 kHz and provides
an optimal level of integration to reduce size and
cost of the power supply.
ꢀ
ꢀ
ꢀ
Notebook & Netbook
Graphic Cards & MB
Low Voltage Logic Supplies
This part includes internal soft start, internal
compensation networks, over current protection,
under voltage protection, and shutdown function.
This part is available in PSOP-8 package.
Pin Configuration
Ordering Information
Part Number
EM5303GE
Package
PSOP-8
Frequency
200kHz
EM5303AGE
PSOP-8
300kHz
Features
Typical Application Circuit
ꢀ
ꢀ
ꢀ
ꢀ
Operate from 5V to 12V Voltage Supply
0.6V VREF with 1.5% Accuracy
Voltage Mode PWM Control
200kHz or 300kHz Fixed Frequency
Oscillator
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0% to 80% Duty Cycle
Internal Soft Start
Over Current Protection
Integrated Bootstrap Diode
Adaptive Non-Overlapping Gate Driver
Under Voltage Protection
Over Voltage Protection
2012/10/16
Rev.A.7
1
EM5303/A
Pin Assignment
Pin Name Pin No.
Pin Function
Bootstrap Supply for the floating upper gate driver. Connect the bootstrap
capacitor C BOOT between BOOT pin and the PHASE pin to form a bootstrap circuit.
The bootstrap capacitor provides the charge to turn on the upper MOSFET. Typical
values for C BOOT range from 0.1uF to 0.47uF. Ensure that C BOOT is placed near the
IC.
BOOT
1
Upper Gate Driver Output. Connect this pin to the gate of upper MOSFET. This pin
is monitored by the adaptive shoot-through protection circuitry to determine when
the upper MOSFET has turned off.
UGATE
GND
2
3
4
Signal and Power Ground for the IC. All voltages levels are measured with respect
to this pin. Tie this pin to the ground island/plane through the lowest impedance
connection available.
Lower Gate Driver Output. Connect this pin to the gate of lower MOSFET. This pin
is monitored by the adaptive shoot-through protection circuitry to determine when
the lower MOSFET has turn off.
LGATE
Supply Voltage. This pin provides the bias supply for the EM5303/A and the lower
gate driver. The supply voltage is internally regulated to 5VDD for internal control
circuit. Connect a well-decoupled 4.5V to 13.2V supply voltage to this pin. Ensure
that a decoupling capacitor is placed near the IC.
VCC
5
Feedback Voltage. This pin is the inverting input to the error amplifier. A resistor
divider from the output to GND is used to set the regulation voltage.
Enable Pin. Pulling this pin lower than 0.3V disables the controller and causes the
oscillator to stop, the UGATE and LGATE outputs to be held low.
PHASE Switch Node. Connect this pin to the source of the upper MOSFET and the
drain of the lower MOSFET. This pin is used as the sink for the UGATE driver, and to
monitor the voltage drop across the lower MOSFET for over current protection.
This pin is also monitored by the adaptive shoot-through protection circuitry to
determine when the upper MOSFET has turned off. A Schottky diode between this
pin and ground is recommended to reduce negative transient voltage which is
common in a power supply system.
FB
EN
6
7
PHASE
8
2012/10/16
Rev.A.7
2
EM5303/A
Function Block Diagram
VCC
5
Internal
regulator
1
BOOT
Soft Start
POR
2
8
UGATE
PHASE
OTP
-
-
Gate
control
logic
PWM
6
FB
EA
VOCP
+
Ramp
VCC
VCC
17V
Reference
0.3V
Oscillator
4
3
LGATE
GꢀD
65% Vref
FB
Eꢀ
7
Enable
FB
130% Vref
2012/10/16
Rev.A.7
3
EM5303/A
Absolute Maximum Ratings (Note 1)
ꢀ Supply voltage, VCC-------------------------------------------------------------- -0.3V to 16V
ꢀ PHASE to GND
DC------------------------------------------------------------------------------------- -5V to 16V
<200nS------------------------------------------------------------------------------- -10V to 32V
ꢀ BOOT to PHASE-------------------------------------------------------------------- 16V
ꢀ BOOT to GND
DC------------------------------------------------------------------------------------- -0.3V to PHASE+16V
<200nS------------------------------------------------------------------------------- -0.3V to 42V
ꢀ UGATE
DC -----------------------------------------------------------------------------------
VPHASE -0.3V to VBOOT + 0.3V
<200ns------------------------------------------------------------------------------ VPHASE -5V to VBOOT +5V
ꢀ LGATE
DC------------------------------------------------------------------------------------
<200ns------------------------------------------------------------------------------
-0.3V to VCC + 0.3V
-5V to VCC+5V
ꢀ EN & FB------------------------------------------------------------------------------ -0.3V to 6V
ꢀ Power Dissipation, PD @ TA = 25°C, PSOP-8 ------------------------------ 1.33W
ꢀ Package Thermal Resistance, ΘJA, PSOP-8 (Note 2)-------------------------- 75°C/W
ꢀ Junction Temperature----------------------------------------------------------- 150°C
ꢀ Lead Temperature (Soldering, 10 sec.)-------------------------------------- 260°C
ꢀ Storage Temperature Range--------------------------------------------------- -65°C to 150°C
ꢀ ESD susceptibility(Note3)
HBM (Human Body Mode)----------------------------------------------------- 2KV
MM (Machine Mode)------------------------------------------------------------ 200V
Recommended Operating Conditions (Note4)
ꢀ Supply Voltage, VCC --------------------------------------------------------
ꢀ Junction Temperature ----------------------------------------------------
ꢀ Ambient Temperature ----------------------------------------------------
4.5V to 13.2V
-40°C to 125°C
-40°C to 85°C
Electrical Characteristics
VCC=12V, TA=25℃, unless otherwise specified
Parameter
Symbol
Test Conditions
Pin Min Typ
Max Units
Supply Input Section
Supply Voltage
VCC
5
5
5
5
5
4.5
4
13.2
4.4
V
mA
mA
V
Supply Current
ICC
LGATE, UGATE open, Switching.
No Switching.
3
Quiescent Supply Current
Power on Reset Threshold
Power on Reset Hysteresis
ICCQ
VCCRTH
VCCHYS
2
4.2
0.2
V
Internal Oscillator
EM5303
170 200 230
255 300 345
1
KHz
KHz
Vp-p
Free Running Frequency
Ramp Amplitude
FSW
EM5303A
△VOSC
2012/10/16
Rev.A.7
4
EM5303/A
Error Amplifier
Open Loop DC Gain
Gain-Bandwidth Product
Slew Rate
AO
Guaranteed by Design
Guaranteed by Design
Guaranteed by Design
Guaranteed by Design
55
3
70
10
6
dB
GBW
SR
MHz
V/us
mS
Trans-conductance
PWM Controller Gate Drivers
gm
0.2
0.7
VBOOT - VPHASE = 12V,
VBOOT - VUGATE = 6V
VBOOT - VPHASE = 12V,
VUGATE – VPHASE = 6V
VBOOT - VPHASE = 12V,
Upper Gate Sourcing Current
Upper Gate Sinking Current
Upper Gate RDS(ON) Sinking
IUG_SRC
IUG_SNK
RUG_SNK
2
2
2
-1
1.5
2
A
A
Ω
4
VUGATE – VPHASE = 0.1V
Lower Gate Sourcing Current
Lower Gate Sinking Current
Lower Gate RDS(ON) Sinking
PHASE Falling to LGATE Rising
Delay
ILG_SRC
ILG_SNK
RLG_SNK
VCC – VLGATE = 6V
4
4
4
-1
1.5
2
A
A
Ω
VLGATE = 6V
VLGATE = 0.1V
4
VCC = 12V; VPHASE < 1.2V to
VLGATE > 1.2V
30
30
90
ns
ns
LGATE Falling to UGATE Rising
Delay
VCC = 12V; VLGATE < 1.2V to
(VUGATE - VPHASE) > 1.2V
90
Reference Voltage
Nominal Feedback Voltage
Enable Voltage
VFB
VEN
6
7
0.591 0.6 0.609
0.3 0.35
V
V
EN Enable Threshold
Protection section
FB Under Voltage Protection
FB Over Voltage Protection
VCC Over Voltage Protection
Over Current Threshold
Soft-Start Interval
VFB_UVP FB falling
6
6
5
55
115 130 145
16 17 18
-425 -375 -325
2.4 3.6 5.4
150 165
65
75
%
%
VFB_OVP FB rising
VCC_OVP
VOCP
TSS
V
mV
ms
℃
Temperature Shutdown
TSD
Guaranteed by Design
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2.
θ
JA is measured in the natural convection at TA=25oC on a 4-layers high effective thermal conductivity test board with
minimum copper area of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for
PSOP-8 package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
2012/10/16
Rev.A.7
5
EM5303/A
Typical Operating Characteristics
Power On Waveform
Turn On from EN
VIN
VEN
VOUT
VOUT
LGATE
ILx
LGATE
ILx
VIN=12V,VOUT=1.2V,COUT=1000uF,No Load. VIN=12V,VOUT=1.2V,COUT=1000uF,No Load.
Turn Off from EN
Switching Waveforms: UGATE Turn On
VOUT
UGATE
VEN
PHASE
UGATE - PHASE
LGATE
ILx
LGATE
VIN=12V,VOUT=1.2V,COUT=1000uF,IOUT=6A.
VIN=12V,IOUT=10A
Power Sequencing Operation
Switching Waveforms: UGATE Turn Off
UGATE
PHASE
VIN
VOUT
UGATE-PHASE
LGATE
LGATE
VIN=12V,IOUT=10A
VCC =12V Ready,VOUT = 1.2V, COUT = 1000uF,
No Load.
2012/10/16
Rev.A.7
6
EM5303/A
Load Transient Response
Over Current Protection
IOUT
Phase
VOUT
VOUT
Phase
IOUT
VIN=12V,VOUT=1.2V,COUT=1000uF.
VIN=12V, VOUT=1.2V, COUT=1000uF.
Output short Ground
Over Current Protection
Load Regulation
Phase
VOUT
IOUT
Output current (A)
VIN=12V, VOUT=1.2V, COUT=1000uF.
Turn On to Short Circuit
Line Regulation
Switching Frequency vs. Input Voltage
Input Voltage (V)
Input Voltage (V)
2012/10/16
Rev.A.7
7
EM5303/A
Switching Frequency vs. Junction
Temperature
Output Voltage vs. Junction
Temperature
Junction Temperature (℃)
Junction Temperature (℃)
2012/10/16
Rev.A.7
8
EM5303/A
Functional Description
UVP, Under Voltage Protection
EM5303/A is a voltage mode synchronous buck
PWM controller. The compensation circuit is
implemented internally to minimize the external
component count. This device provides complete
protection function such as over current protection,
under voltage protection and over voltage
protection.
The FB voltage is monitored for under voltage
protection. The UVP threshold is typical 0.4V.
When UVP is triggered, EM5303/A will shut down
the converter and cycles the soft start function in a
hiccup mode.
OVP, Over Voltage Protection
The FB voltage is monitored for over voltage
protection. The OVP threshold is typical 0.8V.
When OVP is triggered, EM5303/A will turn off
upper MOSFET and turn on lower MOSFET.
Supply Voltage
The VCC pin provides the bias supply of EM5303/A
control circuit, as well as lower MOSFET’s gate and
the BOOT voltage for the upper MOSFET’s gate. A
minimum 0.1uF ceramic capacitor is recommended
to bypass the supply voltage.
Output Inductor Selection
The output inductor is selected to meet the output
voltage ripple requirements and minimize the
response time to the load transient. The inductor
value determines the current ripple and voltage
ripple. The ripple current is approximately the
following equation:
Power ON Reset
To let EM5303/A start to operation, VCC voltage
must be higher than its POR voltage even when EN
voltage is pulled higher than enable high voltage.
Typical POR voltage is 4.2V.
V − VOUT
VOUT
IN
Enable
ΔIL =
∗
L
V *F
IN
To let EM5303/A start to operation, EN voltage
must be higher than its enable voltage. Typical
enable voltage is 0.3V.
SW
Output Capacitor Selection
An output capacitor is required to filter the output
and supply the load transient. The selection of
output capacitor depends on the output ripple
voltage. The output ripple voltage is approximately
bounded by the following equation:
Soft Start
EM5303/A provides soft start function internally.
The FB voltage will track the internal soft start
signal, which ramps up from zero during soft start
period.
1
ΔVOUT = ΔIL *(ESR +
)
OCP, Over Current Protection
8*F * COUT
SW
The over current function protects the converter
from a shorted output by using lower MOSFET’s
on-resistance to monitor the current. The OCP level
can be calculated as the following equation:
Input Capacitor Selection
Use a mix of input bypass capacitors to control the
voltage overshoot across the MOSFET. Use small
ceramic capacitors for high frequency decoupling
and bulk capacitors to supply the current needed
each time the upper MOSFET turn on. Place the
small ceramic capacitors physically close to the
MOSFETs and between the drain of the upper
MOSFET and the source of the lower MOSFET. The
important parameters of the input capacitor are
the voltage rating and the RMS current rating.
VOCP
IOCP = −
RDS(ON)
When OCP is triggered, EM5303/A will shut down
the converter and cycles the soft start function in a
hiccup mode. If over current condition still exist
after 3 times of hiccup, EM5303/A will shut down
the controller and latch.
2012/10/16
Rev.A.7
9
EM5303/A
In high current applications, the MOSFET power
dissipation, package selection and heat sink are the
dominate design factor. The power dissipation
includes two loss components: conduction loss and
switching loss. The conduction losses are the
largest component of power dissipation for both
the upper and lower MOSFETs. These losses are
distributed between the two MOSFETs according
to duty factor.
The capacitor voltage rating should be at least 1.25
times greater than the maximum input voltage and
a voltage rating of 1.5 times is a conservative
guideline. The RMS current rating requirement can
be expressed as the following equation:
IRMS = IOUT D(1 -D)
For a through hole design, several electrolytic
capacitors may be needed. For surface mount
designs, solid tantalum capacitors can also be used
but caution must be exercised with regard to the
capacitor surge current rating. These capacitors
must be capable of handling the surge current at
power-up. Some capacitor series available from
reputable manufacturers are surge current tested.
The power dissipations in the two MOSFETs are
approximately the following equation:
PDUPPER = I2OUT *RDS(ON) *D + 0.5*IOUT *V *F *tSW
IN
SW
PDLOWER = I2OUT *RDS(ON) *(1 - D)
Where D is the duty cycle, tSW is the combined
switch ON and OFF time.
Power MOSFET Selection
The EM5303/A requires two N-Channel power
MOSFETs. These should be selected based upon
on-resistance, breakdown voltage, gate supply
requirement,
requirements.
and
thermal
management
2012/10/16
Rev.A.7
10
EM5303/A
Ordering & Marking Information
Device Name: EM5303GE/EM5303AGE for PSOP-8
EM
5303
EM5303GE Device Name
ABCDEFG
ABCDEFG: Date Code
EM
5303A
EM5303AGE Device Name
ABCDEFG: Date Code
ABCDEFG
Outline Drawing
J
F
I
I
K
G
E
H
D
M
N
B
C
A
Dimension in mm
Dimension
A
B
C
D
E
F
G
H
I
J
K
M
N
Min.
4.70 3.70 5.80 0.33
1.20 0.02 0.40 0.19 0.25
1.94 1.94
0∘
Typ.
1.27
Max.
5.10 4.10 6.20 0.51
1.62 0.15 0.83 0.26 0.50
2.49 2.49
8∘
2012/10/16
Rev.A.7
11
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