EM8931J [EXCELLIANCE]
Cost Effective PWM Forward Controller;
| 型号： | EM8931J |
| 厂家： | 
Excelliance MOS |
| 描述： | Cost Effective PWM Forward Controller |
| 文件： | 总10页 (文件大小：256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EM8931
Cost Effective PWM Forward Controller
General Description
Features
EM8931 is a high performance, low startup
current, low cost, current mode PWM controller.
The EM8931 integrates functions of Soft Start(SS),
Under Voltage Lockout(UVLO), Leading Edge
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Ultra Low Start Up Current (6uA)
Current Mode Control
Soft Start Function
Built-in Slope Compensation
Internal Leading-edge Blanking
UVLO
Blanking(LEB),
internal
Over
Temperature
Protection(OTP), internal slope compensation. The
EM8931 also features more protection like Over
Load
Protection(OLP)
and
Over
Voltage
Over Voltage Protection (OVP) on VDD pin
Over Load Protection (OLP)
Protection(OVP) to prevent circuit damage
occurred under abnormal conditions.
The EM8931 provides the users a superior
AC/DC power application of high efficiency,
excellent EMI performance, low external
component counts and lower cost solution.
Cycle-by-cycle Current Limit
Feedback Open Protection
Internal Over Temperature Protection (OTP)
Constant Output Power Limit (Full AC Input
Range)
ꢀ
Excellent EMI performance
Ordering Information
Applications
Part Number
EM8931J
Package
Remark
SOT-23-6
ꢀ
ꢀ
Switching AC/DC Adaptor and charger
Open-Frame SMPS
EM8931S
DIP-8
Typical Application Circuit
AC
INPUT
EMI
Filter
+
DC
OUTPUT
VDD
RT
GATE
CS
EM8931
COMP
GꢀD
2012/4/13
Rev.A.1
1
EM8931
Pin Configuration
Pin Assignment
Pin Number
Pin Name
Pin Function
SOT236
1
DIP8
8
Ground.
GND
Voltage feedback pin, By connecting a photo-coupler to close the control loop and
achieve the regulation.
COMP
2
7
Set the switching frequency by connecting a resistor to GND.
Senses the primary current.
RT
CS
3
4
5
6
--
5
4
2
IC Power Supply Pin.
VDD
GATE
NC
Gate drive output to drive the external MOSFET.
No Internal Connection.
1
3 & 6
Function Block Diagram
VDD
OVP
OTP
28V
Shutdown
Logic
OLP
15V / 9.8V
UVLO
Vbias
RT
COMP
2R
Oscillator
Max duty 50%
R
GATE
S
Q
Soft
CS
LEB
-
Driver
R
Slope
Comp
+
PWM
comparator
-
Soft start
OCP
+
OCP
comparator
+
GꢀD
2012/4/13
Rev.A.1
2
EM8931
Absolute Maximum Ratings
ꢀ Supply Input Voltage, VDD ----------------------------------------------------------------------- 30V
(Note1)
ꢀ Gate pin------------------------------------------------------------------------------------------------ 30V
ꢀ RT, COMP, CS Pin ----------------------------------------------------------------------------------- - 0.3V to 6.5V
ꢀ Power Dissipation, PD @ TA = 25℃
SOT-23-6 ---------------------------------------------------------------------------------------------- 0.4W
DIP-8 ---------------------------------------------------------------------------------------------------- 0.714W
ꢀ Package Thermal Resistance (Note2)
SOT-23-6, --------------------------------------------------------------------------------------------- 250℃/W
DIP-8, --------------------------------------------------------------------------------------------------- 140℃/W
ꢀ Junction Temperature ----------------------------------------------------------------------------- 150℃
ꢀ Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------- 260℃
ꢀ Storage Temperature Range ------------------------------------------------------------------ - 65℃ to 150℃
ꢀ ESD Susceptibility
(Note3)
HBM (Human Body Mode) ------------------------------------------------------------------------ 3KV
MM (Machine Mode) -------------------------------------------------------------------------------- 300V
ꢀ Gate Output Current---------------------------------------------------------------------------------- 300mA
Recommended Operating Conditions
(Note4)
ꢀ Supply Input Voltage, VDD ----------------------------------------------------------------------- 11V to 26V
ꢀ Operating Frequency ------------------------------------------------------------------------------ 50k to 130kHz
ꢀ Junction Temperature Range--------------------------------------------------------------------- -40℃ to 125℃
ꢀ Ambient Temperature Range-------------------------------------------------------------------- 0℃ to 85℃
Electrical Characteristics
(VDD=15V, RRT=100K ohm, TA=25℃, unless otherwise specified)
Parameter
VDD Section
Symbol
Test Conditions
Min
Typ
Max
Units
VDD OVP Protect voltage
Start up current
VOVP
26.5
28
29.6
V
ISTART1
ISTART2
VDD=7V
VDD=15V
-
-
1
6
2
uA
uA
12
VDD On Threshold Voltage
VTH-ON
VTH-OFF
13.5
15
16.5
V
VDD Off Threshold Voltage
Operating Supply Current 1
Operating Supply Current 2
8.8
9.8
2
10.8
V
IDD-OP1 VDD=15V, VCOMP=0V,
-
-
3
-
mA
mA
VDD=15V, VCOMP=3V,
CGATE=1nF
IDD-OP2
2.5
VDD=15V,
IDD-OP3
Operating Supply Current 3
-
0.4
-
mA
Protection triggerred
2012/4/13
Rev.A.1
3
EM8931
Gate Section
Rising Time
TR
TF
CL = 1nF
CL = 1nF
-
-
150
30
200
100
nS
nS
Falling Time
Current-Sense Section
Maximum Internal Current
Setpoint
VCSLim
TLEB
TPD
0.8
0.85
300
100
2
0.9
V
Leading Edge Blanking Time
Propagation Delay Time
200
400
nS
nS
mS
Soft-Start Period
TSS
Internal Oscillator
Oscillation Frequency
fOSC
RRT=100K ohm
67
45
72
50
77
55
3
KHz
%
Maximum Duty
Dmax
VCOMP=3V, VCS=0V
VDD=11V to 25V
-20℃ to 105℃(Note5)
Frequency variation vs. VDD
%
Frequency variation vs.
Temperature
3
%
COMP Section
COMP short to GND current
ICOMP
VCOMP=0V
0.25
5.2
0.55
mA
V
Open loop COMP voltage
VCOMP COMP pin open
Protection Section
Open loop protection delay time Tdelay
56
4.8
160
mS
V
Open loop protection COMP Trip
voltage
VOLP
Internal Temperature Shutdown TSD
℃
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2.
θ
JA is measured in the natural convection at TA=25oC on a 4-layers high effective thermal conductivity test board with
minimum copper area of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for
PSOP-8 package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design.
2012/4/13
Rev.A.1
4
EM8931
Typical Operating Characteristics
Temperature(℃)
Temperature(℃)
Fig1. UVLO (on) vs. Temperature
Fig2. UVLO (off) vs. Temperature
Temperature(℃)
Temperature(℃)
Fig3. VCSLIM vs. Temperature.
Fig4. Start Up Current vs. Temperature.
Temperature(℃)
Temperature(℃)
Fig5. OVP vs. Temperature.
Fig6. VOLP-Trip vs. Temperature.
2012/4/13
Rev.A.1
5
EM8931
Temperature(℃)
VDD (V)
Fig7. Comp Open Voltage vs. Temperature.
Fig8. Start Up Current vs. VDD
2012/4/13
Rev.A.1
6
EM8931
Functional Description
UVLO
An UVLO comparator is implemented in EM8931 to
monitor the VDD pin voltage. As shown in Fig. 11, a
hysteresis is built in to prevent the shutdown from
the voltage drop during startup. The UVLO (on) and
UVLO (off) are setting at 15V and 9.8V,
respectively.
Fig. 13
Soft Start
The EM8931 has an internal soft-start circuit that
increases cycle-by-cycle current limit comparator
inverting input voltage slowly after it starts. The
typical soft-start time is 2mS. The pulse width to
the power MOSFET is progressively increased to
establish the correct working conditions for
transformers, rectifier diodes and capacitors. The
voltage on the output capacitors is progressively
increased with the intention of smoothly
establishing the required output voltage. It also
helps prevent transformer saturation and reduces
the stress on the secondary diode during startup.
Fig. 11
Switching Frequency
To guarantee accurate frequency, EM8931 is
trimmed to 5% tolerance. The internal oscillator
also generates slope compensation, 50% maximum
duty limit. Connect a resistor form RT pin to GND
according to equation below to program the
switching frequency:
fsw (KHz)= 7200/RT(KΩ)
Protection
The EM8931 provides many protection functions
that intend to protect system from being damaged.
All the protection functions are listed as below:
Leading Edge Blanking (LEB)
Each time the power MOSFET turn on, the MOSFET
COSS, secondary rectifier reverse recovery current
and gate driver sourcing current comprise the
current spike. To avoid premature termination of
the switching pulse, a leading edge blanking time is
built in. During the blanking time (300nS), the
PWM comparator is off and cannot switch off the
gate driver. It is recommended to adopt a smaller
R-C filter (as show ad Fig.13) for high power
application to avoid the total spike width over
300nS leading edge blanking time.
ꢀ Cycle-by-cycle current limit
The EM8931 has over-current protection
thresholds (0.85V). It is for cycle-by-cycle
current limit, which turns off MOSFET for the
remainder of the switching cycle when the
sensing voltage of MOSFET current reaches the
threshold.
ꢀ Over-load / Open-loop Protection (OLP)
When feedback loop is open, as shown in Fig. 14,
no current flows through the opto-coupler
transistor, the EM8931 pulls up the COMP pin
2012/4/13
Rev.A.1
7
EM8931
voltage to 5.2V.
When the COMP pin voltage is above 4.8V
longer than 56mS, OLP is triggered. This
protection is also triggered when the SMPS
output drops below the normal value longer
than 56mS due to the overload condition.
Fig. 15
ꢀ Internal Over-Temperature Protection (OTP)
Internal 130℃ / 160℃ hysteresis comparator
will provide over temperature protection (OTP).
OTP will not shutdown system. It stops the
system from switching until the temperature is
under 130℃. Meanwhile, if VDD is below the
UVLO (off) threshold voltage, the system will
hiccup.
Fig. 14
ꢀ Over Voltage Protection (OVP) on VDD
The VGS ratings of the HV power MOSFETs are
often limited up to max 30V. To prevent the VGS
from the fault condition, the EM8931 are
implemented a Over-Voltage-Protection (OVP)
on VDD. Whenever the VDD voltage is high than
the OVP threshold voltage (28V), the output
gate drive will be shutdown to shop the
switching of the power MOSFET until the next
UVLO (on).
ꢀ Pin open / short Protection
There are several open / short protections were
integrated in the EM8931 to prevent the power
supply or adapter from being damage. Under
the conditions list below, the gate output will
turn off to protect the system.
․RT pin short to GND
․RT pin open
The Over-Voltage-Protection on VDD function in
EM8931 is an auto-restart type protection. If the
OVP condition is not released, the VDD will
tripped the OVP level again and re-shutdown
the gate output. The VDD is working as a hiccup
mode as shown in Fig. 15. On the other hand, if
the OVP condition is removed, the VDD level will
go back to normal level and the output will
automatically return to the normal operation.
․CS pin open
2012/4/13
Rev.A.1
8
EM8931
Ordering & Marking Information
Device Name: EM8931J for SOT-23-6
F6: Device Code, F6 for EM8931J
ABC: Date Code
F6ABC
Device Name: EM8931S for DIP-8
Device : EM8931S
EM
8931
ABCDEFG
ABCDEFG: Date Code
Outline Drawing
SOT-23-6
B
B1
e
G
D
A
F
b
A1
Dimension in mm
Dimension
A
A1
B
B1
b
C
D
e
F
G
Min.
0.90 0.00
1.15
0.30 0.08
0.30
0.45
Typ.
2.80 1.60
2.90 0.95
Max.
1.30 0.15
0.50 0.22
1.45 0.60
2012/4/13
Rev.A.1
9
EM8931
DIP-8
E1
EA
B1
e
B
D
Dimension in mm
A
Dimension
A1
A2
B
B1
C
D
E
E1
EA
e
L
Min.
0.381 3.17
9.01
6.22
7.36
8.5
2.92
Typ.
1.524 0.457 0.254
2.54
Max.
5.334
3.429
10.16 6.53
7.87
9.53
3.81
2012/4/13
Rev.A.1
10
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