74123PCQM [FAIRCHILD]
Monostable Multivibrator, TTL, PDIP16,;
| 型号： | 74123PCQM |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Monostable Multivibrator, TTL, PDIP16, |
| 文件： | 总5页 (文件大小：60K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1986
Revised March 2000
DM74123
Dual Retriggerable One-Shot with
Clear and Complementary Outputs
General Description
Features
■ DC triggered from active-HIGH transition or active-LOW
The DM74123 is a dual retriggerable monostable multi-
vibrator capable of generating output pulses from a few
nano-seconds to extremely long duration up to 100% duty
cycle. Each device has three inputs permitting the choice of
either leading-edge or trailing edge triggering. Pin (A) is an
active-LOW transition trigger input and pin (B) is an active-
HIGH transition trigger input. A LOW at the clear (CLR)
input terminates the output pulse: which also inhibits trig-
gering. An internal connection from CLR to the input gate
makes it possible to trigger the circuit by a positive-going
signal on CLR as shown in the Truth Table.
transition inputs
■ Retriggerable to 100% duty cycle
■ Direct reset terminates output pulse
■ Compensated for VCC and temperature variations
■ DTL, TTL compatible
■ Input clamp diodes
To obtain the best and trouble free operation from this
device please read the Operating Rules as well as the
One–Shot Application Notes carefully and observe recom-
mendations.
Ordering Code:
Order Number Package Number
Package Description
DM74123N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Triggering Truth Table
Inputs
Response
A
B
X
L
CLR
L
X
No Trigger
No Trigger
Trigger
X
H
H
H
L
L
X
No Trigger
Trigger
H
H
Trigger
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Functional Description
The basic output pulse width is determined by selection of
transition clear input. Retriggering to 100% duty cycle is
possible by application of an input pulse train whose cycle
time is shorter than the output cycle time such that a con-
tinuous “HIGH” logic state is maintained at the “Q” output.
an external resistor (RX) and capacitor (CX). Once trig-
gered, the basic pulse width may be extended by retrigger-
ing the gated active-LOW transition or active-HIGH
transition inputs or be reduced by use of the active-LOW
© 2000 Fairchild Semiconductor Corporation
DS006539
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Operating Rules
1. An external resistor (RX) and external capacitor (CX)
5.
To obtain variable pulse width by remote trim-
ming, the following circuit is recommended:
are required for proper operation. The value of CX may
vary from 0 to any necessary value. For small time con-
stants high-grade mica, glass, polypropylene, polycar-
bonate, or polystyrene material capacitors may be
used. For large time constants use tantalum or special
aluminum capacitors. If the timing capacitors have
leakages approaching 100 nA or if stray capacitance
from either terminal to ground is greater than 50 pF the
timing equations may not represent the pulse width the
device generates.
Note: “R
” should be as close to the one-shot as possible.
remote
FIGURE 3.
6.
The retriggerable pulse width is calculated as
shown below:
2. When an electrolytic capacitor is used for CX a switch-
ing diode is often required for standard TTL one-shots
to prevent high inverse leakage current (Figure 1).
However, its use in general is not recommended with
retriggerable operation.
T = TW + tPLH = K× RX × CX + tPLH
The retriggered pulse width is equal to the
pulse width plus a delay time period (Figure
4).
3. The output pulse width (TW) for CX > 1000 pF is
defined as follows:
TW = K RX CX(1 + 0.7/RX)
1. where: [RX is in Kilo-ohm]
[CX is in pico Farad]
[TW is in nano second]
[K ≈ 0.28]
FIGURE 4.
7.
Under any operating condition CX and RX
must be kept as close to the one-shot device
pins as possible to minimize stray capaci-
tance, to reduce noise pick-up, and to reduce
I × R and Ldi/dt voltage developed along their
connecting paths. If the lead length from CX to
pins (6) and (7) or pins (14) and (15) is greater
than 3 cm, for example, the output pulse width
might be quite different from values predicted
from the appropriate equations. A non-induc-
tive and low capacitive path is necessary to
ensure complete discharge of CX in each
FIGURE 1.
4.
For CX < 1000 pF see Figure 2 for TW vs. CX
family curves with RX as a parameter:
Pulse Width vs. RX and CX
cycle of its operation so that the output pulse
width will be accurate.
8.
VCC and ground wiring should conform to
good high-frequency standards and practices
so that switching transients on the VCC and
ground return leads do not cause interaction
between one-shots. A 0.01 µF to 0.10 µF
bypass capacitor (disk ceramic or monolithic
type) from VCC to ground is necessary on
each device. Furthermore, the bypass capaci-
tor should be located as close to the VCC pin
as space permits.
Note: For further detailed device characteristics and output performance
please refer to the One-Shot Application Note, AN-366.
FIGURE 2.
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2
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
Storage Temperature
0°C to +70°C
−65°C to +150°C
Recommended Operating Conditions
Symbol
VCC
Parameter
Min
4.75
2
Nom
Max
Units
V
Supply Voltage
5
5.25
VIH
VIL
IOH
IOL
tW
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Pulse Width
V
0.8
−0.8
16
V
mA
mA
A or B HIGH
A or B LOW
Clear LOW
40
40
40
(Note 2)
ns
TWQ
Minimum Width of
A or B
65
50
ns
(Min)
REXT
CEXT
CWIRE
Pulse at Q (Note 2)
External Timing Resistor
External Timing Capacitance
Wiring Capacitance
5
0
kΩ
µF
No Restriction
50
70
pF
at REXT/CEXT Terminal (Note 2)
Free Air Operating Temperature
TA
°C
Note 2: T = 25°C and V = 5V.
A
CC
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
= Min, I = −12 mA
Min
Max
Units
(Note 3)
V
V
Input Clamp Voltage
HIGH Level
V
V
V
V
V
V
V
−1.5
V
V
I
CC
CC
I
= Min, I = Max
OH
OH
2.5
3.4
0.2
Output Voltage
= Max, V = Min
IH
IL
V
LOW Level
= Min, I = Max
CC OL
OL
0.4
V
Output Voltage
= Min, V = Max
IL
IH
I
I
Input Current @ Max Input Voltage
HIGH Level
= Max, V = 5.5V
1
mA
µA
I
CC
CC
I
= Max
Data
40
IH
Input Current
V = 2.4V
Clear
Clear
Data
80
I
I
Low Level
V
= Max, V = 0.4V
−3.2
−1.6
−40
66
IL
CC
I
mA
Input Current
I
I
Short Circuit Output Current
Supply Current
V
V
= Max (Note 4)
−10
mA
mA
OS
CC
CC
CC
= Max (Note 5)(Note 6)
46
Note 3: All typicals are at V = 5V, T = 25°C.
CC
A
Note 4: Not more than one output should be shorted at a time.
Note 5: Quiescent I is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs OPEN, C
= 0.02 µF,
EXT
CC
and R
= 25 KΩ.
EXT
Note 6: I is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs OPEN, C
= 0.02 µF,
CC
EXT
and R
= 25 kΩ.
EXT
3
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Switching Characteristics
at VCC = 5V and T = 25°C
A
C
= 15 pF, R = 400Ω
L
L
Symbol
Parameter
C
= 1000 pF, R
= 10 KΩ
Units
From (Input)
To (Output)
EXT
EXT
Min
Max
t
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
PLH
A to Q
B to Q
33
28
ns
ns
t
PLH
t
Propagation Delay Time
PHL
A to Q
B to Q
40
36
40
ns
ns
ns
HIGH-to-LOW Level Output
t
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
PHL
t
PLH
Clear to Q
t
Propagation Delay Time
HIGH-to-LOW Level Output
Output Pulse Width
(Note 7)
PHL
Clear to Q
A or B to Q
27
ns
t
W(out)
3.08
3.76
µs
Note 7: C
= 1000 pF, R
= 10 kΩ
ECT
EXT
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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