74ABT241CSJX [FAIRCHILD]
Dual 4-Bit Non-Inverting Buffer/Driver ; 双4位非反相缓冲器/驱动器\n型号: | 74ABT241CSJX |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Dual 4-Bit Non-Inverting Buffer/Driver
|
文件: | 总7页 (文件大小:83K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
January 1995
Revised November 1999
74ABT241
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ABT241 is an octal buffer and line driver with 3-STATE
Features
■ Non-inverting buffers
outputs designed to be employed as
address driver, clock driver, or bus-oriented transmitter/
receiver.
a memory and
■ Output sink capability of 64 mA, source capability of
32 mA
■ Guaranteed latchup protection
■ High impedance glitch free bus loading during entire
power up and power down cycle
■ Nondestructive hot insertion capability
Ordering Code:
Order Number Package Number
Package Description
74ABT241CSC
74ABT241CSJ
74ABT241CMSA
74ABT241CMTC
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MSA20
MTC20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
OE1
Description
Output Enable Input (Active LOW)
OE2
Output Enable Input (Active HIGH)
I0–I7
Inputs
O0–O7
Outputs
Truth Table
OE1
I0–3
O0–3
OE2
I4–7
O4–7
H
L
L
X
H
L
Z
H
L
L
H
H
X
H
L
Z
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
© 1999 Fairchild Semiconductor Corporation
DS011691
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Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
Free Air Ambient Temperature
Supply Voltage
−40°C to +85°C
+4.5V to +5.5V
V
CC Pin Potential to Ground Pin
Minimum Input Edge Rate (∆V/∆t)
Data Input
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
−0.5V to +7.0V
50 mV/ns
20 mV/ns
−30 mA to +5.0 mA
Enable Input
Power-Off State
−0.5V to 5.5V
−0.5V to VCC
in the HIGH State
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
DC Latchup Source Current
(Over Comm Operating Range)
Over Voltage Latchup (I/O)
−500 mA
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
10V
DC Electrical Characteristics
VCC
Symbol
VIH
Parameter
Input HIGH Voltage
Min
Typ
Max
Units
Conditions
2.0
V
V
V
V
V
V
Recognized HIGH Signal
Recognized LOW Signal
VIL
Input LOW Voltage
0.8
VCD
VOH
Input Clamp Diode Voltage
Output HIGH Voltage
−1.2
Min
Min
Min
Min
I
I
I
I
IN = −18 mA
OH = −3 mA
OH = −32 mA
OL = 64 mA
2.5
2.0
VOL
IIH
Output LOW Voltage
Input HIGH Current
0.55
1
V
V
V
V
V
IN = 2.7V (Note 4)
µA
µA
µA
V
Max
Max
Max
0.0
1
IN = VCC
IBVI
IIL
Input HIGH Current Breakdown Test
Input LOW Current
7
IN = 7.0V
−1
−1
IN = 0.5V (Note 4)
IN = 0.0V
VID
Input Leakage Test
4.75
I
ID = 1.9 µA
All Other Pins Grounded
IOZH
IOZL
Output Leakage Current
Output Leakage Current
10
µA
µA
0 − 5.5V
0 − 5.5V
V
OUT = 2.7V; OEn = 2.0V
−10
V
V
V
V
OUT = 0.5V; OEn = 2.0V
IOS
Output Short-Circuit Current
Output High Leakage Current
Bus Drainage Test
−100
−275
50
mA
µA
µA
µA
mA
Max
Max
0.0
OUT = 0.0V
ICEX
IZZ
ICCH
ICCL
ICCZ
OUT = VCC
100
50
OUT = 5.5V; All Others GND
Power Supply Current
Power Supply Current
Max
Max
All Outputs HIGH
All Outputs LOW
30
Power Supply Current
50
µA
Max
OEn = VCC
;
All Others at VCC or Ground
VI = VCC − 2.1V
ICCT
Additional ICC/Input
Outputs Enabled
2.5
2.5
50
mA
mA
µA
Outputs 3-STATE
Outputs 3-STATE
Max
Enable Input VI = VCC − 2.1V
Data Input VI = VCC − 2.1V
All Others at VCC or Ground
Outputs Open
ICCD
Dynamic ICC
(Note 4)
No Load
mA/
Max
0.1
MHz
OEn = GND, (Note 3)
One Bit Toggling, 50%
Duty Cycle
Note 3: For 8 bits toggling, ICCD < 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
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2
DC Electrical Characteristics
(SOIC package)
Conditions
L = 50 pF,
L = 500Ω
VCC
C
Symbol
Parameter
Min
Typ
Max
Units
R
VOLP
Quiet Output Maximum Dynamic VOL
0.5
−0.8
3.1
0.8
V
V
V
V
V
5.0
5.0
5.0
5.0
5.0
T
T
T
T
T
A = 25°C (Note 5)
A = 25°C (Note 5)
A = 25°C (Note 7)
A = 25°C (Note 6)
A = 25°C (Note 6)
VOLV
VOHV
VIHD
VILD
Quiet Output Minimum Dynamic VOL
−1.3
2.7
Minimum HIGH Level Dynamic Output Voltage
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
2.0
1.5
1.1
0.8
Note 5: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6: Max number of data inputs (n) switching. n − 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD).
Guaranteed, but not tested.
Note 7: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
(SOIC and SSOP package)
T
A = +25°C
T
A = −40°C to +85°C
VCC = 4.5V–5.5V
V
CC = +5V
L = 50 pF
Typ
C
C
L = 50 pF
Symbol
Parameter
Units
Min
1.0
1.0
1.1
1.3
1.6
1.0
Max
4.6
4.6
6.8
6.8
6.8
5.9
Min Max
tPLH
Propagation Delay
1.0
1.0
1.1
1.3
1.6
1.0
4.6
4.6
6.8
6.8
6.8
5.9
ns
ns
ns
tPHL
tPZH
tPZL
tPHZ
tPLZ
Data to Outputs
Output Enable
Time
Output Disable
Time
Capacitance
Conditions
Symbol
Parameter
Typ
Units
T
A = 25°C
CIN
OUT (Note 8)
Input Capacitance
Output Capacitance
5.0
9.0
pF
pF
V
V
CC = 0V
C
CC = 5.0V
Note 8: COUT is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.
3
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
Package Number M20B
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4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
Package Number MSA20
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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相关型号:
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NXP
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