74AC125SCX_NL 概述
Quad Buffer with 3-STATE Outputs 四路缓冲带3态输出 总线驱动器/收发器
74AC125SCX_NL 规格参数
是否Rohs认证: | 符合 | 生命周期: | Obsolete |
零件包装代码: | SOIC | 包装说明: | 0.150 INCH, LEAD FREE, MS-012, SOIC-14 |
针数: | 14 | Reach Compliance Code: | compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.12 |
Is Samacsys: | N | 控制类型: | ENABLE LOW |
系列: | AC | JESD-30 代码: | R-PDSO-G14 |
JESD-609代码: | e3 | 长度: | 8.625 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | BUS DRIVER |
最大I(ol): | 0.012 A | 湿度敏感等级: | 1 |
位数: | 1 | 功能数量: | 4 |
端口数量: | 2 | 端子数量: | 14 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出特性: | 3-STATE | 输出极性: | TRUE |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装等效代码: | SOP14,.25 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 包装方法: | TAPE AND REEL |
峰值回流温度(摄氏度): | 260 | 电源: | 3.3/5 V |
Prop。Delay @ Nom-Sup: | 10 ns | 传播延迟(tpd): | 10 ns |
认证状态: | Not Qualified | 座面最大高度: | 1.75 mm |
子类别: | Bus Driver/Transceivers | 最大供电电压 (Vsup): | 6 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 3.3 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Matte Tin (Sn) |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 3.9 mm | Base Number Matches: | 1 |
74AC125SCX_NL 数据手册
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PDF下载March 1990
Revised February 2005
74AC125 • 74ACT125
Quad Buffer with 3-STATE Outputs
General Description
The AC/ACT125 contains four independent non-inverting
Features
■ ICC reduced by 50%
buffers with 3-STATE outputs.
■ Outputs source/sink 24 mA
■ ACT125 has TTL-compatible outputs
Ordering Code:
Package
Order Number
Package Description
Number
74AC125SC
M14A
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC125SCX_NL
(Note 1)
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC125SJ
74AC125MTC
74AC125PC
74ACT125SC
M14D
MTC14
N14A
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
M14A
M14A
74AC125SCX_NL
(Note 1)
74ACT125SJ
M14D
MTC14
MTC14
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT125MTC
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT125MTCX_NL
(Note 1)
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT125PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC 4-STD-020B). Device available in Tape and Reel only.
FACT is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS010692
www.fairchildsemi.com
Logic Symbol
Connection Diagram
IEEE/IEC
Function Table
Pin Descriptions
Inputs
Output
On
Pin Names
Description
An
Bn
An, Bn
On
Inputs
Outputs
L
L
L
H
X
L
H
Z
H
H
L
Z
X
HIGH Voltage Level
LOW Voltage Level
HIGH Impedance
Immaterial
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2
Absolute Maximum Ratings(Note 2)
Recommended Operating
Conditions
Supply Voltage (VCC
DC Input Diode Current (IK)
VI 0.5V
)
0.5V to 7.0V
Supply Voltage (VCC
)
20 mA
20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI VCC 0.5V
ACT
DC Input Voltage (VI)
DC Output Diode Current (IOK
0.5V to VCC 0.5V
Input Voltage (VI)
Output Voltage (VO)
)
0V to VCC
VO
0.5V
20 mA
20 mA
Operating Temperature (TA)
40 C to 85 C
VO VCC 0.5V
Minimum Input Edge Rate ( V/ t)
DC Output Voltage (VO)
DC Output Source
0.5V to VCC 0.5V
AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
125 mV/ns
or Sink Current (IO)
50 mA
Minimum Input Edge Rate ( V/ t)
DC VCC or Ground Current
per Output Pin (ICC or IGND
ACT Devices
VIN from 0.8V to 2.0V
)
50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
65 C to 150 C
V
CC @ 4.5V, 5.5V
125 mV/ns
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
140 C
DC Electrical Characteristics for AC
V
T
25 C
T
A
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
1.5
Guaranteed Limits
V
V
V
Minimum HIGH Level
2.1
2.1
V
0.1V
IH
OUT
Input Voltage
2.25
2.75
1.5
3.15
3.85
0.9
3.15
3.85
0.9
V
or V
0.1V
CC
Maximum LOW Level
Input Voltage
V
0.1V
0.1V
IL
OUT
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or V
CC
Minimum HIGH Level
Output Voltage
OH
4.4
4.4
I
50 A
OUT
5.4
5.4
V
V or V
IL IH
IN
OH
OH
OH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
12 mA
24 mA
V
V
24 mA (Note 3)
V
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
OL
0.1
0.1
I
50
A
OUT
0.1
0.1
V
V
or V
IH
IN
OL
OL
OL
IL
3.0
4.5
5.5
5.5
0.36
0.36
0.36
0.1
0.44
0.44
0.44
1.0
I
I
I
12 mA
24 mA
V
A
A
24 mA (Note 3)
V , GND
CC
I
I
(Note 5) Maximum Input Leakage Current
Maximum 3-STATE Current
V
IN
I
V (OE)
V
, V
IL IH
OZ
I
5.5
0.25
2.5
V
V
V
V
V
V
, V
GND
I
CC
V
, GND
O
CC
I
I
I
Minimum Dynamic
5.5
5.5
5.5
75
75
mA
mA
A
1.65V Max
3.85V Min
OLD
OHD
OLD
Output Current (Note 4)
OHD
IN
(Note 5) Maximum Quiescent Supply Current
4.0
40.0
V
or GND
CC
CC
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Note: I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .
CC
IN
CC
3
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DC Electrical Characteristics for ACT
V
T
25 C
T
A
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
0.8
4.4
5.4
V
V
0.1V
0.1V
0.1V
0.1V
50
IH
OUT
1.5
2.0
0.8
0.8
4.4
5.4
or V
CC
Maximum LOW Level
Input Voltage
1.5
V
V
V
IL
OUT
1.5
or V
CC
Minimum HIGH Level
Output Voltage
4.49
5.49
I
A
OH
OUT
V
V or V
IL IH
IN
OH
OH
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
V
V
I
I
I
24 mA
24 mA (Note 6)
V
Maximum LOW Level
Output Voltage
0.001
0.001
50
A
OL
OUT
0.1
0.1
V
V
or V
IH
IN
OL
OL
IL
4.5
5.5
5.5
0.36
0.36
0.1
0.44
0.44
1.0
V
A
A
I
I
24 mA
24 mA (Note 6)
I
I
Maximum Input
Leakage Current
Maximum 3-STATE
Current
V
V
, GND
IN
I
CC
5.5
0.5
5.0
V
V
V
V
V
V
V
, V
OZ
I
IL
IH
V
, GND
O
I
CC
I
I
I
I
Maximum I /Input
CC
5.5
5.5
5.5
5.5
0.6
1.5
75
mA
mA
mA
A
V
2.1V (Note 8)
CCT
OLD
OHD
CC
CC
Minimum Dynamic
Output Current (Note 7)
Maximum Quiescent
Supply Current
1.65V Max
3.85V Min
OLD
OHD
IN
75
4.0
40.0
V
CC
or GND
Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
Note 8: May be measured per the JEDEC Alternate Method.
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4
AC Electrical Characteristics for AC
V
T
25 C
T
40 C to 85 C
50 pF
Min Max
CC
A
A
C
50 pF
C
L
Symbol
Parameter
(V)
(Note 9)
3.3
Units
L
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
Max
9.0
t
t
t
t
t
t
Propagation Delay
6.5
5.5
6.5
5.0
6.0
5.0
7.5
5.5
7.5
6.5
7.5
6.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
10.0
7.5
PLH
ns
ns
ns
ns
ns
ns
Data to Output
5.0
7.0
Propagation Delay
Data to Output
3.3
9.0
10.0
7.5
PHL
PZH
PZL
PHZ
PLZ
5.0
7.0
Output Enable Time
3.3
10.5
7.0
11.0
8.0
5.0
Output Enable Time
Output Disable Time
Output Disable Time
3.3
10.0
8.0
11.0
8.5
5.0
3.3
10.0
9.0
10.5
9.5
5.0
3.3
10.5
9.0
11.5
9.5
5.0
Note 9: Voltage Range 3.3 is 3.3V 0.3V
Voltage Range 5.0 is 5.0V 0.5V
AC Electrical Characteristics for ACT
V
T
25 C
50 pF
Typ
T
A
40 C to 85 C
50 pF
Max
CC
A
C
C
L
Symbol
Parameter
(V)
(Note 10)
5.0
Units
ns
L
Min
Max
Min
t
t
Propagation Delay
1.0
6.5
9.0
1.0
10.0
PLH
Data to Output
Propagation Delay
Data to Output
5.0
1.0
7.0
9.0
1.0
10.0
ns
PHL
t
t
t
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
1.0
1.0
1.0
1.0
6.0
7.0
7.0
7.5
8.5
9.5
1.0
1.0
1.0
1.0
9.5
ns
ns
ns
ns
PZH
PZL
PHZ
PLZ
10.5
10.5
10.5
9.5
10.0
Note 10: Voltage Range 5.0 is 5.0V 0.5V
Capacitance
AC/ACT
Typ
Symbol
Parameter
Units
Conditions
C
C
Input Capacitance
4.5
pF
pF
V
OPEN
5.0V
IN
CC
Power Dissipation Capacitance
45.0
V
PD
CC
5
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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9
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74AC125SCX_NL 相关器件
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