74AC245 [FAIRCHILD]

Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs; 具有三态输入/输出八路双向收发器


型号：	74AC245
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs 具有三态输入/输出八路双向收发器
文件：	总10页 (文件大小：104K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

November 1988

Revised November 1999

74AC245 • 74ACT245

Octal Bidirectional Transceiver with 3-STATE

Inputs/Outputs

General Description

Features

■ I_CCand I_OZreduced by 50%

The AC/ACT245 contains eight non-inverting bidirectional

buffers with 3-STATE outputs and is intended for bus-ori-

ented applications. Current sinking capability is 24 mA at

both the A and B ports. The Transmit/Receive (T/R) input

determines the direction of data flow through the bidirec-

tional transceiver. Transmit (active-HIGH) enables data

from A ports to B ports; Receive (active-LOW) enables

data from B ports to A ports. The Output Enable input,

when HIGH, disables both A and B ports by placing them in

a HIGH Z condition.

■ Noninverting buffers

■ Bidirectional data path

■ A and B outputs source/sink 24 mA

■ ACT245 has TTL-compatible inputs

Ordering Code:

Order Number Package Number

Package Description

74AC245SC

74AC245SJ

M20B

M20D

MTC20

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC245MTC

74AC245PC

74ACT245SC

74ACT245SJ

74ACT245MSA

74ACT245MTC

74ACT245PC

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

M20B

M20D

MSA20

MTC20

N20A

20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

FACT is a trademark of Fairchild Semiconductor Corporation.

DS009944

www.fairchildsemi.com

Connection Diagram

Pin Descriptions

Description

Names

Output Enable Input

Transmit/Receive Input

T/R

A₀–A₇

B₀–B₇

Side A 3-STATE Inputs or 3-STATE Outputs

Side B 3-STATE Inputs or 3-STATE Outputs

Truth Table

Inputs

Outputs

Logic Symbols

T/R

Bus B Data to Bus A

Bus A Data to Bus B

HIGH-Z State

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

IEEE/IEC

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Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions

Supply Voltage (V_CC

)

−0.5V to +7.0V

DC Input Diode Current (I_IK

V_I= −0.5V

)

Supply Voltage (V_CC

)

−20 mA

+20 mA

2.0V to 6.0V

4.5V to 5.5V

0V to V_CC

V_I= V_CC+ 0.5V

ACT

DC Input Voltage (V_I)

−0.5V to V_CC+ 0.5V

Input Voltage (V_I)

Output Voltage (V_O)

DC Output Diode Current (I_OK

)

0V to V_CC

_O= −0.5V

−20 mA

+20 mA

Operating Temperature (T_A)

Minimum Input Edge Rate (∆V/∆t)

AC Devices

−40°C to +85°C

_O= V_CC+ 0.5V

DC Output Voltage (V_O)

DC Output Source

−0.5V to V_CC+ 0.5V

_INfrom 30% to 70% of V_CC

or Sink Current (I_O)

±50 mA

V_CC@ 3.3V, 4.5V, 5.5V

Minimum Input Edge Rate (∆V/∆t)

ACT Devices

125 mV/ns

DC V_CCor Ground Current

per Output Pin (I_CCor I_GND

)

±50 mA

Storage Temperature (T_STG

Junction Temperature (T_J)

PDIP

)

−65°C to +150°C

_INfrom 0.8V to 2.0V

V_CC@ 4.5V, 5.5V

140°C

Note 1: Absolute maximum ratings are those values beyond which damage

to the device may occur. The databook specifications should be met, with-

out exception, to ensure that the system design is reliable over its power

supply, temperature, and output/input loading variables. Fairchild does not

recommend operation of FACT circuits outside databook specifications.

DC Electrical Characteristics for AC

_A= +25°C

T_A= −40°C to +85°C

V_CC

(V)

Symbol

V_IH

Parameter

Units

Conditions

Typ

1.5

Guaranteed Limits

Minimum HIGH Level

Input Voltage

3.0

4.5

5.5

3.0

4.5

5.5

3.0

4.5

5.5

2.1

3.15

3.85

0.9

2.1

3.15

3.85

0.9

_OUT= 0.1V

2.25

2.75

1.5

or V_CC− 0.1V

V_IL

Maximum LOW Level

Input Voltage

_OUT= 0.1V

2.25

2.75

2.99

4.49

5.49

1.35

1.65

2.9

1.35

1.65

2.9

or V_CC− 0.1V

V_OH

Minimum HIGH Level

Output Voltage

4.4

I_OUT= −50 µA

5.4

_IN= V_ILor V_IH

3.0

4.5

5.5

3.0

4.5

5.5

2.56

3.86

4.86

0.1

2.46

3.76

4.76

0.1

_OH= −12 mA

_OH= −24 mA

_OH= −24 mA (Note 2)

V_OL

Maximum LOW Level

Output Voltage

0.002

0.001

0.1

_OUT= 50 µA

0.1

_IN= V_ILor V_IH

3.0

4.5

5.5

0.36

± 0.1

0.44

± 1.0

_OL= 12 mA

_OL= 24 mA

_OL= 24 mA (Note 2)

I_{IN (Note 4)}

I_OLD

Maximum Input Leakage Current

Dynamic Output

µA

V_I= V_CC, GND

V_OLD= 1.65V Max

I_OHD

Current Minimum (Note 3)

−75

_OHD= 3.85V Min

_IN= V_CCor GND

I_CC(Note 4) Maximum Quiescent Supply Current

4.0

40.0

I_OZT

Maximum I/O

V_I(OE) = V_IL, V_IH

V_I= V_CC, GND

Leakage Current

5.5

± 0.3

± 3.0

µA

_O= V_CC, GND

Note 2: All outputs loaded; thresholds on input associated with output under test.

Note 3: Maximum test duration 2.0 ms, one output loaded at a time.

Note 4: I_INand I_CC@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V_CC

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DC Characteristics for ACT

V_CC

_A= +25°C

T_A= −40°C to +85°C

Symbol

Parameter

Units

Conditions

(V)

4.5

5.5

4.5

5.5

4.5

5.5

Typ

1.5

Guaranteed Limits

V_IH

Minimum HIGH Level

Input Voltage

2.0

0.8

4.4

5.4

_OUT= 0.1V

or V_CC− 0.1V

_OUT= 0.1V

or V_CC− 0.1V

1.5

2.0

0.8

4.4

5.4

V_IL

Maximum LOW Level

Input Voltage

1.5

V_OH

Minimum HIGH Level

Output Voltage

4.49

5.49

_OUT= −50 µA

_IN= V_ILor V_IH

4.5

5.5

4.5

5.5

3.86

4.86

0.1

3.76

4.76

0.1

_OH= −24 mA

_OH= −24 mA (Note 5)

V_OL

Maximum LOW Level

Output Voltage

0.001

_OUT= 50 µA

0.1

_IN= V_ILor V_IH

4.5

5.5

0.36

0.44

_OL= 24 mA

_OL= 24 mA (Note 5)

I_IN

Maximum Input

Leakage Current

Maximum

5.5

±0.1

±1.0

µA

V_I= V_CC, GND

V_I= V_CC− 2.1V

I_CCT

0.6

1.5

I_CC/Input

I_OLD

I_OHD

I_CC

Dynamic Output

Current Minimum (Note 6)

Maximum Quiescent

Supply Current

Maximum I/O

5.5

_OLD= 1.65V Max

_OHD= 3.85V Min

_IN= V_CC

−75

5.5

4.0

40.0

µA

or GND

I_OZT

V_I(OE) = V_IL, V_IH

V_I= V_CC, GND

Leakage Current

5.5

±0.3

±3.0

µA

_O= V_CC, GND

Note 5: All outputs loaded; thresholds on input associated with output under test.

Note 6: Maximum test duration 2.0 ms, one output loaded at a time.

AC Electrical Characteristics for AC

V_CC

_A= +25°C

_A= −40°C to +85°C

_L= 50 pF

Max

_L= 50 pF

Symbol

Parameter

(V)

(Note 7)

3.3

Units

Min

1.5

2.5

1.5

2.5

1.5

2.0

1.5

2.0

1.5

Typ

5.0

3.5

5.0

3.5

7.0

5.0

7.5

5.5

6.5

5.5

7.0

5.5

Max

8.5

Min

t_PLH

Propagation Delay

1.0

2.0

1.0

2.0

1.0

1.5

1.0

9.0

7.0

A_nto B_nor B_nto A_n

Propagation Delay

A_nto B_nor B_nto A_n

Output Enable Time

5.0

6.5

t_PHL

t_PZH

t_PZL

t_PHZ

t_PLZ

3.3

8.5

9.0

5.0

6.0

7.0

3.3

11.5

8.5

12.5

9.0

5.0

Output Enable Time

Output Disable Time

3.3

12.0

9.0

13.5

9.5

5.0

3.3

12.0

9.0

12.5

10.0

13.0

10.0

5.0

3.3

11.5

9.0

5.0

Note 7: Voltage Range 3.3 is 3.3V ± 0.3V

Voltage Range 5.0 is 5.0V ± 0.5V

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AC Electrical Characteristics for ACT

V_CC

_A= +25°C

_A= −40°C to +85°C

_L= 50 pF

Max

_L= 50 pF

(V)

Symbol

Parameter

Units

(Note 8)

Min

Typ

Max

Min

t_PLH

Propagation Delay

5.0

1.5

4.0

7.5

1.5

1.0

8.0

9.0

A_nto B_nor B_nto A_n

Propagation Delay

t_PHL

1.5

8.0

A_nto B_nor B_nto A_n

t_PZH

t_PZL

t_PHZ

t_PLZ

Output Enable Time

Output Disable Time

5.0

1.5

2.0

5.0

5.5

5.0

10.0

1.5

1.0

1.5

11.0

12.0

11.0

Note 8: Voltage Range 5.0 is 5.0V ± 0.5V

Capacitance

Symbol

Parameter

Typ

Units

Conditions

C_IN

Input Capacitance

4.5

V_CC= OPEN

V_CC= 5.0V

C_I/O

C_PD

Input/Output Capacitance

Power Dissipation Capacitance

15.0

45.0

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Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body

Package Number M20B

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

Package Number MSA20

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package, (TSSOP) JEDEC

Package Number MTC20

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N20A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

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74AC245 [FAIRCHILD]

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