74AC520SC [FAIRCHILD]
8-Bit Identity Comparator; 8位身份比较器
| 型号： | 74AC520SC |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 8-Bit Identity Comparator |
| 文件： | 总8页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1989
Revised November 1999
74AC520 • 74ACT520
8-Bit Identity Comparator
General Description
Features
■ Compares two 8-bit words in 6.5 ns typ
■ Expandable to any word length
■ 20-pin package
The AC/ACT520 are expandable 8-bit comparators. They
compare two words of up to eight bits each and provide a
LOW output when the two words match bit for bit. The
expansion input IA = B also serves as an active LOW enable
■ Outputs source/sink 24 mA
■ ACT520 has TTL-compatible inputs
input.
Ordering Code:
Order Number Package Number
Package Description
74AC520SC
74AC520PC
74ACT520SC
74ACT520SJ
74ACT520PC
M20B
N20A
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
Word A Inputs
Word B Inputs
A0–A7
B0–B7
TA = B
OA = B
Expansion or Enable Input
Identity Output
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS010194
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Truth Table
Logic Diagram
Inputs
Outputs
OA = B
IA = B
A, B
L
L
A = B (Note 1)
A ≠ Β
L
H
H
H
H
H
A = B (Note 1)
A ≠ Β
H = HIGH Voltage Level
L = LOW Voltage Level
Note 1: *A0 = B0, A1 = B1, A2 = B2, etc.
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Applications
Ripple Expansion
Parallel Expansion
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2
Absolute Maximum Ratings(Note 2)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
−20 mA
+20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI = VCC + 0.5V
ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
)
0V to VCC
V
V
O = −0.5V
−20 mA
+20 mA
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
AC Devices
−40°C to +85°C
O = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
VIN from 30% to 70% of VCC
or Sink Current (IO)
±50 mA
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
ACT Devices
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
±50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
−65°C to +150°C
V
IN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140°C
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
1.5
Guaranteed Limits
Minimum HIGH Level
2.1
2.1
3.15
3.85
0.9
V
OUT = 0.1V
Input Voltage
2.25
2.75
1.5
3.15
3.85
0.9
V
or VCC − 0.1V
VIL
Maximum LOW Level
Input Voltage
V
OUT = 0.1V
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or VCC − 0.1V
VOH
Minimum HIGH Level
Output Voltage
4.4
4.4
IOUT = −50 µA
5.4
5.4
V
IN = VIL or VIH
IOH = −12 mA
OH = −24 mA
IOH = −24 mA (Note 3)
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
V
V
I
VOL
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
0.1
0.1
IOUT = 50 µA
0.1
0.1
V
IN = VIL or VIH
3.0
4.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
0.36
0.36
0.36
±0.1
10.0
−0.6
0.44
0.44
0.44
±1.0
10.0
−1.0
75
IOL = 12 mA
V
IOL = 24 mA
IOL = 24 mA (Note 3)
IIN (Note 5) Maximum Input Leakage Current
µA VI = VCC, GND, A Inputs Only
µA VI = VCC, B Inputs Only
mA VI = VCC, B Inputs Only
IIH
Maximum Input HIGH Leakage Current
Maximum Input LOW Leakage Current
Minimum Dynamic
IIL
−0.3
IOLD
IOHD
ICC
mA
mA
µA
V
V
V
V
OLD = 1.65V Max
OHD = 3.85V Min
IN = VCC
Output Current (Note 4)
−75
40.0
8.0
Maximum Quiescent Supply Current
4.0
4.8
ICC (Note 5) Maximum Quiescent Supply Current
2.3
mA
IN = GND
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC
.
3
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DC Electrical Characteristics for ACT
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
Guaranteed Limits
VIH
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
0.8
4.4
5.4
V
OUT = 0.1V
or VCC − 0.1V
OUT = 0.1V
or VCC − 0.1V
V
V
V
1.5
2.0
0.8
0.8
4.4
5.4
VIL
Maximum LOW Level
Input Voltage
1.5
V
1.5
VOH
Minimum HIGH Level
Output Voltage
4.49
5.49
I
OUT = −50 µA
IN = VIL or VIH
V
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
V
V
V
I
I
OH = −24 mA
OH = −24 mA (Note 6)
VOL
Maximum LOW Level
Output Voltage
0.001
0.001
I
OUT = 50 µA
0.1
0.1
V
IN = VIL or VIH
4.5
5.5
0.36
0.36
0.44
0.44
IOL = 24 mA
IOL = 24 mA (Note 6)
IIN
Maximum Input
5.5
5.5
5.5
5.5
±0.1
10.0
−0.6
±1.0
10.0
−1.0
1.5
µA
µA
VI = VCC, GND
Leakage Current
Maximum Input
IIH
VI = VCC
HIGH Leakage Current
Maximum Input
B Inputs Only
VI = VCC
IIL
−0.3
mA
mA
LOW Leakage Current
Maximum
B Inputs Only
ICCT
0.6
VI = VCC − 2.1V
ICC/Input
IOLD
IOHD
ICC
Minimum Dynamic
Output Current (Note 7)
Maximum Quiescent
Supply Current
5.5
5.5
75
mA
mA
V
V
V
OLD = 1.65V Max
OHD = 3.85V Min
IN = VCC
−75
5.5
5.5
4.0
4.8
40.0
8.0
µA
or GND
ICC
Maximum Quiescent
Supply Current
2.3
mA
VIN = GND
Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
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4
AC Electrical Characteristics for AC
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
(Note 8)
3.3
Units
Min
4.0
2.5
4.5
3.0
3.5
2.5
3.5
2.5
Typ
7.5
5.5
8.0
5.5
5.5
4.5
5.5
4.5
Max
11.5
8.5
Min
tPLH
Propagation Delay
3.0
2.0
3.5
2.5
2.5
2.0
2.5
2.0
13.0
9.5
ns
ns
ns
ns
An or Bn to O A = B
Propagation Delay
5.0
tPHL
tPLH
tPHL
3.3
12.0
9.0
13.5
10.0
9.5
An or Bn to OA = B
5.0
Propagation Delay
IA = B to OA = B
3.3
8.5
5.0
6.5
7.0
Propagation Delay
IA = B to OA = B
3.3
8.5
9.5
5.0
6.5
7.0
Note 8: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
AC Electrical Characteristics for ACT
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
Units
(Note 9)
Min
Typ
Max
Min
tPLH
Propagation Delay
5.0
5.0
5.0
5.0
3.0
5.5
6.0
4.0
5.0
8.5
10.0
6.0
2.5
2.5
2.0
2.0
9.5
11.5
6.5
ns
ns
ns
ns
An or Bn to OA = B
Propagation Delay
An or Bn to OA = B
Propagation Delay
IA = B to OA = B
tPHL
tPLH
tPHL
3.0
2.0
2.5
Propagation Delay
IA = B to OA = B
7.5
8.5
Note 9: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
Parameter
Typ
Units
pF
Conditions
CIN
Input Capacitance
4.5
40
V
V
CC = OPEN
CC = 5.0V
CPD
Power Dissipation Capacitance
pF
5
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
Package Number M20B
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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8
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