74ACT08SCT [FAIRCHILD]
AND Gate, ACT Series, 4-Func, 2-Input, CMOS, PDSO14, SOIC-14;
| 型号： | 74ACT08SCT |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | AND Gate, ACT Series, 4-Func, 2-Input, CMOS, PDSO14, SOIC-14 栅 |
| 文件： | 总10页 (文件大小：300K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 2008
74AC08, 74ACT08
Quad 2-Input AND Gate
Features
General Description
■ I reduced by 50% on 74AC only
The AC08/ACT08 contains four, 2-input AND gates.
CC
■ Outputs source/sink 24mA
Ordering Information
Order
Number
Package
Number
Package Description
74AC08SC
74AC08SJ
74AC08MTC
M14A
M14D
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74AC08PC
N14A
M14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT08SC
74ACT08MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT08PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
Description
A , B
Inputs
Outputs
n
n
O
n
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
I
Supply Voltage
–0.5V to +7.0V
CC
IK
DC Input Diode Current
V = –0.5V
–20mA
+20mA
I
V = V + 0.5
I
CC
V
DC Input Voltage
–0.5V to V + 0.5V
I
CC
I
DC Output Diode Current
OK
V
= –0.5V
–20mA
+20mA
O
V
= V + 0.5V
CC
O
V
DC Output Voltage
DC Output Source or Sink Current
–0.5V to V + 0.5V
O
CC
I
50mA
50mA
O
I
or I
DC V or Ground Current per Output Pin
CC
GND
STG
CC
T
Storage Temperature
Junction Temperature
–65°C to +150°C
140°C
T
J
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
AC
CC
2.0V to 6.0V
4.5V to 5.5V
ACT
V
Input Voltage
Output Voltage
Operating Temperature
0V to V
0V to V
I
CC
CC
V
O
T
–40°C to +85°C
125mV/ns
A
∆V / ∆t
Minimum Input Edge Rate, AC Devices:
from 30% to 70% of V , V @ 3.3V, 4.5V, 5.5V
V
IN
CC CC
∆V / ∆t
Minimum Input Edge Rate, ACT Devices:
from 0.8V to 2.0V, V @ 4.5V, 5.5V
125mV/ns
V
IN
CC
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
2
DC Electrical Characteristics for AC
T = +25°C
T = –40°C to +85°C
A
A
V
CC
Symbol
Parameter
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
Conditions
Typ.
Guaranteed Limits
Units
V
Minimum HIGH Level
Input Voltage
V
V
= 0.1V or
OUT
1.5
2.1
3.15
3.85
0.9
2.1
3.15
3.85
0.9
V
IH
– 0.1V
CC
2.25
2.75
1.5
V
Maximum LOW Level
Input Voltage
V
V
= 0.1V or
V
V
IL
OUT
– 0.1V
CC
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
Minimum HIGH Level
Output Voltage
I
= –50µA
OH
OUT
4.4
4.4
5.4
5.4
V
= V or V ,
2.56
2.46
IN
IL
IH
I
= –12mA
OH
4.5
5.5
V
= V or V ,
3.86
4.86
3.76
4.76
IN
IL
IH
I
= –24mA
OH
V
= V or V ,
IN
IL
IH
(1)
I
I
= –24mA
OH
V
Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
= 50µA
0.002
0.001
0.001
0.1
0.1
0.1
0.1
V
OL
OUT
0.1
0.1
V
= V or V ,
0.36
0.44
IN
IL
IH
I
= 12mA
OL
4.5
5.5
V
= V or V ,
0.36
0.36
0.1
0.44
0.44
1.0
IN
IL
IH
I
= 24mA
OL
V
= V or V ,
IN
IL
IH
(1)
I
= 24mA
OL
(3)
I
Maximum Input
Leakage Current
5.5 V = V , GND
µA
IN
I
CC
I
Minimum Dynamic
Output Current
5.5
5.5
5.5
V
V
V
= 1.65V Max.
= 3.85V Min.
75
mA
mA
µA
OLD
OLD
(2)
I
–75
20.0
OHD
(3)
OHD
I
Maximum Quiescent
Supply Current
= V or GND
2.0
CC
IN
CC
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. Maximum test duration 2.0ms, one output loaded at a time.
3. I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .
CC
IN
CC
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
3
DC Electrical Characteristics for ACT
T = +25°C
T = –40°C to +85°C
A
A
V
CC
Symbol
Parameter
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
Conditions
Typ.
Guaranteed Limits
Units
V
Minimum HIGH Level
Input Voltage
V
V
= 0.1V or
OUT
1.5
1.5
2.0
2.0
0.8
0.8
4.4
5.4
3.86
2.0
2.0
0.8
0.8
4.4
5.4
3.76
V
IH
– 0.1V
CC
V
Maximum LOW Level
Input Voltage
V
V
= 0.1V or
1.5
V
V
IL
OUT
– 0.1V
CC
1.5
V
Minimum HIGH Level
Output Voltage
I
= –50µA
4.49
5.49
OH
OUT
V
= V or V ,
IN
IL
IH
I
= –24mA
OH
5.5
V
= V or V ,
4.86
4.76
IN
IL
IH
(4)
I
I
= –24mA
OH
V
Maximum LOW Level
Output Voltage
4.5
5.5
4.5
= 50µA
0.001
0.001
0.1
0.1
0.1
0.1
V
OL
OUT
V
= V or V ,
0.36
0.44
IN
IL
IH
I
= 24mA
OL
5.5
V
= V or V ,
0.36
0.1
0.44
1.0
IN
IL
IH
(4)
I
= 24mA
OL
I
Maximum Input
Leakage Current
5.5 V = V , GND
µA
IN
I
CC
I
I
Maximum I /Input
5.5 V = V – 2.1V
0.6
1.5
75
mA
mA
mA
µA
CCT
OLD
OHD
CC
I
CC
Minimum Dynamic
5.5
5.5
5.5
V
V
V
= 1.65V Max.
OLD
OHD
(5)
Output Current
I
= 3.85V Min.
–75
40.0
I
Maximum Quiescent
Supply Current
= V or GND
4.0
CC
IN
CC
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
4
AC Electrical Characteristics for AC
T = +25°C,
T = –40°C to +85°C,
A
A
C = 50pF
C = 50pF
L
L
(6)
Symbol
Parameter
V
(V)
Min. Typ. Max.
Min.
Max.
10.0
8.5
Units
CC
t
Propagation Delay
3.3
1.5
1.5
1.5
1.5
7.5
5.5
7.0
5.5
9.5
7.5
8.5
7.0
1.0
1.0
1.0
1.0
ns
PLH
5.0
3.3
5.0
t
Propagation Delay
9.0
ns
PHL
7.5
Note:
6. Voltage range 3.3 is 3.3V 0.3V. Voltage range 5.0 is 5.0V 0.5V.
AC Electrical Characteristics for ACT
T = +25°C,
T = –40°C to +85°C,
A
A
C = 50pF
C = 50pF
L
L
(7)
Symbol
Parameter
Propagation Delay
Propagation Delay
V
(V)
Min.
1.0
Typ. Max.
Min.
Max.
10.0
10.0
Units
ns
CC
t
t
5.0
5.0
6.5
6.5
9.0
9.0
1.0
1.0
PLH
PHL
1.0
ns
Note:
7. Voltage range 5.0 is 5.0V 0.5V.
Capacitance
Symbol
Parameter
Conditions
Typ.
Units
pF
C
Input Capacitance
Power Dissipation Capacitance
V
V
= OPEN
4.5
IN
CC
C
= 5.0V
20.0
pF
PD
CC
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
5
Physical Dimensions
8.75
8.50
0.65
A
7.62
14
8
B
5.60
4.00
3.80
6.00
1.70
1.27
1
7
PIN ONE
INDICATOR
0.51
0.35
1.27
(0.33)
LAND PATTERN RECOMMENDATION
M
0.25
C B A
1.75 MAX
SEE DETAIL A
1.50
1.25
0.25
0.19
0.25
0.10
C
0.10
C
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
0.50
0.25
X 45°
R0.10
R0.10
GAGE PLANE
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE: 20:1
Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
6
Physical Dimensions (Continued)
Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
7
Physical Dimensions (Continued)
0.43 TYP
0.65
1.65
6.10
0.45
12.00°
TOP & BOTTOM
R0.09 min
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS
R0.09min
1.00
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 1982
E. LANDPATTERN STANDARD: SOP65P640X110-14M
F. DRAWING FILE NAME: MTC14REV6
Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
8
Physical Dimensions (Continued)
19.56
18.80
14
8
6.60
6.09
1
7
(1.74)
1.77
8.12
7.62
1.14
0.35
0.20
3.56
3.30
5.33 MAX
0.38 MIN
3.81
3.17
0.58
0.35
8.82
2.54
NOTES: UNLESS OTHERWISE SPECIFIED
THIS PACKAGE CONFORMS TO
A)
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
C)
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5-1994
E) DRAWING FILE NAME: MKT-N14AREV7
Figure 4. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
9
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
ACEx®
PDP-SPM™
SyncFET™
®
FPS™
Power220®
Build it Now™
CorePLUS™
CROSSVOLT™
CTL™
Current Transfer Logic™
EcoSPARK®
EZSWITCH™ *
™
FRFET®
Power247®
Global Power ResourceSM
Green FPS™
Green FPS™ e-Series™
GTO™
i-Lo™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
The Power Franchise®
POWEREDGE®
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™
UHC®
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
MicroPak™
MillerDrive™
Motion-SPM™
OPTOLOGIC®
Ultra FRFET™
UniFET™
VCX™
FAST®
OPTOPLANAR®
FastvCore™
®
FlashWriter® *
* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Advance Information
Formative or In Design
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
the design.
No Identification Needed
Obsolete
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I32
©1988 Fairchild Semiconductor Corporation
74AC08, 74ACT08 Rev. 1.5.1
www.fairchildsemi.com
10
相关型号：
74ACT08SCXR
AND Gate, ACT Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, MS-012, SOIC-14
FAIRCHILD
74ACT08SC_NL
AND Gate, ACT Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, MS-012, SOIC-14
FAIRCHILD
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