74ACT10SCX [FAIRCHILD]
Triple 3-input NAND Gate ; 三路3输入与非门\n
| 型号： | 74ACT10SCX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Triple 3-input NAND Gate
|
| 文件： | 总7页 (文件大小：88K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1988
Revised January 2000
74AC10 • 74ACT10
Triple 3-Input NAND Gate
General Description
The AC/ACT10 contains three, 3-input NAND gates.
Features
■ ICC reduced by 50% on 74AC only
■ Outputs source/sink 24 mA
Ordering Code:
Order Number Package Number
Package Description
74AC10SC
74AC10SJ
M14A
M14D
MTC14
N14A
M14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC10MTC
74AC10PC
74ACT10SC
74ACT10PC
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn, Cn
On
Description
Inputs
Outputs
© 2000 Fairchild Semiconductor Corporation
DS009915
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
−20 mA
+20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI = VCC + 0.5V
ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
)
0V to VCC
V
V
O = −0.5V
−20 mA
+20 mA
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
AC Devices
−40°C to +85°C
O = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
ACT Devices
or Sink Current (IO)
± 50 mA
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
± 50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
−65°C to +150°C
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140°C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of circuits outside databook specifications.
DC Electrical Characteristics for AC
V
T = −40°C to +85°C
A
T
Typ
1.5
= +25°C
CC
A
Symbol
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.1
2.1
3.15
3.85
0.9
V
= 0.1V
IH
OUT
2.25
2.75
1.5
3.15
3.85
0.9
V
or V − 0.1V
CC
Maximum LOW Level
Input Voltage
V
= 0.1V
IL
OUT
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or V − 0.1V
CC
Minimum HIGH Level
Output Voltage
OH
4.4
4.4
I
= −50 µA
OUT
5.4
5.4
V
= V or V
IL IH
IN
OH
OH
OH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
= −12 mA
V
V
= −24 mA
= −24 mA (Note 2)
V
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
OL
0.1
0.1
I
= 50 µA
OUT
0.1
0.1
V
= V or V
IN
OL
OL
OL
IL
IH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
I
I
I
= 12 mA
= 24 mA
V
= 24 mA (Note 2)
I
Maximum Input
V = V
I CC
IN
5.5
±0.1
±1.0
µA
(Note 4)
Leakage Current
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
or GND
I
I
I
5.5
5.5
75
mA
mA
V
V
V
= 1.65V Max
= 3.85V Min
OLD
OHD
CC
OLD
OHD
IN
−75
= V
CC
5.5
2.0
20.0
µA
(Note 4)
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .
CC
IN
CC
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2
DC Electrical Characteristics for ACT
V
T = −40°C to +85°C
A
T
Typ
1.5
1.5
1.5
1.5
= +25°C
CC
A
Symbol
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
0.8
4.4
5.4
V
= 0.1V
IH
OUT
V
V
V
2.0
0.8
0.8
4.4
5.4
or V − 0.1V
CC
Maximum LOW Level
Input Voltage
V
= 0.1V
IL
OUT
or V − 0.1V
CC
Minimum HIGH Level
Output Voltage
4.49
5.49
OH
I
= −50 µA
OUT
V
= V or V
IN
OH
OH
IL
IH
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
V
V
V
I
I
= −24 mA
= −24 mA (Note 5)
V
Maximum LOW Level
Output Voltage
0.001
0.001
OL
I
= 50 µA
OUT
0.1
0.1
V
= V or V
IN
OL
OL
IL
IH
4.5
5.5
0.36
0.36
0.44
0.44
I
I
= 24 mA
= 24 mA (Note 5)
I
I
Maximum Input
Leakage Current
Maximum
IN
5.5
5.5
±0.1
±1.0
µA
V = V , GND
I CC
CCT
0.6
1.5
mA
V = V − 2.1V
I
CC
I
/Input
CC
I
I
I
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5
5.5
75
mA
mA
V
V
V
= 1.65V Max
= 3.85V Min
OLD
OHD
CC
OLD
−75
OHD
= V
IN
CC
5.5
4.0
40.0
µA
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
V
T
= +25°C
= 50 pF
T = −40°C to +85°C
A
CC
A
Symbol
Parameter
Units
C
C = 50 pF
L
(V)
(Note 7)
3.3
L
Min
Typ
6.0
4.5
5.5
4.0
Max
9.5
7.0
8.5
6.0
Min
Max
t
t
Propagation Delay
1.5
1.5
1.5
1.5
1.0
1.0
1.0
1.0
10.5
8.0
PLH
ns
ns
5.0
Propagation Delay
3.3
10.0
6.5
PHL
5.0
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
AC Electrical Characteristics for ACT
V
T = −40°C to +85°C
A
T
= +25°C
= 50 pF
CC
A
Symbol
Parameter
Units
C
C = 50 pF
L
(V)
(Note 8)
5.0
L
Min
1.0
1.0
Typ
6.5
6.5
Max
9.0
Min
Max
t
Propagation Delay
Propagation Delay
1.0
1.0
10.0
9.5
ns
ns
PLH
t
5.0
9.0
PHL
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
Parameter
Typ
4.5
Units
Conditions
C
C
Input Capacitance
pF
pF
V
V
= OPEN
= 5.0V
IN
CC
Power Dissipation Capacitance
25.0
PD
CC
3
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
Package Number M14A
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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相关型号：
74ACT10SCX_NL
NAND Gate, ACT Series, 3-Func, 3-Input, CMOS, PDSO14, 0.150 INCH, MS-012, SOIC-14
FAIRCHILD
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