74F125 [FAIRCHILD]
Quad Buffer (3-STATE); 四缓冲器(三态)型号: | 74F125 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Quad Buffer (3-STATE) |
文件: | 总4页 (文件大小:52K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
April 1988
Revised July 1999
74F125
Quad Buffer (3-STATE)
Features
■ High impedance base inputs for reduced loading
Ordering Code:
Order Number Package Number
Package Description
74F125SC
74F125SJ
74F125PC
M14A
M14D
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
Input IIH/IIL
U.L.
Pin Names
Description
Output IOH/IOL
HIGH/LOW
1.0/0.033
An, Bn
On
Inputs
20 µA/−20 µA
Outputs
600/106.6 (80) −12 mA/64 mA (48 mA)
Function Table
Inputs
An
Output
Bn
O
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
© 1999 Fairchild Semiconductor Corporation
DS009475
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Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to +7.0V
−30 mA to +5.0 mA
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
DC Electrical Characteristics
VCC
Symbol
VIH
Parameter
Input HIGH Voltage
Min
Typ
Max
Units
Conditions
2.0
V
V
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
VIL
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
0.8
VCD
VOH
−1.2
Min
Min
I
I
I
I
I
IN = −18 mA
OH = −3 mA
OH = −12 mA
OH = −3 mA
OH = −15 mA
10% VCC
10% VCC
5% VCC
5% VCC
10% VCC
2.4
2.0
2.7
2.0
Voltage
V
VOL
Output LOW
0.55
20
V
Min
Max
0.0V
I
OL = 64 mA
Voltage
IIH
Input HIGH Current
Input HIGH Current
Breakdown Test
µA
µA
V
V
IN = 2.7V
IN = 7.0V
IBVI
100
IIL
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Buss Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
−20.0
50
µA
µA
Max
Max
Max
Max
Max
0.0V
Max
Max
Max
V
V
V
V
V
V
V
V
V
IN = 0.5V
IOZH
IOZL
IOS
OUT = 2.7V
OUT = 0.5V
OUT = 0V
−50
µA
−100
−225
250
mA
µA
ICEX
IZZ
OUT = VCC
OUT = 5.25V
O = HIGH
O = LOW
500
µA
ICCH
ICCL
ICCZ
18.5
31.7
27.6
24.0
40.0
35.0
mA
mA
mA
O = HIGH Z
AC Electrical Characteristics
T
A = +25°C
TA = 0°C to +70°C
VCC = +5.0V
VCC = +5.0V
Symbol
Parameter
Units
CL = 50 pF
CL = 50 pF
Min
2.0
3.0
3.5
3.5
1.5
1.5
Typ
4.0
4.6
4.7
5.3
3.9
4.0
Max
Min Max
tPLH
Propagation Delay
Output Enable Time
Output Disable Time
6.0
7.5
7.5
8.0
5.5
6.0
2.0
3.0
3.0
3.5
1.5
1.5
6.5
8.0
8.5
9.0
6.0
6.5
ns
ns
ns
tPHL
tPZH
tPZL
tPHZ
tPLZ
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2
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
3
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
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4
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