74F823SC [FAIRCHILD]
9-Bit D-Type Flip-Flop; 9位D型触发器
| 型号： | 74F823SC |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 9-Bit D-Type Flip-Flop |
| 文件： | 总6页 (文件大小：55K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 1988
Revised August 1999
74F823
9-Bit D-Type Flip-Flop
General Description
The 74F823 is a 9-bit buffered register. It features Clock
Enable and Clear which are ideal for parity bus interfacing
in high performance microprogramming systems.
Features
■ 3-STATE outputs
■ Clock Enable and Clear
Ordering Code:
Order Number Package Number
Package Description
74F823SC
M24B
N24C
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
74F823SPC
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation
DS009596
www.fairchildsemi.com
Unit Loading/Fan Out
Input IIH/IIL
U.L.
Pin Names
Description
Data Inputs
Output IOH/IOL
HIGH/LOW
1.0/1.0
D0–D8
OE
20 µA/−0.6 mA
20 µA/−0.6 mA
20 µA/−0.6 mA
Output Enable Input
Clear
1.0/1.0
1.0/1.0
CLR
CP
Clock Input
1.0/2.0
1.0/1.0
20 µA/−1.2 mA
20 µA/−0.6 mA
Clock Enable
EN
O0–O8
3-STATE Outputs
150/40 (33.3)
−3 mA/24 mA (20 mA)
Functional Description
Function Table
The 74F823 device consists of nine D-type edge-triggered
flip-flops. It has 3-STATE true outputs and is organized in
broadside pinning. The buffered Clock (CP) and buffered
Output Enable (OE) are common to all flip-flops. The flip-
flops will store the state of their individual D inputs that
meet the setup and hold times requirements on the LOW-
to-HIGH CP transition. With the OE LOW the contents of
the flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops. In addition to the Clock and Output Enable pins, the
74F823 has Clear (CLR) and Clock Enable (EN) pins.
Inputs
Internal Output
Function
OE CLR EN CP D
Q
NC
NC
NC
NC
H
O
Z
H
H
H
L
H
H
H
H
L
L
L
H
H
X
X
L
L
L
L
L
L
H
L
X
X
X
X
X
X
H
H
L
Hold
Hold
Hold
Hold
Z
X
X
X
X
Z
NC
Z
H
L
Clear
L
H
L
Clear
H
H
L
H
H
H
H
H
H
H
Z
Load
When the CLR is LOW and the OE is LOW, the outputs are
LOW. When CLR is HIGH, data can be entered into the flip-
flops. When EN is LOW, data on the inputs is transferred to
the outputs on the LOW-to-HIGH clock transition. When
the EN is HIGH, the outputs do not change state regard-
less of the data or clock inputs transitions. This device is
ideal for parity bus interfacing in high performance sys-
tems.
L
Z
Load
H
L
Data Available
Data Available
No Change in Data
No Change in Data
L
H
X
X
L
H
L
H
L
NC
NC
NC
NC
L
L = LOW Voltage Level
H = HIGH Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
NC = No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
DC Electrical Characteristics
V
Symbol
Parameter
Input HIGH Voltage
Min
Typ
Max
Units
Conditions
CC
V
V
V
V
2.0
V
V
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
IH
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
0.8
IL
−1.2
Min
Min
I
I
I
I
I
= −18 mA
CD
OH
IN
10% V
10% V
5% V
2.5
2.4
2.7
2.7
= −1 mA
= −3 mA
= −1 mA
= −3 mA
CC
CC
CC
CC
OH
OH
OH
OH
Voltage
V
5% V
V
Output LOW
Voltage
OL
10% V
0.5
5.0
7.0
50
V
Min
Max
Max
Max
0.0
I
= 24 mA
= 2.7V
= 7.0V
CC
OL
I
Input HIGH
IH
µA
µA
µA
V
V
V
V
IN
Current
I
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
BVI
IN
I
CEX
= V
OUT
CC
V
I
= 1.9 µA
ID
ID
4.75
All Other Pins Grounded
V = 150 mV
IOD
I
Output Leakage
Circuit Current
OD
3.75
µA
0.0
All Other Pins Grounded
I
Input LOW
−0.6
mA
Max
V
V
V
V
V
V
V
= 0.5V (OE, CLR, EN)
= 0.5V (CP)
IL
IN
Current
−1.2
50
mA
µA
µA
mA
µA
mA
Max
Max
Max
Max
0.0V
Max
IN
I
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Buss Drainage Test
Power Supply Current
= 2.7V
= 0.5V
= 0V
OZH
OUT
OUT
OUT
OUT
I
−50
−150
500
100
OZL
I
−60
OS
I
= 5.25V
ZZ
I
75
= HIGH Z
O
CCZ
3
www.fairchildsemi.com
AC Electrical Characteristics
T
= +25°C
T
= −55°V to +125°C
T = 0°C to +70°C
A
A
A
V
= +5.0V
= 50 pF
V
= +5.0V
= 50 pF
V
= +5.0V
C = 50 pF
L
CC
CC
CC
Symbol
Parameter
Units
C
C
L
L
Min
100
2.0
Typ
160
5.6
Max
Min
60
Max
Min
70
Max
f
Maximum Clock Frequency
Propagation Delay
MHz
ns
MAX
t
9.5
9.5
2.0
2.0
10.5
10.5
2.0
2.0
10.5
10.5
PLH
t
CP to O
2.0
5.2
PHL
n
t
Propagation Delay
CLR to O
PHL
4.0
7.1
12.0
4.0
13.0
4.0
13.0
ns
ns
n
t
Output Enable Time
2.0
2.0
5.8
5.5
10.5
10.5
2.0
2.0
13.0
13.0
2.0
2.0
11.5
11.5
PZH
t
OE to O
n
PZL
t
Output Disable Time
1.5
1.5
2.9
2.7
7.0
7.0
1.0
1.0
7.5
7.5
1.5
1.5
7.5
7.5
PHZ
t
OE to O
n
PLZ
AC Operating Requirements
T
= +25°C
T
= −55°V to +125°C
T = 0°C to +70°C
A
A
A
Symbol
Parameter
V
= +5.0V
V
= +5.0V
V = +5.0V
CC
Units
CC
CC
Min
2.5
2.5
2.5
2.5
4.5
2.5
2.0
0
Max
Min
4.0
4.0
2.5
2.5
5.0
3.0
3.0
1.0
6.0
6.0
Max
Min
3.0
3.0
2.5
2.5
5.0
3.0
2.0
0
Max
t (H)
Setup Time, HIGH or LOW
to CP
S
t (L)
D
n
S
ns
t
t
(H)
(L)
Hold Time, HIGH or LOW
to CP
H
H
D
n
t (H)
Setup Time, HIGH or LOW
EN to CP
S
t (L)
S
ns
ns
t
t
t
t
(H)
(L)
Hold Time, HIGH or LOW
EN to CP
H
H
(H)
(L)
CP Pulse Width
HIGH or LOW
5.0
5.0
6.0
6.0
W
W
t
t
(L)
5.0
5.0
5.0
5.0
5.0
5.0
ns
ns
W
CLR Pulse Width, LOW
CLR Recovery Time
REC
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Package Number N24C
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
6
相关型号：
74F823SCQR
Bus Driver, F/FAST Series, 1-Func, 9-Bit, True Output, TTL, PDSO24, 0.150 INCH, SOIC-24
FAIRCHILD
74F823SC_NL
Bus Driver, F/FAST Series, 1-Func, 9-Bit, True Output, TTL, PDSO24, 0.300 INCH, LEAD FREE, MS-013, SOIC-24
FAIRCHILD
74F823SDC
Bus Driver, F/FAST Series, 1-Func, 9-Bit, True Output, TTL, CDIP24, 0.300 INCH, SLIM, CERAMIC, DIP-24
FAIRCHILD
74F823SDCQR
Bus Driver, F/FAST Series, 1-Func, 9-Bit, True Output, TTL, CDIP24, 0.300 INCH, SLIM, CERAMIC, DIP-24
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明