74LCX00MTCX [FAIRCHILD]
Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs; 低电压四2输入与非门与5V容限输入型号: | 74LCX00MTCX |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs |
文件: | 总7页 (文件大小:85K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
March 1995
Revised March 1999
74LCX00
Low Voltage Quad 2-Input NAND Gate with 5V Tolerant
Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
Features
■ 5V tolerant inputs
■ 2.3V–3.6V VCC specifications provided
■ 5.2 ns tPD max (VCC = 3.3V), 10 µA ICC max
The 74LCX00 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
■ Power down high impedance inputs and outputs
■ ±24 mA output drive (VCC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number Package Number
Package Description
74LCX00M
M14A
M14D
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX00SJ
74LCX00MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
© 1999 Fairchild Semiconductor Corporation
DS012408.prf
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Absolute Maximum Ratings(Note 1)
Symbol
Parameter
Supply Voltage
Value
Conditions
Units
VCC
VI
−0.5 to +7.0
−0.5 to +7.0
V
V
DC Input Voltage
VO
IIK
DC Output Voltage
−0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 2)
V
DC Input Diode Current
DC Output Diode Current
−50
−50
VI < GND
mA
IOK
V
V
O < GND
O > VCC
mA
+50
IO
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
±50
mA
mA
mA
°C
ICC
±100
IGND
TSTG
±100
−65 to +150
Recommended Operating Conditions (Note 3)
Symbol
Parameter
Min
Max
Units
VCC
Supply Voltage
Operating
Data Retention
2.0
1.5
0
3.6
3.6
5.5
VCC
±24
±12
±8
V
VI
Input Voltage
Output Voltage
Output Current
V
V
VO
HIGH or LOW State
CC = 3.0V − 3.6V
CC = 2.7V - 3.0V
CC = 2.3V - 2.7V
0
IOH/IOL
V
V
mA
V
TA
Free-Air Operating Temperature
−40
85
°C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0
10
ns/V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 2: I Absolute Maximum Rating must be observed.
O
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
V
T = −40°C to +85°C
A
CC
Symbol
Parameter
Conditions
Units
(V)
2.3 − 2.7
2.7 − 3.6
2.3 − 2.7
2.7 − 3.6
2.3 − 3.6
2.3
Min
1.7
2.0
Max
V
V
V
HIGH Level Input Voltage
IH
V
V
LOW Level Input Voltage
HIGH Level Output Voltage
0.7
0.8
IL
I
I
I
I
I
I
I
I
I
I
= −100 µA
V
− 0.2
OH
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
CC
= −8 mA
= −12 mA
= −18 mA
= −24 mA
= 100 µA
= 8mA
1.8
2.2
2.4
2.2
2.7
V
V
3.0
3.0
V
LOW Level Output Voltage
2.3 − 3.6
2.3
0.2
0.6
0.4
0.4
0.55
±5.0
10
OL
= 12 mA
= 16 mA
= 24 mA
2.7
3.0
3.0
I
I
I
Input Leakage Current
0 ≤ V ≤ 5.5V
2.3 − 3.6
0
µA
µA
I
I
Power-Off Leakage Current
Quiescent Supply Current
V or V = 5.5V
I O
OFF
CC
V = V or GND
2.3 − 3.6
2.3 − 3.6
2.3 − 3.6
10
I
CC
µA
µA
3.6V ≤ V ≤ 5.5V
±10
500
I
∆I
Increase in I per Input
V
= V −0.6V
CC
CC
IH CC
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2
AC Electrical Characteristics
T
= −40°C to +85°CF, R = 500Ω
L
A
V
= 3.3V ± 0.3V
V
= 2.7V
= 50pF
V
= 2.5V ± 0.2V
CC
CC
CC
Symbol
Parameter
Units
C
= 50pF
C
C = 30pF
L
L
L
Min
1.5
1.5
Max
Min
Max
Min
1.5
1.5
Max
t
t
t
t
Propagation Delay
5.2
5.2
1.0
1.0
1.5
1.5
6.0
6.0
6.2
6.2
PHL
ns
ns
PLH
Output to Output Skew (Note 4)
OSHL
OSLH
Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Dynamic Switching Characteristics
T
= 25°C
V
(V)
A
CC
Symbol
Parameter
Conditions
= 50 pF, V = 3.3V, V = 0V
Unit
V
Typical
0.8
V
V
Quiet Output Dynamic Peak V
C
C
C
C
3.3
2.5
3.3
2.5
OLP
OL
L
L
L
L
IH
IL
= 30 pF, V = 2.5V, V = 0V
0.6
IH
IL
Quiet Output Dynamic Valley V
= 50 pF, V = 3.3V, V = 0V
−0.8
−0.6
OLV
OL
IH
IL
V
= 30 pF, V = 2.5V, V = 0V
IH
IL
Capacitance
Symbol
Parameter
Conditions
= Open, V = 0V or V
Typical
Units
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
V
V
V
7
8
pF
pF
pF
IN
CC
CC
CC
I
CC
C
C
= 3.3V, V = 0V or V
I CC
OUT
PD
= 3.3V, V = 0V or V , f = 10 MHz
25
I
CC
3
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AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
PLH, tPHL
tPZL, tPLZ
Switch
Open
t
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH,tPHZ
GND
3-STATE Output High Enable and
Waveform for Inverting and Non-Inverting Functions
Disable Times for Logic
Setup Time, Hold Time and Recovery Time for Logic
Propagation Delay. Pulse Width and trec Waveforms
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
VCC
Symbol
3.3V ± 0.3V
1.5V
2.7V
1.5V
1.5V
2.5V ± 0.2V
VCC/2
Vmi
Vmo
Vx
1.5V
VCC/2
V
V
OL + 0.3V
OH − 0.3V
V
V
OL + 0.3V
V
V
OL + 0.15V
OH − 0.15V
Vy
OH − 0.3V
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4
Schematic Diagram Generic for LCX Family
5
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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