74LVQ14 [FAIRCHILD]

Low Voltage Hex Inverter with Schmitt Trigger Input; 低压六反相器带施密特触发器输入
74LVQ14
型号: 74LVQ14
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Low Voltage Hex Inverter with Schmitt Trigger Input
低压六反相器带施密特触发器输入

触发器
文件: 总6页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
May 1998  
74LVQ14  
Low Voltage Hex Inverter with Schmitt Trigger Input  
General Description  
Features  
n Ideal for low power/low noise 3.3V applications  
The LVQ14 contains six inverter gates each with a Schmitt  
trigger input. They are capable of transforming slowly chang-  
ing input signals into sharply defined, jitter-free output sig-  
nals. In addition, they have a greater noise margin than con-  
ventional inverters.  
n Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
n Guaranteed pin-to-pin skew AC performance  
n Guaranteed incident wave switching into 75  
The LVQ14 has hysteresis between the positive-going and  
negative-going input thresholds (typically 1.0V) which is de-  
termined internally by transistor ratios and is essentially in-  
sensitive to temperature and supply voltage variations.  
Ordering Code:  
Order Number  
74LVQ14SC  
74LVQ14SJ  
Package Number  
M14A  
Package Description  
14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC  
14-Lead Small Outline Package, SOIC EIAJ  
M14D  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Assignment  
for SOIC JEDEC and EIAJ  
DS011345-2  
DS011345-1  
Truth Table  
Pin Descriptions  
Input  
Output  
I
O
H
L
Pin Names  
Description  
L
H
In  
Inputs  
On  
Outputs  
=
=
H
L
High Voltage Level  
Low Voltage Level  
© 1998 Fairchild Semiconductor Corporation  
DS011345  
www.fairchildsemi.com  
Absolute Maximum Ratings (Note 1)  
Recommended Operating  
Conditions (Note 2)  
Supply Voltage (VCC  
)
−0.5V to +7.0V  
DC Input Diode Current (IIK  
)
Supply Voltage (VCC  
)
=
VI −0.5V  
−20 mA  
+20 mA  
LVQ  
2.0V to 3.6V  
0V to VCC  
=
VI VCC + 0.5V  
Input Voltage (VI)  
Output Voltage (VO)  
DC Input Voltage (VI)  
−0.5V to VCC + 0.5V  
0V to VCC  
DC Output Diode Current (IOK  
)
Operating Temperature (TA)  
Minimum Input Edge Rate (V/t)  
VIN from 0.8V to 2.0V  
−40˚C to +85˚C  
=
VO −0.5V  
−20 mA  
+20 mA  
=
VO VCC + 0.5V  
DC Output Voltage (VO)  
DC Output Source  
−0.5V to to VCC + 0.5V  
@
VCC 3.0V  
125 mV/ns  
Note 1: The “Absolute Maximum Ratings” are those values beyond which  
the safety of the device cannot be guaranteed. The device should not be op-  
erated at these limits. The parametric values defined in the Electrical Charac-  
teristics tables are not guaranteed at the absolute maximum ratings. The  
“Recommended Operating Conditions” table will define the conditions for ac-  
tual device operation.  
±
50 mA  
or Sink Current (IO  
DC VCC or Ground Current  
(ICC or IGND  
)
±
)
200 mA  
Storage Temperature (TSTG  
DC Latch-Up Source or  
Sink Current  
)
−65˚C to +150˚C  
Note 2: Unused inputs must be held HIGH or LOW. They may not float.  
±
100 mA  
DC Electrical Characteristics  
VCC  
=
=
Symbol  
Parameter  
TA +25˚C  
TA −40˚C to +85˚C  
Units  
Conditions  
(V)  
Typ  
Guaranteed Limits  
=
IOUT −50 µA  
VOH  
Minimum High Level  
Output Voltage  
3.0  
3.0  
2.99  
2.9  
2.9  
V
V
=
VIN VIL or VIH (Note 3)  
2.58  
2.48  
=
IOH −12 mA  
=
IOUT 50 µA  
VOL  
Maximum Low Level  
Output Voltage  
3.0  
3.0  
0.002  
0.1  
0.1  
V
V
=
VIN VIL or VIH (Note 3)  
0.36  
0.44  
=
IOL 12 mA  
=
±
±
IIN  
Maximum Input  
Leakage Current  
3.6  
3.0  
3.0  
0.1  
1.0  
µA  
V
VI VCC, GND  
=
TA Worst Case  
Vt+  
Vt−  
Maximum Positive  
Threshold  
2.2  
2.2  
=
TA Worst Case  
Minimum Negative  
Threshold  
0.5  
0.5  
V
=
TA Worst Case  
Vh(max)  
Vh(min)  
IOLD  
Maximum Hysteresis  
Minimum Hysteresis  
3.0  
3.0  
3.6  
3.6  
3.6  
1.2  
0.3  
1.2  
0.3  
V
=
TA Worst Case  
V
=
VOLD 0.8V Max (Note 5)  
Minimum Dynamic (Note 4)  
Output Current  
36  
mA  
mA  
µA  
=
VOHD 2.0V Min (Note 5)  
IOHD  
−25  
20.0  
=
ICC  
Maximum Quiescent  
Supply Current  
2.0  
1.1  
VIN VCC or GND  
VOLP  
VOLV  
VIHD  
VILD  
Quiet Output  
Maximum Dynamic VOL  
3.3  
3.3  
3.3  
3.3  
0.9  
−0.8  
1.9  
V
V
V
V
(Notes 6, 7)  
(Notes 6, 7)  
(Notes 6, 8)  
(Notes 6, 8)  
Quiet Output  
Minimum Dynamic VOL  
−1.1  
2.0  
Maximum High Level  
Dynamic Input Voltage  
Maximum Low Level  
Dynamic Input Voltage  
1.3  
2.0  
Note 3: All outputs loaded; thresholds on input associated with output under test.  
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.  
Note 5: Incident wave switching on transmission lines with impedances as low as 75for commercial temperature range is guaranteed for 74LVQ.  
Note 6: Worst case package.  
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.  
Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V ), 0V to threshold (V ),  
ILD IHD  
=
f
1 MHz.  
www.fairchildsemi.com  
2
AC Electrical Characteristics  
=
=
TA −40˚C to +85˚C  
VCC  
(V)  
TA +25˚C  
Symbol  
Parameter  
Units  
=
=
CL 50 pF  
CL 50 pF  
Min  
1.5  
1.5  
1.5  
1.5  
Typ  
11.4  
9.5  
Max  
19.0  
13.5  
16.2  
11.5  
1.5  
Min  
1.5  
1.5  
1.5  
1.5  
Max  
21.0  
15.0  
19.0  
13.0  
1.5  
tPLH  
Propagation Delay  
Propagation Delay  
2.7  
ns  
ns  
ns  
±
3.3 0.3  
tPHL  
2.7  
9.0  
±
3.3 0.3  
7.5  
tOSHL,  
tOSLH  
Output to Output  
Skew (Note 9)  
Data to Output  
2.7  
1.0  
±
3.3 0.3  
1.0  
1.5  
1.5  
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-  
fication applies to any outputs switching in the same direction, either HIGH to LOW (t  
) or LOW to HIGH (t  
). Parameter guaranteed by design.  
OSHL  
OSLH  
Capacitance  
Symbol  
Parameter  
Input Capacitance  
Typ  
4.5  
20  
Units  
Conditions  
=
VCC Open  
CIN  
CPD (Note 10)  
pF  
pF  
=
VCC 3.3V  
Power Dissipation  
Capacitance  
Note 10:  
C
PD  
is measured at 10 MHz.  
3
www.fairchildsemi.com  
4
Physical Dimensions inches (millimeters) unless otherwise noted  
14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC  
Package Number M14A  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
14-Lead Small Outline Package, SOIC EIAJ  
Package Number M14D  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-  
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-  
CONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or sys-  
tems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, and (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
Fairchild Semiconductor  
Corporation  
Fairchild Semiconductor  
Europe  
Fairchild Semiconductor  
Hong Kong Ltd.  
Fairchild Semiconductor  
Japan Ltd.  
Americas  
Fax: +49 (0) 1 80-530 85 86  
Email: europe.support@nsc.com  
Deutsch Tel: +49 (0) 8 141-35-0  
8/F Room 808 Empire Centre  
68 Mody Road, Tsimshatsui East  
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4F, Natsume BI,  
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Tel: +39 (0) 2 57 5631  
www.fairchildsemi.com  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.  

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