74LVX125M_NL [FAIRCHILD]
Bus Driver, LV/LV-A/LVX/H Series, 4-Func, 1-Bit, True Output, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012AB, SOIC-14;
| 型号： | 74LVX125M_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Bus Driver, LV/LV-A/LVX/H Series, 4-Func, 1-Bit, True Output, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012AB, SOIC-14 光电二极管 |
| 文件： | 总8页 (文件大小：304K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2008
74LVX125
Low Voltage Quad Buffer with 3-STATE Outputs
Features
General Description
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
The LVX125 contains four independent non-inverting
buffers with 3-STATE outputs. The inputs tolerate volt-
ages up to 7V allowing the interface of 5V systems to 3V
systems.
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Information
Order
Number
Package
Number
Package Description
74LVX125M
M14A
M14D
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX125SJ
74LVX125MTC
MTC14
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Truth Table
Pin Names
Description
Inputs
Output
A
Inputs
n
OE
L
A
O
n
n
n
OE
Output Enable Inputs
Outputs
L
L
H
Z
n
O
L
H
X
n
H
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
I
Supply Voltage
–0.5V to +7.0V
CC
IK
DC Input Diode Current, V = –0.5V
–20mA
I
V
DC Input Voltage
–0.5V to 7V
I
I
DC Output Diode Current
OK
V
= –0.5V
–20mA
+20mA
O
V
= V + 0.5V
CC
O
V
DC Output Voltage
–0.5V to V + 0.5V
O
CC
I
DC Output Source or Sink Current
25mA
50mA
O
I
or I
DC V or Ground Current
CC
GND
CC
T
Storage Temperature
Power Dissipation
–65°C to +150°C
180mW
STG
P
(1)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to 3.6V
0V to 5.5V
0V to V
CC
V
Input Voltage
I
V
Output Voltage
O
CC
T
Operating Temperature
Input Rise and Fall Time
–40°C to +85°C
0ns/V to 100ns/V
A
∆t / ∆V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
2
DC Electrical Characteristics
T = –40°C to
A
T = +25°C
+85°C
A
Symbol
Parameter
V
Conditions
Min. Typ. Max. Min.
Max. Units
CC
V
HIGH Level Input
Voltage
2.0
3.0
3.6
2.0
3.0
3.6
2.0
1.5
2.0
2.4
1.5
2.0
2.4
V
IH
V
LOW Level Input
Voltage
0.5
0.8
0.8
0.5
0.8
0.8
V
V
IL
V
HIGH Level Output
Voltage
V
= V or V ,
= –50µA
1.9
2.9
2.0
3.0
1.9
2.9
OH
IN
IL
IH
I
OH
3.0
V
= V or V ,
IN
IL
IH
I
= –50µA
OH
V
= V or V ,
2.58
2.48
IN
IL
IH
I
= –4mA
OH
V
LOW Level Output
Voltage
2.0
3.0
V
= V or V ,
= 50µA
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
IL
IH
I
OL
V
= V or V ,
IN
IL
IH
I
= 50µA
OL
V
= V or V ,
= 4mA
0.36
0.25
0.1
0.44
2.5
IN
IL
IH
I
OL
I
3-STATE Output
Off-State Current
3.6
3.6
3.6
V
V
= V or V ,
µA
µA
µA
OZ
IN
IL
IH
= V or GND
OUT
CC
I
Input Leakage
Current
1.0
V
V
= 5.5V or GND
IN
IN
IN
I
Quiescent Supply
Current
= V or GND
4.0
40.0
CC
CC
(2)
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
C (pF)
Typ.
Limit
Units
CC
L
V
Quiet Output Maximum Dynamic V
3.3
50
50
50
50
0.3
0.8
–0.8
2.0
V
V
V
V
OLP
OL
V
Quiet Output Minimum Dynamic V
3.3
3.3
3.3
–0.3
OLV
OL
V
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
IHD
V
0.8
ILD
Note:
2. Input t = t = 3ns
r
f
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
3
AC Electrical Characteristics
T = –40°C
A
T = +25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
t
, t
Propagation Delay
Time, Data to
Output
2.7
C = 15pF
5.8
8.3
4.4
6.9
5.3
7.8
4.0
6.5
10.0
8.3
10.1
13.6
6.2
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
13.5
17.0
8.5
ns
PLH PHL
L
C = 50pF
L
3.3 0.3 C = 15pF
L
C = 50pF
9.7
12.0
12.5
16.0
7.5
L
t
t
, t
Output Enable Time
2.7
C = 15pF, R = 1kΩ
9.3
ns
PZH PZL
L
L
C = 50pF, R = 1kΩ
12.8
5.6
L
L
3.3 0.3 C = 15pF, R = 1kΩ
L
L
C = 50pF, R = 1kΩ
9.1
11.0
19.0
13.0
1.5
L
L
, t
Output Disable
Time
2.7
C = 50pF, R = 1kΩ
15.7
11.2
1.5
ns
ns
PHZ PLZ
L
L
3.3 0.3 C = 50pF, R = 1kΩ
L
L
t
, t
Output to Output
2.7
3.3
C = 50pF
L
OSHL OSLH
(3)
Skew
1.5
1.5
Note:
3. Parameter guaranteed by design t
= |t
–t
|, t
= |t
–t
|
OSLH
PLHm PLHn OSHL
PHLm PHLn
Capacitance
T = –40°C to
A
T = +25°C
+85°C
A
Symbol
Parameter
Min.
Typ.
4
Max.
Min.
Max. Units
C
Input Capacitance
Power Dissipation Capacitance
10
10
pF
pF
IN
(4)
C
14
PD
Note:
4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current
PD
consumption without load.
CPD × VCC × fIN × ICC
---------------------------------------------------------
4 (per, bit)
Average operating current can be obtained by the eqation: I
=
CC(opr.)
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
4
Physical Dimensions
8.75
8.50
0.65
A
7.62
14
8
B
5.60
4.00
3.80
6.00
1.70
1.27
1
7
PIN ONE
INDICATOR
0.51
0.35
1.27
(0.33)
LAND PATTERN RECOMMENDATION
M
0.25
C B A
1.75 MAX
SEE DETAIL A
1.50
1.25
0.25
0.19
0.25
0.10
C
0.10
C
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
0.50
0.25
X 45°
R0.10
R0.10
GAGE PLANE
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE: 20:1
Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
5
Physical Dimensions (Continued)
Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
6
Physical Dimensions (Continued)
0.43 TYP
0.65
1.65
6.10
0.45
12.00°
TOP & BOTTOM
R0.09 min
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS
R0.09min
1.00
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 1982
E. LANDPATTERN STANDARD: SOP65P640X110-14M
F. DRAWING FILE NAME: MTC14REV6
Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
7
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
ACEx®
PDP-SPM™
SupreMOS™
FPS™
Power220®
SyncFET™
Build it Now™
CorePLUS™
CROSSVOLT™
CTL™
Current Transfer Logic™
EcoSPARK®
EZSWITCH™ *
™
FRFET®
POWEREDGE®
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
®
Global Power ResourceSM
Green FPS™
Green FPS™e-Series™
GTO™
i-Lo™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
The Power Franchise®
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™
UHC®
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
MicroPak™
MillerDrive™
Motion-SPM™
OPTOLOGIC®
FAST®
Ultra FRFET™
UniFET™
VCX™
OPTOPLANAR®
FastvCore™
®
FlashWriter® *
* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Advance Information
Formative or In Design
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
the design.
No Identification Needed
Obsolete
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I33
©1994 Fairchild Semiconductor Corporation
74LVX125 Rev. 1.4.0
www.fairchildsemi.com
8
相关型号：
©2020 ICPDF网 联系我们和版权申明