74VHCT00MTC
更新时间:2024-09-18 18:09:26
品牌:FAIRCHILD
描述:NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14
74VHCT00MTC 概述
NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14 栅极
74VHCT00MTC 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | TSSOP | 包装说明: | TSSOP, TSSOP14,.25 |
针数: | 14 | Reach Compliance Code: | unknown |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.14 |
系列: | AHCT/VHCT | JESD-30 代码: | R-PDSO-G14 |
JESD-609代码: | e0 | 长度: | 5 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | NAND GATE |
最大I(ol): | 0.008 A | 功能数量: | 4 |
输入次数: | 2 | 端子数量: | 14 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装等效代码: | TSSOP14,.25 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 峰值回流温度(摄氏度): | NOT SPECIFIED |
电源: | 5 V | Prop。Delay @ Nom-Sup: | 9 ns |
传播延迟(tpd): | 9 ns | 认证状态: | Not Qualified |
施密特触发器: | NO | 座面最大高度: | 1.1 mm |
子类别: | Gates | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 4.5 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | GULL WING | 端子节距: | 0.65 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 4.4 mm | Base Number Matches: | 1 |
74VHCT00MTC 数据手册
通过下载74VHCT00MTC数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载February 1998
74VHC00 • 74VHCT00
Quad 2-Input NAND Gate
General Description
Features
n High Speed:
The VHC/VHCT00 is an advanced high-speed CMOS
2-Input NAND Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The internal circuit is com-
posed of 3 stages, including buffer output, which provide
high noise immunity and stable output. An input protection
circuit insures that 0V to 7V can be applied to the input pins
without regard to the supply voltage. This device can be
used to interface 5V to 3V systems and two supply systems
such as battery backup. This circuit prevents device destruc-
tion due to mismatched supply and input voltages.
=
=
=
VHC tpd 3.7ns (typ) at TA 25˚C
=
VHCT tpd 5.0 ns (typ) at TA 25˚C
n High noise immunity:
=
=
VHC VNIH VNIL 28% VCC (min)
=
=
VHCT VIH 2.0V, VIL 0.8V
n Power down protection:
VHC inputs only
VHCT inputs and outputs
n Low noise: VOLP 0.8V (max)
n Low power dissipation:
=
=
=
ICC 2 µA (max) at TA 25˚C
n Pin and function compatible with 74HC/HCT00
NOTE: ADD EXTERNAL PULL UP RESISTOR TO
VHCT OUTPUTS TO DRIVE CMOS INPUTS
Ordering Code:
Commercial
74VHC00M
Package Number
M14A
Package Description
14-Lead Molded JEDEC SOIC
14-Lead Molded EIAJ SOIC
14-Lead Molded JEDEC Type 1 TSSOP
14-Lead Molded DIP
74VHC00SJ
74VHC00MTC
74VHC00N
M14D
MTC14
N14A
74VHCT00M
74VHCT00SJ
74VHCT00MTC
74VHCT00N
M14A
14-Lead Molded JEDEC SOIC
14-Lead Molded EIAJ SOIC
14-Lead Molded JEDEC Type 1 TSSOP
14-Lead Molded DIP
M14D
MTC14
N14A
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter ″X’ to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Assignment for DIP,TSSOP and SOIC
DS011504-1
DS011504-2
© 1998 Fairchild Semiconductor Corporation
DS011504
www.fairchildsemi.com
Pin Descriptions
Truth Table
Pin Names
An, Bn
On
Description
Inputs
Outputs
A
L
B
L
O
H
H
H
L
L
H
L
H
H
H
www.fairchildsemi.com
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
)
−0.5V to +7.0V
−0.5V to +7.0V
DC Input Voltage (VIN
)
Supply Voltage (VCC
)
DC Output Voltage (VOUT
VHC
)
VHC
2.0V to +5.5V
4.5V to 5.5V
0V to +5.5V
−0.5V to VCC +0.5V
−0.5V to 7.0V
−20 mA
VHCT
VHCT (Note 2)
Input Voltage (VIN
Output Voltage (VOUT
Operating Temperature (TOPR
Input Rise and Fall Time (tr, tf)
)
Input Diode Current (IIK
)
)
0V to VCC
Output Diode Current (IOK
)
)
−40˚C to +85˚C
±
VHC
20 mA
VHCT
−20 mA
=
±
±
z
100 ns/V
VCC 3.3V 0.3V (VHC Only)
0 ns/V
±
±
DC Output Current (IOUT
)
25 mA
50 mA
=
z
20 ns/V
VCC 5.0V 0.5V
0 ns/V
DC VCC/GND Current (ICC
)
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifications
should be met, without exception, to ensure that the system design is reliable
over its power supply, temperature, and output/input loading variables. Fair-
child does not recommend operation outside databook specifications.
Storage Temperature (TSTG
Lead Temperature (TL)
(Soldering, 10 seconds)
)
−65˚C to +150˚C
260˚C
>
Note 2:
V
OUT
V
CC
only if output is in H state.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics for VHC
=
=
Symbol
Parameter
VCC
TA 25˚C
TA −40˚C
Units
Conditions
(V)
to +85˚C
Min
1.50
Typ
Max
Min
Max
VIH
VIL
High Level Input
Voltage
2.0
3.0–5.5
2.0
1.50
V
V
0.7 VCC
0.7 VCC
Low Level Input
Voltage
0.50
0.50
3.0–5.5
2.0
0.3 VCC
0.3 VCC
=
=
VOH
High Level Output
Voltage
1.9
2.9
2.0
3.0
4.5
1.9
2.9
VIN VIH IOH −50 µA
3.0
V
V
V
V
or VIL
4.5
4.4
4.4
=
IOH −4mA
3.0
2.58
3.94
2.48
3.80
=
IOH −8mA
4.5
=
=
VOL
Low Level Output
Voltage
2.0
0.0
0.0
0.0
0.1
0.1
0.1
0.1
VIN VIH IOL 50 µA
3.0
or VIL
4.5
0.1
0.1
=
IOL 4 mA
3.0
0.36
0.36
0.44
0.44
=
4.5
IOL 8 mA
=
IIN
Input Leakage
Current
VIN 5.5V or GND
±
±
1.0
0–5.5
5.5
0.1
µA
µA
=
VIN VCC or GND
ICC
Quiescent Supply
Current
2.0
20.0
3
www.fairchildsemi.com
Noise Characteristics for VHC
=
Symbol
Parameter
VCC
(V)
TA 25˚C
Units
Conditions
Typ
Limit
=
CL 50 pF
VOLP
Quiet Output Maximum
Dynamic VOL
5.0
5.0
5.0
5.0
0.3
0.8
V
V
V
V
(Note 4)
VOLV
=
CL 50 pF
Quiet Output Minimum
Dynamic VOL
−0.3
−0.8
3.5
(Note 4)
VIHD
=
CL 50 pF
Minimum High Level
Dynamic Input Voltage
Maximum Low Level
Dynamic Input Voltage
(Note 4)
VILD
=
1.5
CL 50 pF
(Note 4)
Note 4: Parameter guaranteed by design
AC Electrical Characteristics for VHC
=
=
Symbol
Parameter
VCC
(V)
TA 25˚C
TA −40˚C
Units
Conditions
to +85˚C
Min
Typ
5.5
8.0
3.7
5.2
4
Max
7.9
11.4
5.5
7.5
10
Min
Max
9.5
13.0
6.5
8.5
10
=
±
tPLH
,
Propagation
3.3 0.3
1.0
1.0
1.0
1.0
ns
ns
CL 15 pF
=
tPHL
Delay
CL 50 pF
=
±
5.0 0.5
CL 15 pF
=
CL 50 pF
=
CIN
Input Capacitance
Power Dissipation
Capacitance
pF
pF
VCC Open
CPD
19
(Note 5)
Note 5:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average oper-
=
*
*
f
IN
ating current can be obtained from the equation: I
CC
(opr.)
C
V
+ I /4 (per gate).
CC
PD
CC
DC Electrical Characteristics for VHCT
=
=
Symbol
Parameter
VCC
TA 25˚C
TA −40˚C
Units
Conditions
(V)
to +85˚C
Min
2.0
2.0
Typ
Max
Min
2.0
2.0
Max
VIH
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Quiescent Supply Current
Maximum ICC/ Input
4.5
5.5
4.5
5.5
4.5
4.5
4.5
4.5
V
V
VIL
0.8
0.8
0.8
0.8
=
=
IOH −50 µA
VOH
VOL
IIN
3.15
2.5
3.65
0.0
3.15
2.4
V
V
V
V
VIN VIH
=
IOH −8 mA
=
=
IOL 50 µA
0.1
0.1
VIN VIH
=
0.36
0.44
IOL 8 mA
=
VIN 5.5V or GND
±
±
1.0
0–5.5
5.5
0.1
µA
µA
=
VIN VCC or GND
ICC
2.0
20.0
1.50
=
ICCT
VIN 3.4V
5.5
1.35
0.5
mA
=
Other Inputs VCC or GND
=
VOUT 5.5V
IOFF
Output Leakage Current
(Power Down State)
0.0
5.0
µA
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4
Noise Characteristics for VHCT
=
Symbol
Parameter
VCC
(V)
TA 25˚C
Units
Conditions
Typ
Limit
=
CL 50 pF
VOLP
Quiet Output Maximum
Dynamic VOL
5.0
5.0
5.0
5.0
0.4
0.8
V
V
V
V
(Note 6)
=
CL 50 pF
VOLV
(Note 6)
Quiet Output Minimum
Dynamic VOL
−0.4
−0.8
2.0
=
CL 50 pF
VIHD
(Note 6)
Minimum High Level
Dynamic Input Voltage
=
CL 50 pF
VILD
(Note 6)
Maximum Low Level
Dynamic Input Voltage
0.8
Note 6: Parameter guaranteed by design.
AC Electrical Characteristics for VHCT
=
=
Symbol
Parameter
VCC
(V)
TA 25˚C
TA −40˚C
Units
Conditions
Fig.
No.
to +85˚C
Min
Typ
5.0
5.5
4
Max
6.9
7.9
10
Min
Max
=
tPLH
Propagation Delay
5.0
1.0
1.0
8.0
9.0
10
ns
CL 15 pF
=
±
tPHL
CIN
0.5
CL 50 pF
=
Input Capacitance
Power Dissipation
Capacitance
pF
pF
VCC Open
CPD
17
(Note 7)
Note 7:
C
is defined as the value of the internal equivalent capacitance, which is calculated from the operating current consumption without load. Average oper-
PD
=
*
*
f
IN
ating current can be obtained from the equation: I
(opr.)
C
V
CC
+ I /4 (per gate)
CC
CC
PD
5
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit—JEDEC (M)
Package Number M14A
14-Lead Plastic EIAJ SOIC (SJ)
Package Number M14D
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic JEDEC TSSOP Type 1 (MTC)
Package Number MTC14
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Molded DIP (P)
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Fairchild Semiconductor
Corporation
Fairchild Semiconductor
Europe
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Hong Kong Ltd.
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Japan Ltd.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
74VHCT00MTC 相关器件
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