CD4047BCW [FAIRCHILD]
Monostable Multivibrator, 4000/14000/40000 Series, 1-Func, WAFER;
| 型号： | CD4047BCW |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Monostable Multivibrator, 4000/14000/40000 Series, 1-Func, WAFER 时钟 逻辑集成电路 |
| 文件： | 总9页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1987
Revised May 1999
CD4047BC
Low Power Monostable/Astable Multivibrator
■ True and complemented buffered outputs
General Description
The CD4047B is capable of operating in either the
■ Only one external R and C required
monostable or astable mode. It requires an external capac-
MONOSTABLE MULTIVIBRATOR FEATURES
itor (between pins 1 and 3) and an external resistor
(between pins 2 and 3) to determine the output pulse width
in the monostable mode, and the output frequency in the
astable mode.
■ Positive- or negative-edge trigger
■ Output pulse width independent of trigger pulse duration
■ Retriggerable option for pulse width expansion
Astable operation is enabled by a high level on the astable
input or low level on the astable input. The output fre-
quency (at 50% duty cycle) at Q and Q outputs is deter-
mined by the timing components. A frequency twice that of
Q is available at the Oscillator Output; a 50% duty cycle is
not guaranteed.
■ Long pulse widths possible using small RC components
by means of external counter provision
■ Fast recovery time essentially independent of pulse
width
■ Pulse-width accuracy maintained at duty cycles
approaching 100%
Monostable operation is obtained when the device is trig-
gered by LOW-to-HIGH transition at + trigger input or
HIGH-to-LOW transition at − trigger input. The device can
be retriggered by applying a simultaneous LOW-to-HIGH
transition to both the + trigger and retrigger inputs.
ASTABLE MULTIVIBRATOR FEATURES
■ Free-running or gatable operating modes
■ 50% duty cycle
A high level on Reset input resets the outputs Q to LOW, Q
to HIGH.
■ Oscillator output available
■ Good astable frequency stability
typical= ±2% + 0.03%/°C @ 100 kHz
frequency= ±0.5% + 0.015%/°C @ 10 kHz
deviation (circuits trimmed to frequency VDD = 10V
±10%)
Features
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 VDD (typ.)
■ Low power TTL compatibility: Fan out of 2 driving 74L
or 1 driving 74LS
Applications
•
•
•
•
•
•
Frequency discriminators
SPECIAL FEATURES
Timing circuits
Time-delay applications
Envelope detection
Frequency multiplication
Frequency division
■ Low power consumption: special CMOS oscillator
configuration
■ Monostable (one-shot) or astable (free-running)
operation
Ordering Code:
Order Number Package Number
Package Description
CD4047BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CD4047BCN
N14A
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 1999 Fairchild Semiconductor Corporation
DS005969.prf
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Connection Diagram
Pin Assignments for SOIC and DIP
Top View
Function Table
Terminal Connections
Output Pulse
From
Typical Output
Period or
To VDD
To VSS
Input Pulse
To
Function
Pulse Width
Astable Multivibrator
Free-Running
4, 5, 6, 14
4, 6, 14
6, 14
7, 8, 9, 12
7, 8, 9, 12
5, 7, 8, 9, 12
10, 11, 13
10, 11, 13
10, 11, 13
tA(10, 11) = 4.40 RC
tA (13) = 2.20 RC
True Gating
5
4
Complement Gating
Monostable Multivibrator
Positive-Edge Trigger
Negative-Edge Trigger
Retriggerable
4, 14
5, 6, 7, 9, 12
5, 7, 9, 12
8
6
10, 11
10, 11
10, 11
Figure 1
4, 8, 14
4, 14
tM (10, 11) = 2.48 RC
5, 6, 7, 9
8, 12
Figure 1
External Countdown (Note 1) 14
5, 6, 7, 8, 9, 12
Figure 1
Note 1: External resistor between terminals 2 and 3. External capacitor between terminals 1 and 3.
Typical Implementation of External Countdown Option
t
= (N − 1) t + (t + t /2)
A M A
EXT
FIGURE 1.
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2
Block Diagram
Logic Diagram
*Special input protection circuit to permit larger input-voltage swings.
3
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Absolute Maximum Ratings(Note 2)
(Note 3)
Recommended Operating
Conditions (Note 3)
DC Supply Voltage (VDD
Input Voltage (VIN
)
−0.5V to +18VDC
−0.5V to VDD +0.5VDC
−65°C to +150°C
DC Supply Voltage (VDD
Input Voltage (VIN
Operating Temperature Range (TA)
)
3V to 15VDC
0 to VDD VDC
)
)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
−40°C to +85°C
Note 2: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provides
conditions for actual device operation.
700 mW
500 mW
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
Note 3: V = 0V unless otherwise specified.
SS
260°C
DC Electrical Characteristics (Note 3)
−40°C
25°C
85°C
Symbol
Parameter
Conditions
Units
Min
Max
Min
Typ
Max
20
Min
Max
I
Quiescent Device Current
V
= 5V
20
40
80
150
300
600
µA
µA
µA
DD
DD
V
V
= 10V
= 15V
40
DD
DD
80
V
LOW Level Output Voltage
HIGH Level Output Voltage
|I | < 1 µA
O
OL
V
V
V
= 5V
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
DD
DD
DD
= 10V
= 15V
V
|I | < 1 µA
O
OH
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V
4.95
9.95
4.95
9.95
5
4.95
9.95
V
V
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 10V
= 15V
10
14.95
14.95
15
14.95
V
V
V
LOW Level Input Voltage
HIGH Level Input Voltage
= 5V, V = 0.5V or 4.5V
1.5
3.0
4.0
2.25
4.5
1.5
3.0
4.0
1.5
3.0
4.0
V
IL
O
= 10V, V = 1V or 9V
V
O
= 15V, V = 1.5V or 13.5V
6.75
2.75
5.5
V
O
= 5V, V = 0.5V or 4.5V
3.5
7.0
3.5
7.0
3.5
7.0
V
IH
O
= 10V, V = 1V or 9V
V
O
= 15V, V = 1.5V or 13.5V
11.0
0.52
1.3
11.0
0.44
1.1
8.25
0.88
2.25
8.8
11.0
0.36
0.9
V
O
I
LOW Level Output Current
(Note 4)
= 5V, V = 0.4V
mA
mA
mA
mA
mA
mA
µA
µA
OL
O
= 10V, V = 0.5V
O
= 15V, V = 1.5V
3.6
3.0
2.4
O
I
HIGH Level Output Current
(Note 4)
= 5V, V = 4.6V
−0.52
−1.3
−3.6
−0.44 −0.88
−1.1 −2.25
−0.36
−0.9
−2.4
OH
O
= 10V, V = 9.5V
O
= 15V, V = 13.5V
−3.0
−8.8
O
−5
I
Input Current
= 15V, V = 0V
−0.3
−10
−0.3
−1.0
IN
IN
−5
= 15V, V = 15V
0.3
10
0.3
1.0
IN
Note 4: I
and I are tested one output at a time.
OL
OH
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4
AC Electrical Characteristics (Note 5)
TA = 25°C, CL = 50 pF, RL = 200k, input tr = tf = 20 ns, unless otherwise specified.
Symbol
, t
Parameter
Propagation Delay Time Astable,
Astable to Osc Out
Conditions
Min
Typ
Max
Units
t
t
t
V
V
= 5V
200
100
400
200
ns
ns
PHL PLH
DD
= 10V
DD
V
V
= 15V
= 5V
80
160
900
ns
ns
DD
, t
550
PHL PLH
DD
Astable, Astable to Q, Q
+ Trigger, − Trigger to Q
+ Trigger, Retrigger to Q
Reset to Q, Q
V
V
V
= 10V
= 15V
= 5V
250
200
700
500
400
ns
ns
ns
DD
DD
DD
, t
1200
PHL PLH
V
V
V
= 10V
= 15V
= 5V
300
240
300
600
480
600
ns
ns
ns
DD
DD
DD
t
t
, t
PHL PLH
V
V
V
= 10V
= 15V
= 5V
175
150
300
300
250
600
ns
ns
ns
DD
DD
DD
, t
PHL PLH
V
V
V
= 10V
= 15V
= 5V
125
100
100
250
200
200
ns
ns
ns
DD
DD
DD
t
t
, t
Transition Time Q, Q, Osc Out
Minimum Input Pulse Duration
THL TLH
V
V
= 10V
= 15V
50
40
100
80
ns
ns
DD
DD
, t
Any Input
WL WH
V
V
V
V
V
V
= 5V
500
200
160
1000
400
320
15
ns
ns
ns
µs
µs
µs
pF
DD
DD
DD
DD
DD
DD
= 10V
= 15V
= 5V
t
, t
+ Trigger, Retrigger, Rise and
RCL FCL
Fall Time
= 10V
= 15V
5
5
C
Average Input Capacitance
Any Input
5
7.5
IN
Note 5: AC Parameters are guaranteed by DC correlated testing.
5
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Typical Performance Characteristics
Typical Q, Q, Osc Out Period Accuracy vs
Supply Voltage (Astable Mode Operation)
Typical Q, Q, Pulse Width Accuracy vs
Supply Voltage Monostable Mode Operation
fQ, Q
R
C
tM
R
C
A
B
C
D
E
1000 kHz
100 kHz
10 kHz
1 kHz
22k
22k
10 pF
A
B
C
D
E
2 µs
7 µs
22k
22k
10 pF
100 pF
100 pF
1000 pF
1000 pF
100 pF
100 pF
1000 pF
1000 pF
220k
220k
2.2M
60 µs
220k
220k
2.2M
550 µs
5.5 ms
100 Hz
Typical Q, Q and Osc Out Period Accuracy
vs Temperature Astable Mode Operation
Typical Q and Q Pulse Width Accuracy vs
Temperature Monostable Mode Operation
fQ, Q
R
C
tM
R
C
A
B
C
D
1000 kHz
100 kHz
10 kHz
1 kHz
22k
22k
10 pF
A
B
C
D
2 µs
7 µs
22k
22k
10 pF
100 pF
100 pF
1000 pF
100 pF
100 pF
1000 pF
220k
220k
60 µs
220k
220k
550 µs
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6
Timing Diagrams
Astable Mode
Monostable Mode
Retrigger Mode
7
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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