CD4093BCN_NL [FAIRCHILD]
NAND Gate, 4000/14000/40000 Series, 4-Func, 2-Input, CMOS, PDIP14, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14;
| 型号： | CD4093BCN_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | NAND Gate, 4000/14000/40000 Series, 4-Func, 2-Input, CMOS, PDIP14, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14 栅 光电二极管 逻辑集成电路 |
| 文件： | 总8页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1987
Revised April 2002
CD4093BC
Quad 2-Input NAND Schmitt Trigger
General Description
Features
The CD4093B consists of four Schmitt-trigger circuits.
Each circuit functions as a 2-input NAND gate with Schmitt-
trigger action on both inputs. The gate switches at different
points for positive and negative-going signals. The differ-
■ Wide supply voltage range: 3.0V to 15V
■ Schmitt-trigger on each input
with no external components
■ Noise immunity greater than 50%
■ Equal source and sink currents
■ No limit on input rise and fall time
■ Standard B-series output drive
■ Hysteresis voltage (any input) TA = 25°C
ence between the positive (VT+) and the negative voltage
(VT−) is defined as hysteresis voltage (VH).
All outputs have equal source and sink currents and con-
form to standard B-series output drive (see Static Electrical
Characteristics).
Typical
V
V
V
DD = 5.0V VH = 1.5V
DD = 10V
DD = 15V
V
V
V
H = 2.2V
H = 2.7V
Guaranteed
H = 0.1 VDD
Applications
•
•
•
•
•
Wave and pulse shapers
High-noise-environment systems
Monostable multivibrators
Astable multivibrators
NAND logic
Ordering Code:
Order Number Package Number
Package Description
CD4093BCM
CD4093BCN
M14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Top View
© 2002 Fairchild Semiconductor Corporation
DS005982
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (VDD
Input Voltage (VIN
)
−0.5 to +18 VDC
−0.5 to VDD +0.5 VDC
−65°C to +150°C
DC Supply Voltage (VDD
Input Voltage (VIN
Operating Temperature Range (TA)
)
3 to 15 VDC
0 to VDD VDC
)
)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
−55°C to +125°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed; they are not meant to imply that
the devices should be operated at these limits. The table of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provides
conditions for actual device operation.
700 mW
500 mW
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
Note 2: VSS = 0V unless otherwise specified.
260°C
DC Electrical Characteristics (Note 2)
−55°C
+25°C
+125°C
Symbol
IDD
Parameter
Conditions
Units
Min
Max
Min
Typ
Max
0.25
0.5
Min
Max
Quiescent Device
V
V
V
V
V
V
V
V
V
V
V
DD = 5V
0.25
0.5
7.5
Current
DD = 10V
DD = 15V
15.0
30.0
µA
1.0
1.0
VOL
VOH
VT−
VT+
LOW Level
IN = VDD, |IO| < 1 µA
DD = 5V
Output Voltage
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
DD = 10V
V
V
V
DD = 15V
HIGH Level
IN = VSS, |IO| < 1 µA
DD = 5V
Output Voltage
4.95
9.95
4.95
9.95
5
4.95
9.95
DD = 10V
10
15
DD = 15V
14.95
14.95
14.95
Negative-Going Threshold
Voltage (Any Input)
|IO| < 1 µA
V
V
V
DD = 5V, VO = 4.5V
DD = 10V, VO = 9V
DD = 15V, VO = 13.5V
1.3
2.25
4.5
1.5
3.0
4.5
1.8
4.1
6.3
2.25
4.5
1.5
3.0
4.5
2.3
4.65
6.9
2.85
4.35
6.75
6.75
Positive-Going Threshold
Voltage (Any Input)
|IO| < 1 µA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DD = 5V, VO = 0.5V
DD = 10V, VO = 1V
DD = 15V, VO = 1.5V
DD = 5V
2.75
5.5
3.6
2.75
5.5
3.3
6.2
9.0
1.5
2.2
2.7
3.5
7.0
2.65
5.35
8.1
3.5
7.0
7.15
V
V
8.25 10.65 8.25
10.5
2.0
4.0
6.0
10.5
2.0
VH
Hysteresis (VT+ − VT−)
0.5
1.0
1.5
2.35
4.3
0.5
1.0
1.5
0.35
0.70
1.20
(Any Input)
DD = 10V
4.0
DD = 15V
6.3
6.0
IOL
LOW Level Output
Current (Note 3)
IN = VDD
DD = 5V, VO = 0.4V
DD = 10V, VO = 0.5V
DD = 15V, VO = 1.5V
IN = VSS
0.64
1.6
0.51
1.3
0.88
2.25
8.8
0.36
0.9
mA
4.2
3.4
2.4
IOH
HIGH Level Output
Current (Note 3)
DD = 5V, VO = 4.6V
DD = 10V, VO = 9.5V
DD = 15V, VO = 13.5V
DD = 15V, VIN = 0V
DD = 15V, VIN = 15V
−0.64
−1.6
−4.2
0.51 −0.88
−1.3 −2.25
−0.36
−0.9
−2.4
mA
−3.4
−8.8
−5
IIN
Input Current
−0.1
−10
−0.1
−1.0
µA
−5
0.1
10
0.1
1.0
Note 3: IOH and IOL are tested one output at a time.
www.fairchildsemi.com
2
AC Electrical Characteristics (Note 4)
TA = 25°C, CL = 50 pF, RL = 200k, Input tr, tf = 20 ns, unless otherwise specified
Symbol
tPHL, tPLH
Parameter
Conditions
Min
Typ
300
120
80
Max
450
210
160
145
75
Units
Propagation Delay Time
V
V
V
V
V
V
DD = 5V
DD = 10V
DD = 15V
DD = 5V
ns
tTHL, tTLH
Transition Time
90
DD = 10V
DD = 15V
50
ns
40
60
CIN
Input Capacitance
(Any Input)
(Per Gate)
5.0
24
7.5
pF
pF
CPD
Power Dissipation Capacitance
Note 4: AC Parameters are guaranteed by DC correlated testing.
3
www.fairchildsemi.com
Typical Applications
Gated Oscillator
Assume t1 + t2 >> tPHL + tPLH then:
t
t
0 = RC ln [VDD/VT−]
1 = RC ln [(VDD − VT−)/(VDD − VT+)]
−]
t
2 = RC ln [VT+/VT
Gated One-Shot
(a) Negative-Edge Triggered
(b) Positive-Edge Triggered
www.fairchildsemi.com
4
Typical Performance Characteristics
Typical Transfer
Characteristics
Guaranteed Trigger Threshold
Voltage vs VDD
Guaranteed Hysteresis vs VDD
Guaranteed Hysteresis vs VDD
Input and Output Characteristics
V
V
NML = VIH(MIN) − VOL
NMH = VOH − VIL(MAX)
VIH(MIN) = VT+
(MIN)
V
DD − VIL(MAX) = VDD − VT−
(MAX)
5
www.fairchildsemi.com
AC Test Circuits and Switching Time Waveforms
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
8
相关型号：
CD4093BD/3
4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, HERMETIC SEALED, CERAMIC, DIP-14
RENESAS
©2020 ICPDF网 联系我们和版权申明