DM7442 [FAIRCHILD]
BCD to Decimal Decoder; BCD到十进制解码器
| 型号： | DM7442 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | BCD to Decimal Decoder |
| 文件： | 总4页 (文件大小：45K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1986
Revised February 2000
DM7442A
BCD to Decimal Decoder
General Description
Features
These BCD-to-decimal decoders consist of eight inverters
and ten, four-input NAND gates. The inverters are con-
nected in pairs to make BCD input data available for
decoding by the NAND gates. Full decoding of input logic
ensures that all outputs remain off for all invalid (10–15)
input conditions.
■ Diode clamped inputs
■ Also for application as 4-line-to-16-line decoders;
3-line-to-8-line decoders
■ All outputs are high for invalid input conditions
■ Typical power dissipation 140 mW
■ Typical propagation delay 17 ns
Ordering Code:
Order Number Package Number
Package Description
DM7442AN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006516
www.fairchildsemi.com
Function Table
No.
D
BCD Input
Decimal Output
C
L
B
L
A
L
0
L
1
H
L
2
H
H
L
3
H
H
H
L
4
H
H
H
H
L
5
H
H
H
H
H
L
6
H
H
H
H
H
H
L
7
H
H
H
H
H
H
H
L
8
H
H
H
H
H
H
H
H
L
9
H
H
H
H
H
H
H
H
H
L
0
1
2
3
4
5
6
7
8
9
I
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
N
V
A
L
I
L
H
L
H
H
H
H
L
H
L
H
H
H
D
H = HIGH Level
L = LOW Level
Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
Storage Temperature Range
0°C to +70°C
−65°C to +150°C
Recommended Operating Conditions
Symbol
VCC
Parameter
Supply Voltage
Min
4.75
2
Nom
Max
Units
V
5
5.25
VIH
VIL
IOH
IOL
TA
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
V
0.8
−0.8
16
V
mA
mA
°C
0
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions
Input Clamp Voltage = Min, I = −12 mA
Typ
Min
Max
Units
(Note 2)
V
V
V
V
V
V
V
V
V
V
V
V
−1.5
V
V
I
CC
CC
I
HIGH Level
= Min, I = Max
2.4
3.4
OH
OH
Output Voltage
= Max, V = Min
IH
IL
V
LOW Level
= Min, I = Max
0.2
0.4
V
OL
CC
OL
Output Voltage
= Min, V = Max
IL
IH
I
I
I
I
I
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current
= Max, V = 5.5V
1
mA
µA
I
CC
CC
CC
CC
CC
I
= Max, V = 2.4V
40
IH
I
= Max, V = 0.4V
−1.6
−55
56
mA
mA
mA
IL
I
= Max (Note 3)
= Max (Note 4)
−18
OS
CC
28
Note 2: All typicals are at V = 5V, T = 25°C.
CC
A
Note 3: Not more than one output should be shorted at a time.
Note 4: I is measured with all outputs open and all inputs grounded.
CC
Switching Characteristics
at VCC = 5V and T = 25°C
A
Symbol
Parameter
Propagation Delay Time
Conditions
Min
Max
Units
t
t
t
t
C
R
= 15 pF
= 400Ω
PHL
L
HIGH-to-LOW Level Output
from A, B, C or D through
2 Levels of Logic
L
25
ns
Propagation Delay Time
HIGH-to-LOW Level Output
from A, B, C or D through
3 Levels of Logic
PHL
PLH
PLH
30
25
30
ns
ns
ns
Propagation Delay Time
LOW-to-HIGH Level Output
from A, B, C or D through
2 Levels of Logic
Propagation Delay Time
LOW-to-HIGH Level Output
from A, B, C or D through
3 Levels of Logic
3
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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4
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