DM74AS280 [FAIRCHILD]
9-Bit Parity Generator/Checker; 9位奇偶校验发生器/校验器
| 型号： | DM74AS280 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 9-Bit Parity Generator/Checker |
| 文件： | 总6页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1986
Revised March 2000
DM74AS280
9-Bit Parity Generator/Checker
General Description
Features
These universal, 9-bit parity generators/checkers utilize
advanced Schottky high performance circuitry and feature
odd/even outputs to facilitate operation of either odd or
even parity applications. The word length capability is eas-
ily expanded by cascading.
■ Generates either odd or even parity for nine data lines
■ Inputs are buffered to lower the drive requirements
■ Can be used to upgrade existing systems using MSI
parity circuits
■ Cascadable for N-bits
The DM74AS280 can be used to upgrade the performance
of most systems utilizing the ’180 parity generator/checker.
Although the DM74AS280 is implemented without
expander inputs, the corresponding function is provided by
the availability of an input at pin 4 and no internal connec-
tion at pin 3. This permits the DM74AS280 to be substi-
tuted for the ’180 in existing designs to produce identical
function even if DM74AS280s are mixed with existing
’180s.
■ Advanced oxide-isolated, ion-implanted Schottky
TTL process
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full
temperature and VCC range
Ordering Code:
Order Number Package Number
Package Description
DM74AS280M
DM74AS280N
M14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Number of Inputs (A thru I)
that are HIGH
Outputs
∑Even
∑Odd
0, 2, 4, 6, 8
H
L
L
1, 3, 5, 7, 9
H
L = LOW State
H = HIGH State
© 2000 Fairchild Semiconductor Corporation
DS006303
www.fairchildsemi.com
Logic Diagram
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 1)
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
Storage Temperature Range
Typical θJA
0°C to +70°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
−65°C to +150°C
N Package
77.0°C/W
M Package
108.0°C/W
Recommended Operating Conditions
Symbol
Parameter
Min
4.5
2
Typ
Max
Units
V
VCC
VIH
VIL
IOH
IOL
TA
Supply Voltage
5
5.5
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free-Air Operating Temperature
V
0.8
−2
20
70
V
mA
mA
°C
0
Electrical Characteristics
Over recommended free-air temperature range. All typical values are measured at VCC = 5V, T = 25°C.
A
Symbol
Parameter
Input Clamp Voltage
Conditions
= 4.5V, I = −18 mA
Min
Typ
Max
Units
V
V
V
V
−1.2
V
IK
CC
I
HIGH Level Output Voltage
LOW Level Output Voltage
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
I
= −2 mA, V = 4.5V to 5.5V
V
− 2
V
OH
OL
OH
CC
CC
V
V
V
V
V
V
= 4.5V, I = Max
0.35
0.5
0.1
V
CC
CC
CC
CC
CC
CC
OL
I
I
I
I
I
= 5.5V, V = 7V
mA
µA
mA
mA
mA
I
IH
= 5.5V, V = 2.7V
20
IH
IL
IH
= 5.5V, V = 0.4V
−0.5
−112
40
IL
= 5.5V, V = 2.25V
−30
O
O
Supply Current
= 5.5V
25
CC
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
From
To
Min
Max
Units
t
t
t
t
Propagation Delay Time,
LOW-to-HIGH Level Output
Propagation Delay Time,
HIGH-to-LOW Level Output
Propagation Delay Time,
LOW-to-HIGH Level Output
Propagation Delay Time,
HIGH-to-LOW Level Output
V
= 4.5V to 5.5V,
= 50 pF,
PLH
CC
Data
∑Even
3
12
ns
C
R
L
L
= 500Ω
PHL
PLH
PHL
3
3
3
11
12
ns
ns
ns
Data
∑Odd
11.5
3
www.fairchildsemi.com
Typical Applications
Three DM74AS280s can be used to implement a 25-line
input (S135) exclusive-OR gate for 18 or 27-line parity
applications.
parity generator/checker.
As an alternative, the outputs of two or three parity genera-
tors/checkers can be decoded with a 2-input (AS86) or 3-
Longer word lengths can be implemented by cascading
DM74AS280s. As shown in Figure 2, parity can be gener-
ated for word lengths up to 81 bits.
FIGURE 1. 25-Line
Parity/Generator Checker
FIGURE 2. 81-Line Parity/Generator Checker
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M14A
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
6
相关型号：
DM74AS280M
AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOP-14
TI
DM74AS280MA+
AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOP-14
TI
DM74AS280MX
AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOP-14
TI
DM74AS280MX_NL
Parity Generator/Checker, AS Series, 9-Bit, Complementary Output, TTL, PDSO14, 0.150 INCH, MS-012, SOIC-14
FAIRCHILD
DM74AS280N
AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDIP14, 0.300 INCH, PLASTIC, DIP-14
TI
©2020 ICPDF网 联系我们和版权申明