DM74AS574WMX [FAIRCHILD]
Octal D-Type Flip-Flop ; 八D型触发器\n
| 型号： | DM74AS574WMX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Octal D-Type Flip-Flop
|
| 文件： | 总6页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1986
Revised March 2000
DM74AS574
Octal D-Type Edge-Triggered Flip-Flops
with 3-STATE Outputs
General Description
Features
■ Switching specifications at 50 pF
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased HIGH-logic-level drive provide these registers
with the capability of being connected directly to and driv-
ing the bus lines in a bus-organized system without need
for interface or pull-up components. They are particularly
attractive for implementing buffer registers, I/O ports, bidi-
rectional bus drivers, and working registers.
■ Switching specifications guaranteed over full tempera-
ture and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally equivalent with DM74S374
■ Improved AC performance over DM74S374 at approxi-
mately half the power
The eight flip-flops of the DM74AS574 are edge-triggered
D-type flip-flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
■ 3-STATE buffer-type outputs drive bus lines directly
■ Bus structured pinout
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
The pinout is arranged to ease printed circuit board layout.
All data inputs are on one side of the package while all the
outputs are on the other side.
Ordering Code:
Order Number Package Number
Package Description
DM74AS574WM
DM74AS574N
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006314
www.fairchildsemi.com
Function Table
Logic Diagram
Output
Clock
D
Output
Control
Q
H
L
L
↑
↑
H
L
L
L
L
X
X
X
Q0
Z
H
L = LOW State
H = HIGH State
X = Don’t Care
↑ = Positive Edge Transition
Z = High Impedance State
Q
= Previous Condition of Q
0
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2
Absolute Maximum Ratings(Note 1)
Supply Voltage
7V
7V
Input Voltage
Voltage Applied to Disabled Output
5.5V
Operating Free Air Temperature Range
Storage Temperature Range
Typical θJA
0°C to +70°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
−65°C to +150°C
N Package
52.0°C/W
70.0°C/W
M Package
Recommended Operating Conditions
Symbol
Parameter
Min
4.5
2
Nom
Max
Units
V
VCC
VIH
VIL
Supply Voltage
5
5.5
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency
V
0.8
−15
48
V
IOH
IOL
mA
mA
MHz
fCLK
0
80
tWCLK
Width of Clock Pulse
HIGH
LOW
4
ns
6
tSU
tH
Data Setup Time (Note 2)
Data Hold Time (Note 2)
4↑
2↑
0
ns
ns
°C
TA
Free Air Operating Temperature
70
Note 2: The (↑) arrow indicates the positive edge of the clock is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, T = 25°C.
A
Symbol
Parameter
Conditions
= 4.5V, I = −18 mA
Min
Typ
Max
Units
V
V
Input Clamp Voltage
HIGH Level
V
V
−1.2
V
IK
CC
I
= 4.5V, V = V Max,
OH
CC
IL
IL
2.4
3.2
Output Voltage
I
I
= Max
OH
V
= −2 mA, V = 4.5V to 5.5V
V
− 2
OH
CC
CC
V
LOW Level
V
= 4.5V, V = 2V,
OL
CC IH
0.35
0.5
V
Output Voltage
I
= Max
OL
I
I
I
I
I
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
V
V
V
V
V
V
V
V
V
= 5.5V, V = 7V
0.1
20
mA
µA
I
CC
CC
CC
CC
CC
IH
= 5.5V, V = 2.7V
IH
IH
= 5.5V, V = 0.4V
−0.5
−112
mA
mA
IL
IL
(Note 3) Output Drive Current
= 5.5V, V = 2.25V
−30
O
O
OFF-State Output Current,
HIGH Level Voltage Applied
OFF-State Output Current,
LOW Level Voltage Applied
Supply Current
= 5.5V, V = 2V,
IH
OZH
50
µA
µA
= 2.7V
O
I
I
= 5.5V, V = 2V,
IH
OZL
CC
CC
−50
= 0.4V
O
= 5.5V
Outputs HIGH
Outputs LOW
73
85
84
116
134
134
CC
Outputs Open
mA
Outputs Disabled
Note 3: The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, I
.
OS
3
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Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
From
To
Min
Max
Units
f
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
V
R
C
= 4.5V to 5.5V
80
MHz
MAX
CC
t
= 500Ω
= 50 pF
PLH
L
L
Clock
Clock
Any Q
Any Q
3
4
8
9
ns
ns
t
PHL
t
Output Enable Time
to HIGH Level Output
PZH
Output Control
Output Control
Output Control
Output Control
Any Q
Any Q
Any Q
Any Q
2
3
2
2
6
10
6
ns
ns
ns
ns
t
Output Enable Time
to LOW Level Output
PZL
t
Output Disable Time
PHZ
from HIGH Level Output
t
Output Disable Time
PLZ
6
from LOW Level Output
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4
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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6
相关型号：
DM74AS576N
IC AS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20, PLASTIC, DIP-20, Bus Driver/Transceiver
TI
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