DM74LS83 [FAIRCHILD]
4-Bit Binary Adder with Fast Carry; 4位二进制加法器与快速进
| 型号： | DM74LS83 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 4-Bit Binary Adder with Fast Carry |
| 文件： | 总5页 (文件大小：55K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1986
Revised March 2000
DM74LS83A
4-Bit Binary Adder with Fast Carry
General Description
Features
These full adders perform the addition of two 4-bit binary
numbers. The sum (∑) outputs are provided for each bit
and the resultant carry (C4) is obtained from the fourth bit.
These adders feature full internal look ahead across all four
bits. This provides the system designer with partial look-
ahead performance at the economy and reduced package
count of a ripple-carry implementation.
■ Full-carry look-ahead across the four bits
■ Systems achieve partial look-ahead performance with
the economy of ripple carry
■ Typical add times
Two 8-bit words 25 ns
Two 16-bit words 45 ns
■ Typical power dissipation per 4-bit adder 95 mW
The adder logic, including the carry, is implemented in its
true form meaning that the end-around carry can be
accomplished without the need for logic or level inversion.
Ordering Code:
Order Number Package Number
Package Description
DM74LS83AN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006378
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Truth Table
H = HIGH Level, L = LOW Level
Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs ∑1 and ∑2 and the value of the internal carry C2. The values at C2, A3, B3, A4, and
B4 are then used to determine outputs ∑3, ∑4, and C4.
Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
Storage Temperature Range
0°C to +70°C
−65°C to +150°C
Recommended Operating Conditions
Symbol
Parameter
Min
4.75
2
Nom
Max
Units
V
VCC
VIH
VIL
IOH
IOL
TA
Supply Voltage
5
5.25
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
V
0.8
−0.4
8
V
mA
mA
°C
0
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
= Min, I = −18 mA
Min
Max
Units
(Note 2)
V
V
Input Clamp Voltage
HIGH Level
V
V
V
V
V
−1.5
V
V
I
CC
CC
I
= Min, I = Max
OH
OH
2.7
3.4
Output Voltage
LOW Level
= Max, V = Min
IH
IL
V
= Min, I = Max
OL
OL
CC
0.35
0.25
0.5
Output Voltage
= Max, V = Min
V
IL
IH
I
= 4 mA, V = Min
0.4
0.2
0.1
40
OL
CC
I
I
I
Input Current @ Max
Input Voltage
V
= Max
CC
A or B
C0
I
mA
µA
V = 7V
I
HIGH Level
V
= Max
CC
A or B
C0
IH
IL
Input Current
V = 2.7V
20
I
LOW Level
V
= Max
A or B
C0
−0.8
−0.4
−100
34
CC
mA
Input Current
V = 0.4V
I
I
I
I
Short Circuit Output Current
Supply Current
Supply Current
V
V
V
= Max (Note 3)
= Max (Note 4)
= Max (Note 5)
−20
mA
mA
mA
OS
CC
CC
CC
19
22
CC1
CC2
39
Note 2: All typicals are at V = 5V, T = 25°C.
CC
A
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 4: I
Note 5: I
is measured with all outputs open, all B inputs LOW and all other inputs at 4.5V, or all inputs at 4.5V.
is measured with all outputs OPEN and all inputs grounded.
CC1
CC2
3
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Switching Characteristics
at VCC = 5V and T = 25°C
A
From (Input)
To (Output)
R = 2 kΩ
L
Symbol
Parameter
C
= 15 pF
C
= 50 pF
L
Units
L
Min
Max
Min
Max
t
t
t
t
t
t
t
t
t
t
t
t
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
PLH
C0 to ∑1 or ∑2
C0 to ∑1 or ∑2
C0 to ∑3
24
24
24
24
24
24
24
24
17
17
17
17
28
30
28
30
28
30
28
30
24
25
24
26
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
C0 to ∑3
C0 to ∑4
C0 to ∑4
A , B to ∑
i
i
i
A , B to ∑
i
i
i
C0 to C4
C0 to C4
A , B to C4
i
i
A , B to C4
i
i
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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