DM74S02N [FAIRCHILD]
Quad 2-Input NOR Gate; 四路2输入NOR门
| 型号： | DM74S02N |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Quad 2-Input NOR Gate |
| 文件： | 总3页 (文件大小：38K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1986
Revised May 2000
DM74S02
Quad 2-Input NOR Gate
General Description
This device contains four independent gates each of which
performs the logic NOR function.
Ordering Code:
Order Number Package Number
Package Description
DM74S02N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Y = A + B
Inputs
Output
A
L
B
L
Y
H
L
L
H
L
H
H
L
H
L
H = HIGH Logic Level
L = LOW Logic Level
© 2000 Fairchild Semiconductor Corporation
DS006490
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Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
Storage Temperature Range
0°C to +70°C
−65°C to +150°C
Recommended Operating Conditions
Symbol
Parameter
Min
4.75
2
Nom
Max
Units
V
VCC
VIH
VIL
IOH
IOL
TA
Supply Voltage
5
5.25
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
V
0.8
−1
20
70
V
mA
mA
°C
0
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
Min
Max
Units
(Note 2)
VI
VOH
Input Clamp Voltage
V
V
V
V
V
V
V
V
V
V
V
CC = Min, II = −18 mA
CC = Min, IOH = Max
IL = Max
−1.2
V
V
HIGH Level
2.7
3.4
Output Voltage
VOL
LOW Level
CC = Min, IOL = Max
IH = Min
0.5
V
Output Voltage
II
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current with Outputs HIGH
Supply Current with Outputs LOW
CC = Max, VI = 5.5V
CC = Max, VI = 2.7V
CC = Max, VI = 0.5V
CC = Max (Note 3)
CC = Max
1
50
mA
µA
IIH
IIL
−2
mA
mA
mA
mA
IOS
ICCH
ICCL
−40
−100
29
17
26
CC = Max
45
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
at VCC = 5V and TA = 25°C
RL = 280Ω
Symbol
Parameter
C
L = 15 pF
Max
C
L = 50 pF
Units
Min
Min
Max
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
1.5
1.5
5.5
5.5
2
2
7.5
ns
ns
tPHL
7.5
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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