FAN400CNY [FAIRCHILD]

Low-Power, Green-Mode, PWM Flyback Power Controller without Secondary Feedback (CC); 低功耗,绿色模式PWM反激式电源控制器无需次级反馈( CC )
FAN400CNY
型号: FAN400CNY
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Low-Power, Green-Mode, PWM Flyback Power Controller without Secondary Feedback (CC)
低功耗,绿色模式PWM反激式电源控制器无需次级反馈( CC )

稳压器 开关式稳压器或控制器 电源电路 开关式控制器 光电二极管 信息通信管理
文件: 总14页 (文件大小:538K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
September 2008  
FAN400C — Low-Power, Green-Mode, PWM Flyback Power  
Controller without Secondary Feedback (CC)  
Features  
Description  
This highly integrated PWM controller provides several  
features to enhance the performance of low-power  
flyback converters. To minimize standby power  
ƒ Linearly Decreasing PWM Frequency  
ƒ Green Mode Under Light-Load and Zero-Load  
Conditions  
consumption,  
a
proprietary green-mode function  
provides off-time modulation to linearly decrease the  
switching frequency under light-load and zero-load  
conditions. This green mode enables the power supply  
to meet international power conservation requirements.  
Another advantage of the FAN400C is that the typical  
startup current is only 8μA, while the typical operating  
current can be as low as 3.6mA. A large startup  
resistance can be used to achieve higher power  
conversion efficiency.  
ƒ Constant Current (CC) without Secondary-Feedback  
Circuitry  
ƒ Low Startup Current: 8μA  
ƒ Low Operating Current: 3.6mA  
ƒ Leading-Edge Blanking  
ƒ Constant Power Limit  
ƒ Universal AC Input Range  
FAN400C integrates  
a frequency-hopping function  
ƒ Synchronized Slope Compensation  
ƒ 140°C OTP Sensor with Hysteresis  
ƒ VDD Over-Voltage Protection (Auto Restart)  
ƒ Cycle-by-Cycle Current Limiting  
ƒ Under-Voltage Lockout (UVLO)  
ƒ Fixed PWM Frequency with Hopping  
ƒ Gate Output Maximum Voltage Clamped at 17V  
ƒ Small SSOT-6 Package  
internally to reduce EMI emissions with minimum line  
filters. Built-in synchronized slope compensation  
maintains the stability of peak current-mode control.  
Proprietary internal compensation ensures constant  
output power limiting over a universal range of AC input  
voltages, from 90VAC to 264VAC  
.
The FAN400C provides many protection functions.  
Pulse-by-pulse current limiting ensures constant output  
current, even if a short circuit occurs. The internal  
protection circuit disables PWM output if VDD exceeds  
24.5V. The gate output is clamped at 17V to protect the  
power MOS from over-voltage damage. The built-in  
over-temperature protection (OTP) function shuts down  
the controller at 140°C with a 30°C hysteresis.  
Applications  
General-purpose, switching-mode, power supplies and  
flyback power converters, such as:  
The FAN400C is designed to provide a low-cost total  
solution for flyback converters. It is available in a small-  
footprint, 6-pin, SSOT-6 package.  
ƒ Battery Chargers for Cellular Phones, Cordless  
Phones, PDAs, Digital Cameras, Power Tools  
ƒ Power Adapters for Ink Jet Printers, Video Game  
Consoles, Portable Audio Players  
Related Resources  
ƒ Open-Frame SMPS for TV/DVD Standby and  
Auxiliary Supplies, Home Appliances, Consumer  
Electronics  
ƒ AN-6072 — Low-Power, Green-Mode, PWM Flyback  
Power Controller without Secondary Feedback  
ƒ Replacement for Linear Transformers and RCC SMPS  
ƒ PC 5V Standby Power  
Ordering Information  
Part Number Operating Temperature Range  
Package  
Packing Method  
Eco Status  
Green  
FAN400CTY  
FAN400CNY  
SSOT-6  
DIP-8  
Tape & Reel  
Tube  
-40°C to +105°C  
-40°C to +105°C  
Green  
For Fairchild’s definition of “green” please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
Application Diagram  
Figure 1.  
Typical Application  
Internal Block Diagram  
Figure 2.  
Functional Block Diagram  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
2
Marking Information  
XXX: AAU=FAN400C  
TT : Die run code  
. . . : Year code  
- - - : Week code  
1’st line  
Z: Assembly plant code  
X: Year code  
Y: Week code  
TT: Die run code  
3’rd line  
T: N=DIP  
P: Z=Lead free + RoHS compatible  
Y=Green package  
M: Manufacture flow code  
Figure 3.  
Top Mark  
Pin Configurations  
GND  
FB  
GATE  
VDD  
GND  
FB  
GATE  
VDD  
NC  
NC  
NC  
NC  
SENSE  
SENSE  
Figure 4.  
SSOT-6 Pin Configuration  
Figure 5.  
DIP-8 Pin Configuration  
Pin Definitions  
DIP  
Pin #  
SSOT  
Pin #  
Name  
Description  
1
2
3
6
5
GATE  
VDD  
NC  
The totem-pole output driver to drive the power MOSFET  
Power supply  
No connection  
Current-sense detects the voltage across a sensed resistor. To provide over-  
current protection, PWM output is disabled if the voltage exceeds an internal  
threshold. This pin also provides current information for current-mode control.  
4
4
SENSE  
5
6
NC  
NC  
No connection  
No connection  
3
2
1
The FB pin provides feedback information to the internal PWM comparator. This  
feedback is used to control the duty cycle.  
7
8
FB  
GND  
Ground  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device  
reliability. The absolute maximum ratings are stress ratings only.  
Symbol  
VDD  
Parameter  
Min.  
Max.  
30  
Unit  
V
DC Supply Voltage(1,2)  
Input Voltage to FB Pin  
VFB  
-0.3  
-0.3  
7.0  
V
VSENSE  
TJ  
Input Voltage to Sense Pin  
7.0  
V
Operating Junction Temperature  
+150  
263.3  
135.7  
+150  
+260  
°C  
SOT  
DIP  
°C/W  
°C/W  
°C  
Thermal Resistance  
(Junction-to-Air)  
ΘJA  
TSTG  
TL  
Storage Temperature Range  
-55  
Lead Temperature (Wave Soldering or IR, 10 Seconds)  
Human Body Model  
JEDEC: JESD22-A114  
Electrostatic Discharge Capability  
Machine Model,  
°C  
4
kV  
V
ESD  
200  
JEDEC: JESD22-A115  
Notes:  
1. All voltage values, except differential voltages, are given with respect to GND pin.  
2. Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
4
Electrical Characteristics  
Unless otherwise noted, VDD=15V and TA=25°C.  
Symbol  
Parameter  
Conditions  
Min.  
Typ.  
Max. Units  
VDD Section  
VDD-OP Continuously Operation Voltage  
VDD-ON Turn-On Threshold Voltage  
VDD-OFF Turn-Off Threshold Voltage  
23.5  
18  
V
V
16  
17  
8.0  
8
7.5  
8.5  
20  
V
IDD-ST  
IDD-OP  
Startup Current  
VDD=VDD-ON – 0.1V  
CL=1nF  
μA  
mA  
Operating Supply Current  
3.6  
4.6  
VDD Low-threshold Voltage to Exit Green-off  
Mode  
VDD-G OFF  
VDD-OVP  
V
V
V
DD-OFF+1.2  
VDD Over-Voltage Protection  
23.5  
70  
24.5  
25.5  
200  
VDD Over-Voltage Protection Debounce  
Time  
tD-VDDOVP  
μs  
135  
Feedback Input Section  
AV  
Input-Voltage to Current-Sense Attenuation  
Input Impedance  
1.5/5  
4.5  
2.0/5  
4.6  
2.5/5  
150  
V/V  
kΩ  
V
ZFB  
IFB=0.1mA to 0.2mA  
VFB-OPEN Open-Loop Voltage  
Current-Sense Section  
tPD  
Propagation Delay  
100  
0.81  
0.73  
0.58  
1.10  
1.01  
0.81  
310  
ns  
V
VDD=18V  
VDD=15V  
VDD=10V  
VDD=18V  
VDD=15V  
VDD=10V  
VSTHVA Current Limit Valley Threshold Voltage  
VSTHFL Current Limit Flat Threshold Voltage  
V
V
V
V
V
tLEB  
Leading-Edge Blanking Time  
250  
370  
ns  
Figure 6.  
Saw Limit  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
5
Electrical Characteristics (Continued)  
Unless otherwise noted, VDD=15V and TA=25°C.  
Symbol  
Parameter  
Conditions  
Min.  
Typ.  
Max. Units  
Oscillator Section  
Center Frequency  
Hopping Range  
60  
65  
±4.6  
4
70  
fOSC  
Frequency  
kHz  
±5.2  
±4.0  
tHOP  
fOSC-G  
VFB-N  
VFB-G  
VFB-Z  
SG  
Hopping Period  
ms  
Green Mode Frequency  
14.5  
2.3  
17.0  
2.6  
19.5  
2.9  
KHz  
Green Mode Entry FB Voltage  
Green Mode Ending FB Voltage  
Zero Duty Cycle FB Voltage  
Green Mode Modulation Slope  
Frequency Variation vs. VDD Deviation  
V
V
VFB-N -0.75  
1.45  
70  
V
40  
100  
2
Hz/mV  
%
fDV  
VDD=10 to 22V  
TA=-20 to 85°C  
Frequency Variation vs. Temperature  
Deviation  
fDT  
1.5  
73  
5.0  
%
Output Section  
DCYMAX Maximum Duty Cycle  
VGATE-L GATE Low Voltage  
VGATE-H GATE High Voltage  
68  
78  
%
V
IO=10mA  
IO=-10mA  
CL=1nF  
1.5  
8
V
tr  
tf  
GATE Rising Time  
GATE Falling Time  
150  
70  
200  
90  
250  
110  
ns  
ns  
CL=1nF  
VGATE-  
CLAMP  
GATE Output Clamping Voltage  
VDD=20V  
16  
17  
18  
V
Over-Temperature Protection (OTP)  
TOTP  
Protection Junction Temperature  
+140  
+110  
°C  
°C  
TOTP-  
RESTART  
Restart Junction Temperature  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
6
Typical Performance Characteristics  
17.4  
17.2  
17  
8.6  
8.4  
8.2  
8
16.8  
16.6  
16.4  
7.8  
7.6  
-40 -30 -20 -10  
0
10 20 30 40 50 60 70 80 90 100  
-40 -30 -20 -10  
0
10 20  
30 40 50 60 70  
80 90 100  
Temperature ()  
Temperature ()  
Figure 7.  
Turn-on Threshold Voltage (VDD-ON  
)
Figure 8.  
Turn-off Threshold Voltage (VDD-OFF  
vs. Temperature  
)
vs. Temperature  
12  
11  
10  
9
3.4  
3.2  
3
2.8  
2.6  
2.4  
2.2  
8
7
6
5
4
-40 -30 -20 -10  
0
10 20 30 40  
50 60  
70 80 90 100  
-40 -30 -20 -10  
0
10 20  
30 40 50 60 70  
80 90 100  
Temperature ()  
Temperature ()  
Figure 9.  
Startup Current (IDD-ST) vs.  
Temperature  
Figure 10. Operating Supply Current (IDD-OP  
)
vs. Temperature  
68  
67  
66  
65  
64  
63  
75  
74  
73  
72  
71  
70  
62  
-40 -30 -20 -10  
0
10 20 30 40  
50 60  
70 80 90 100  
-40 -30 -20 -10  
0
10 20 30 40  
50 60  
70 80 90 100  
Temperature ()  
Temperature ()  
Figure 11. Center Frequency (fOSC  
)
Figure 12. Maximum Duty Cycle (DCYMAX  
)
vs. Temperature  
vs. Temperature  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
7
Typical Performance Characteristics  
3
2.8  
2.6  
2.4  
2.2  
2
2.2  
2
1.8  
1.6  
1.4  
1.2  
-40 -30 -20 -10  
0
10 20  
30 40 50 60 70  
80 90 100  
-40 -30 -20 -10  
0
10 20  
30 40 50 60 70  
80 90 100  
Temperature ()  
Temperature ()  
Figure 13. Green Mode Entry FB Voltage  
(VFB-N) vs. Temperature  
Figure 14. Green Mode Ending FB Voltage  
(VFB-G) vs. Temperature  
360  
3.4  
3.2  
3
340  
320  
300  
280  
260  
2.8  
2.6  
2.4  
2.2  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
-40 -30 -20 -10  
0
10 20 30 40 50 60 70 80 90 100  
VDD (V)  
Temperature ()  
Figure 15. Leading-Edge Blanking Time (tLEB  
)
Figure 16. Operating Supply Current  
vs. VDD Voltage  
vs. Temperature  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
8
Operation Description  
FAN400C devices integrate many useful functions for  
low-power switch-mode power supplies. The following  
descriptions highlight the key features of the FAN400C.  
Oscillator Operation  
The oscillation frequency is fixed at 65KHz.  
Leading-Edge Blanking (LEB)  
Startup Current  
Each time the power MOSFET is switched on, a turn-on  
spike occurs at the sense-resistor. To avoid premature  
termination of the switching pulse, a 310ns leading-  
edge blanking time is built in. Conventional RC filtering  
is not necessary. During this blanking period, the  
current-limit comparator is disabled and cannot switch  
off the gate drive.  
The required startup current is only 8mA, which allows a  
high-resistance, low-wattage startup resistor to supply  
the controller’s startup power. A 1.5MΩ/0.25W startup  
resistor can be used over a wide input range (100V-  
240VAC) with very little power loss.  
Operating Current  
The operating current is normally 3.6mA, which results  
in higher efficiency and reduces the required VDD hold-  
up capacitance. A 10μF/25V VDD hold-up capacitor can  
be used over a wide input range (100V-240VAC) with  
very little power loss.  
Constant Output Power Limit  
When the SENSE voltage across the sense resistor RS  
reaches the threshold voltage (around 1.0V), the output  
GATE drive is turned off following a small propagation  
delay, tPD  
additional current proportional to  
.
This propagation delay introduces an  
PD•VIN/LP. The  
t
Green-Mode Operation  
propagation delay is nearly constant regardless of the  
input line voltage VIN. Higher input line voltages result in  
larger additional currents. Under high input-line  
voltages, the output power limit is higher than under low  
input-line voltages. Over a wide range of AC input  
voltages, the variation can be significant. To  
compensate for this, the threshold voltage is adjusted  
by adding a positive ramp (Vlimit_ramp). This ramp signal  
can vary from 0.73V to 1.01V and flattens out at 1.01V.  
A smaller threshold voltage forces the output GATE  
drive to terminate earlier, reducing total PWM turn-on  
time and making the output power equal to that of the  
low-line input. This proprietary internal compensation  
feature ensures a constant output power limit over a  
wide range of AC input voltages (90VAC to 264VAC).  
The proprietary green-mode function provides off-time  
modulation to linearly decrease the switching frequency  
under light-load and zero-load conditions. The on-time  
is limited to provide better protection against brownouts  
and other abnormal conditions. Power supplies using  
the FAN400C can meet international restrictions  
regarding standby power-consumption.  
Current (CC) without Feedback  
The FAN400C can provide over-current protection  
without requiring secondary-side feedback signals. For  
improved CV and CC accuracy, the transformer leakage  
inductance should be reduced as much as possible.  
Over-Temperature Protection (OTP)  
Under-Voltage Lockout (UVLO)  
The FAN400C has a built-in temperature-sensing circuit  
to shut down PWM output once the junction  
temperature exceeds 140°C. While PWM output is shut  
down, the VDD voltage gradually drops to the UVLO  
voltage. Some of the internal circuits are shut down and  
VDD gradually starts increasing again. When VDD  
reaches 17V, all the internal circuits, including the  
temperature-sensing circuit, operate normally. If the  
junction temperature is still higher than 140°C, the  
PWM controller shuts down immediately. This situation  
continues until the temperature drops below 110°C. The  
PWM output is then turned back on. The temperature  
hysteresis window for the OTP circuit is 30°C.  
The turn-on/turn-off thresholds are fixed internally at  
17V and 8V. To enable the FAN400C during startup,  
the hold-up capacitor must first be charged to 17V  
through the startup resistor. The hold-up capacitor  
continues to supply VDD before energy can be delivered  
from the auxiliary winding of the main transformer. VDD  
must not drop below 8V during this startup process.  
This UVLO hysteresis window ensures that the hold-up  
capacitor can adequately supply VDD during startup.  
Gate Output  
The BiCMOS output stage is a fast totem-pole gate  
driver. Cross-conduction is avoided to minimize heat  
dissipation, increase efficiency, and enhance reliability.  
The output driver is clamped by an internal 17V Zener  
diode to protect the power MOSFET transistors against  
any harmful over-voltage gate signals.  
VDD Over-Voltage Clamping  
VDD over-voltage clamping prevents damage from over-  
voltage conditions. When VDD exceeds 24.5V, PWM  
output is shut down. Over-voltage conditions may be  
caused by an open photo-coupler loop or a short circuit  
in the output.  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
9
Operation Description (Continued)  
Slope Compensation  
Noise Immunity  
The sensed voltage across the current-sense resistor is  
used for current-mode control and pulse-by-pulse  
current limiting. The built-in slope compensation  
improves power supply stability. Furthermore, it  
prevents sub-harmonic oscillations that normally would  
Noise from the current-sense or the control signal may  
cause significant pulse-width jitter, particularly in  
continuous-conduction mode. Slope compensation  
helps alleviate this problem. Good placement and  
layout practices should be followed. Avoid long PCB  
traces and component leads. Compensation and filter  
components should be located near the FAN400C.  
Increasing the power-MOS gate resistance is advised.  
occur because of peak-current mode control.  
A
positively sloped, synchronized ramp is activated with  
every switching cycle. The slope of the ramp is:  
0.33 × Duty  
(1)  
Duty (max.)  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
10  
Applications Information  
Figure 17. Reference Circuit  
Reference  
BOM  
Reference  
BD1  
Component  
Component  
Inductor 10μH 6mm  
MOSFET 1A/600V  
BD DI106 1A/600V  
YC 2.2nF/250V (Y1)  
EC 4.7μF/400V 105°C  
EC 4.7μF/400V 105°C  
CC 1nF/1kV  
L2  
CY1 (Option)  
Q1  
C1  
R1,R2  
R3,R4  
R5  
R 750k/1206  
R 47k/1206  
R 47/1206  
C2  
C3  
C4  
EC 10μF/50V  
R6  
R 4.7/0.5W  
C6  
CC 4.7nF/0805  
R7  
R 100/0805  
R 10/1206  
C7 (Option)  
CC 1nF/100V 1206  
EC 470μF/10V 105°C  
EC 470μF/10V 105°C  
CC 2.2nF/0805  
R8  
C8  
R10  
R11  
R12  
R13  
R14  
T1  
R 10/1206  
C9  
R 100/ 1/8W  
R 33k/0805  
R 33k/ 1/8W  
R 4.7k/0805  
Transformer EE-16  
IC FAN400C (Green PWM IC)  
IC PC817  
C10  
D1  
Diode FRI07  
D2  
Diode FR102  
D4  
Diode SB360  
D5 (Option)  
ZD 6.8V/0.5W  
U1  
F1  
L1  
R 1/0.5W  
U2  
Inductor 20mH 6*8mm  
U3  
IC TL431  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
11  
Physical Dimensions  
9.83  
9.00  
6.67  
6.096  
8.255  
7.61  
3.683  
3.20  
7.62  
5.08 MAX  
0.33 MIN  
3.60  
3.00  
(0.56)  
2.54  
0.356  
0.20  
0.56  
0.355  
9.957  
7.87  
1.65  
1.27  
7.62  
NOTES: UNLESS OTHERWISE SPECIFIED  
A) THIS PACKAGE CONFORMS TO  
JEDEC MS-001 VARIATION BA  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH, AND TIE BAR EXTRUSIONS.  
D) DIMENSIONS AND TOLERANC  
ASME Y14.5M-1994  
ES PER  
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.  
Figure 18. 8-Pin, DIP-8 Package  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
12  
Physical Dimensions (Continued)  
Figure 19. 6-Pin SSOT-6 Package  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
13  
© 2008 Fairchild Semiconductor Corporation  
FAN400C • Rev. 1.0.1  
www.fairchildsemi.com  
14  

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FAIRCHILD

FAN4040

Precision Micropower Shunt Voltage Reference
FAIRCHILD

FAN4040-2.5

Precision Micropower Shunt Voltage Reference
FAIRCHILD

FAN4040-3.3

Precision Micropower Shunt Voltage Reference
FAIRCHILD