FAN7080MX_12 [FAIRCHILD]
Half Bridge Gate Driver; 半桥栅极驱动器型号: | FAN7080MX_12 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Half Bridge Gate Driver |
文件: | 总17页 (文件大小:455K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
September 2012
FAN7080_GF085
Half Bridge Gate Driver
Features
Description
•
Qualified to AEC Q100
The FAN7080_GF085 is a half-bridge gate drive IC with reset
input and adjustable dead time control. It is designed for high
voltage and high speed driving of MOSFET or IGBT, which
operates up to 600V. Fairchild's high-voltage process and com-
mon-mode noise cancellation technique provide stable opera-
tion in the high side driver under high-dV/dt noise
circumstances. An advanced level-shift circuit allows high-side
gate driver operation up to VS=-5V (typical) at VBS=15V. Logic
input is compatible with standard CMOS outputs. The UVLO cir-
cuits for both channels prevent from malfunction when VCC and
VBS are lower than the specified threshold voltage. Combined
pin function for dead time adjustment and reset shutdown make
this IC packaged with space saving SOIC-8 Package. Minimum
source and sink current capability of output driver is 250mA and
500mA respectively, which is suitable for junction box applica-
tion and half and full bridge application in the motor drive sys-
tem.
•
Floating channel designed for bootstrap operation fully oper-
ational to + 600V
•
•
•
•
•
•
•
Tolerance to negative transient voltage on VS pin
VS-pin dv/dt immune.
Gate drive supply range from 5.5V to 20V
Under-voltage lockout
CMOS Schmitt-triggered inputs with pull-down
High side output in phase with input
IN input is 3.3V/5V logic compatible and available on 15V
input
•
•
Matched propagation delay for both channels
Dead time adjustable
SOIC-8
Typical Applications
•
Junction Box
•
Half and full bridge application in the motor drive system
For Fairchild’s definition of “green” Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html
Ordering Information
Operating
Temp.
Device
Package
FAN7080M_GF085
SOIC-8
-40 C ~ 125 C
-40 C ~ 125 C
FAN7080MX_GF085 SOIC-8
X : Tape & Reel type
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
1
www.fairchildsemi.com
Block Diagrams
VCC
VB
UVLO
R
R
S
vreg
Q
HO
VS
PULSE
FILTER
PULSE
GENERATOR
IN
DEADTIME
CONTROL
500kΩ
vreg
VCC
VCC
UVLO
SD/DT
LO
DELAY
500kΩ
COM
Pin Assignments
1
2
8
7
VB
VCC
IN
HO
3
4
6
5
VS
LO
SD/DT
COM
Pin Definitions
Pin Number
Pin Name
VCC
IN
I/O
P
I
Pin Function Description
1
2
3
4
5
6
7
8
Driver supply voltage
Logic input for high and low side gate drive output
Shut down input and dead time setting
Ground
SD/DT
COM
LO
I
P
A
A
A
P
Low side gate drive output for MOSFET Gate connection
High side floating offset for MOSFET Source connection
High side drive output for MOSFET Gate connection
Driver output stage supply
VS
HO
VB
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
2
www.fairchildsemi.com
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are abso-
lute voltages referenced to COM.
Parameter
High side floating supply offset voltage
High side floating supply voltage
High side floating output voltage
Low side output voltage
Symbol
VS
Min.
VB-25
-0.3
Max.
VB+0.3
625
Unit
V
VB
V
VHO
VLO
VCC
VIN
Vs-0.3
-0.3
VB+0.3
VCC + 0.3
25
V
V
Supply voltage
-0.3
V
Input voltage for IN
-0.3
Vcc+0.3
+1
V
Input injection current. Full function, no latch
up;(Guaranteed by design). Test at 10V and
17V on Eng.Samples
IIN
-
mA
Power Dissipation
Pd
0.625
200
W
C/W
V
Thermal resistance, junction to ambient
Rthja
VESD
Electrostatic discharge voltage
(Human Body Model)
1K
Charge device model
Junction Temperature
Storage Temperature
VCDM
Tj
500
V
150
150
C
C
TS
-55
Note: 1) The thermal resistance and power dissipation rating are measured bellow conditions;
JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural convection(StillAir)
JESD51-3 : Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Parameter
Symbol
Min.
Max.
Unit
High side floating supply voltage(DC)
Transient:-10V@ 0.1 us
VB 1)
VS + 6
VS + 20
V
High side floating supply offset voltage(DC)
Transient: -25V(max) @0.1us @VBS<25V
VS
-5
600
V
High side floating output voltage
Low side output voltage
VHO
VLO
dv/dt
VCC
VIN
Fs
Vs
0
VB
VCC
50
V
V
2)
Allowable offset voltage Slew Rate
-
V/ns
V
Supply voltage for logic part
Logic input voltage
5.5
0
20
Vcc
200
125
V
3)
Switching Frequency
KHz
C
Ambient Temperature
Ta
-40
Note: 1) The Vs offset is tested with all supplies biased at 15V differential.
2) Guaranteed by design.
3) When VDT= 1.2V.
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
3
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Statics Electrical Characteristics
Unless otherwise specified, -40°C <= Ta <=125°C, VCC = 15V, VBS = 15V, VS = 0V, CL = 1nF.
Parameter
Symbol
Conditions
Min.
Typ. Max. Unit
Vcc and VBS supply Characteristics
VCC and VBS supply under voltage
positive going threshold
VCCUV+
VBSUV+
-
-
-
-
4.2
3.6
0.6
5.5
V
V
V
VCC and VBS supply under voltage
negative going threshold
VCCUV-
VBSUV-
2.8
0.2
-
-
VCC and VBS supply under voltage
hysteresis
VCCUVH
VBSUVH
Under voltage lockout response time
tduvcc
tduvbs
VCC: 6V-->2.5V or 2.5V-->6V
VBS: 6V-->2.5V or 2.5V-->6V
0.5
0.5
-
-
20
20
us
us
Offset supply leakage current
ILK
VB=VS=600V
-
20
-
20
75
50
uA
uA
uA
Quiescent VBS supply current
Quiescent Vcc supply current
IQBS
IQCC
VIN=0 OR 5V, VSDT = 1.2V
VIN=0 OR 5, VSDT = 1.2V
150
350
1000
Input Characteristics
High logic level input voltage
VIH
VIL
2.7
-
-
-
0.8
50
2
V
V
Low logic level input voltage
-
High logic level input bias current for IN
Low logic level input bias current for IN
VSDT dead time setting range
VSDT shutdown threshold voltage
High logic level resistance for SD/DT
Low logic level input bias current for SD/DT
Output characteristics
IIN+
VIN=5V
VIN=0V
-
-
10
0
uA
uA
V
IIN-
VDT
VSD
RSDT
ISDT-
1.2
-
-
5
0.8
500
1
1.2
1100
2
V
VSDT=5V
VSDT=0V
100
-
K
uA
High level output voltage, VCC-VHO
Low level output voltage, VHO
Output high short circuit pulse current
Output low short circuit pulse current
Equivalent output resistance
VOH(HO)
VOL(HO)
IO+(HO)
IO-(HO)
IO=0
IO=0
-
-
0.1
0.1
-
V
V
-
-
250
300
mA
mA
500
600
-
ROP(HO)
RON(HO)
VOH(LO)
VOL(LO)
IO+(LO)
-
-
-
-
-
-
-
-
-
60
30
0.1
0.1
-
-
High level output voltage, VB-VLO
Low level output voltage, VLO
IO=0
IO=0
-
V
-
250
500
-
V
Output high short circuit pulse current
Output low short circuit pulse current
Equivalent output resistance
mA
mA
IO-(LO)
-
ROP(LO)
RON(LO)
60
30
-
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
4
www.fairchildsemi.com
Dynamic Electrical Characteristics
Unless otherwise specified, -40°C <= Ta <=125°C, VCC = 15V, VBS = 15V, VS = 0V, CL = 1nF.
Parameter
Turn-on propagation delay
Turn-off propagation delay
Turn -on rising time
Symbol
Conditions
Min.
Typ. Max. Unit
ton
toff
tr
VS=0V
-
-
-
-
750
130
40
1500
250
150
400
ns
ns
ns
ns
ns
VS=0V
-
-
Turn -off falling time
tf
25
Dead time, LS turn-off to HS turn-on
and HS turn-on to LS turn-off
DT
VIN=0 or 5V@ VDT=1.2V
VIN=0 or 5V@ VDT=3.3V
250
1600
650
1200
2600
2100
Dead time matching time
MDT
DT1 -DT2@ VDT=1.2V
DT1 -DT2@ VDT=3.3V
-
-
35
-
110
300
ns
Delay Matching, HS and LS turn-on
Delay Matching, HS and LS turn-off
Shutdown propagation delay
Switching Frequency
MTON
MTOFF
Tsd
VDT=1.2V
VDT=1.2V
25
15
180
-
110
60
ns
ns
-
-
-
330
200
200
ns
Fs1
VCC=VBS=20V
VCC=VBS=5.5V
KHz
KHZ
Fs2
-
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
5
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Typical Application Circuit
Up to 600V
VCC
1
2
8
7
VB
VCC
IN
IN
HO
To Load
R1
VDT
3
4
6
5
VS
LO
SD/DT
COM
SHUTDOWN
/DEAD TIME
R2
VDT = Vdd*R2 / (R1+R2). Vdd is output voltage of Microcontroller.
The operating range that allows a VDT range of 1.2~3.3V.
When pulled lower than VDT [Typ. 0.5V] the device is shutdown.
Care must be taken to avoid below threshold spikes on pin 3 that can cause undesired shut down of the IC.
For this reason the connection of the components between pin 3 and ground has to be as short as possible.
And a capacitor (Typ 0.02uF )between pin3 and COM can prevent this spike. This pin can not be left
floating for the same reason.
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
6
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Typical Waveforms
VCC=VBS=15V, -40C < tj < 125C
3000
2500
2000
1500
1000
500
Max.
Typ.
IN
SD/DT
0
1.0
1.5
2.0
2.5
3.0
3.5
HO
LO
VDT, Deadtime Voltage(V)
Figure 1. Input/output Timing Diagram
Figure 2. Dead Time VS VDT
SD
IN(LO)
50%
50%
tr
50%
toff
IN(HO)
ton
tsd
t
f
90%
HO
LO
90%
90%
LO
HO
10%
10%
Figure 4. Shutdown Waveform Definitions
Figure 3. Switching Time Waveform Definitions
PWM(LO)
50%
50%
PWM(HO)
50%
50%
IN
LO
HO
90%
10%
HO
LO
10%
MTON
MTOFF
HO
DT1
DT2
90%
90%
10%
LO
Figure 5. Delay Matching Waveform Definitions
Figure 6. Dead Time Waveform Definitions
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
7
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Performance Graphs (This performance graphs based on ambient temperature -40C ~125C)
1500
1400
1300
1200
1100
1000
900
1800
1500
1200
900
VCC=VBS=15V, CL=1nF
VCC=15V, CL=1nF, ta=25C
Max.
Max.
Typ.
Typ.
800
700
600
500
10
600
-50
12
14
16
18
20
-25
0
25
50
75
100
125
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 7a. Turn-On Delay Time of HO vs VBS Temperature
Figure 7b. Turn-On Delay Time of HO vs VBS Supply Voltage
1800
1500
VCC=VBS=15V, CL=1nF
VCC=15V, CL=1nF, ta=25C
1400
1300
1200
1100
1000
900
1500
Max.
1200
Max.
Typ.
800
900
Typ.
700
600
600
-50
500
10
-25
0
25
50
75
100
125
12
14
16
18
20
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 8a. Turn-On Delay Time of LO vs Temperature
Figure 8b. Turn-On Delay Time vs of LO VBS Supply Voltage
500
500
VCC=VBS=15V, CL=1nF
400
VCC=15V, CL=1nF, ta=25C
400
300
300
Max.
Max.
200
200
Typ.
Typ.
100
100
0
10
0
-50
12
14
16
18
20
-25
0
25
50
75
100
125
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 9a. Turn-Off Delay Time of HO vs Temperature
Figure 9b. Turn-Off Delay Time of HO vs VBS Supply Voltage
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
8
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500
400
300
200
100
0
500
400
300
200
100
0
VCC=VBS=15V, CL=1nF
VCC=15V, CL=1nF, ta=25C
Max.
Typ.
Max.
Typ.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 10a. Turn-Off Delay Time of LO vs Temperature
Figure 10b. Turn-Off Delay Time of LO vs VBS Supply Voltage
250
200
VCC=VBS=15V, CL=1nF
150
VCC=15V, CL=1nF, ta=25C
200
150
Max.
Max.
100
100
Typ.
50
Typ.
50
0
10
0
-50
12
14
16
18
20
-25
0
25
50
75
100
125
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 11a. Turn-On Rise Time of HO vs Temperature
Figure 11b. Turn-On Rise Time vs of HO VBS Supply Voltage
250
200
VCC=VBS=15V, CL=1nF
150
VCC=15V, CL=1nF, ta=25C
200
150
Max.
Max.
100
100
Typ.
50
50
Typ.
0
10
0
-50
12
14
16
18
20
-25
0
25
50
75
100
125
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 12a. Turn-On Rise Time of LO vs Temperature
Figure 12b. Turn-On Rise Time of LO vs VBS Supply Voltage
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
9
www.fairchildsemi.com
250
200
150
100
50
150
100
50
VCC=VBS=15V, CL=1nF
VCC=15V, CL=1nF, ta=25C
Max.
Max.
Typ.
Typ.
0
10
0
-50
12
14
16
18
20
-25
0
25
50
75
100
125
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 13a. Turn-Off Fall Time of HO vs Temperature
Figure 13b. Turn-Off Fall Time of HO vs VBS Supply Voltage
250
150
VCC=VBS=15V, CL=1nF
VCC=15V, CL=1nF, ta=25C
200
100
150
100
Max.
50
Max.
50
Typ.
Typ.
0
10
0
-50
12
14
16
18
20
-25
0
25
50
75
100
125
Temperature(oC)
VBIAS Supply Voltage(V)
Figure 14a. Turn-Off Fall Time of LO vs Temperature
Figure 14b. Turn-Off Fall Time of LO vs BS Supply Voltage
Min.
Min.
0
1
0
1
2
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
2
3
o
4
5
o
Temperature( C)
3
4
5
Temperature( C)
Figure 15a. Logic 0 Input Voltage vs Temperature
Figure 15b. Logic 1 Input Voltage vs Temperature
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
10
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0.5
0.4
0.3
0.2
0.1
0.0
0.5
0.4
0.3
0.2
0.1
0.0
VCC=VBS=15V
VCC=15V, ta=25C
Max.
Max.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
125
125
Temperature(oC)
VBS Supply Voltage(V)
Figure 16a. High Level Output of HO vs Temperature
Figure 16b. High Level Output of HO vs VBS Supply Voltage
0.5
0.5
VCC=VBS=15V
VCC=15V, ta=25C
0.4
0.3
0.2
0.4
0.3
0.2
Max.
Max.
0.1
0.1
0.0
0.0
-50
10
12
14
16
18
20
-25
0
25
50
75
100
Temperature(oC)
VCC Supply Voltage(V)
Figure 17a. High Level Output of LO vs Temperature
Figure 17b. High Level Output of LO vs VCC Supply Voltage
0.5
0.5
VCC=VBS=15V
0.4
0.3
0.2
0.4
0.3
0.2
Max.
Max.
0.1
0.1
0.0
-50
0.0
-25
0
25
50
75
100
10
12
14
16
18
20
Temperature(oC)
VBS Supply Voltage(V)
Figure 18a. Low Level Output of HO vs Temperature
Figure 18b. Low Level Output of HO vs VBS Supply Voltage
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
11
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0.5
0.4
0.3
0.2
0.1
0.0
0.5
0.4
0.3
0.2
0.1
0.0
VCC=VBS=15V
VCC=15V, ta=25C
Max.
Max.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature(oC)
VCC Supply Voltage(V)
Figure 19a. Low Level Output of LO vs Temperature
Figure 19b. Low Level Output of LO vs VCC Supply Voltage
200
500
VB=VS=600V
VCC=15V, ta=25C
160
120
80
400
300
200
40
100
Max.
Max.
0
-50
0
-25
0
25
50
75
100
125
0
100
200
300
400
500
600
Temperature(oC)
VB Boost Voltage (V)
Figure 20a. Offset Supply leakage Current vs Temperature
Figure 20b. Offset Supply leakage Current vs VB Boost Voltage
200
1200
VBS=15V
VCC=15V
Max.
1000
Max.
150
800
600
400
100
Typ.
50
Typ.
200
0
-50
0
-50
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 21. VBS Supply Current vs Temperature
Figure 22. VCC Supply Current vs Temperature
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
12
www.fairchildsemi.com
5
4
3
2
1
0
80
70
60
50
40
30
20
10
0
VIN=5V
VIN=5V
Max.
Max.
Typ.
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature(oC)
Temperature (oC)
Figure 23a. Logic 1 Input Current vs Temperature
Figure 23b. Logic 0 Input Current vs Temperature
8
7
6
5
4
3
2
6
max
5
Typ
min
4
Typ
3
2
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 24a. VCC UnderVoltage Threshold (+) vs Temperature
Figure 24b. VCC UnderVoltage Threshold(-) vs Temperature
8
7
6
5
6
max
5
4
Typ
4
Typ
3
min
3
2
2
-50
-50
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 25a. VBS UnderVoltage Threshold (+) vs Temperature
Figure 25b.VBS UnderVoltage Threshold(-) vs Temperature
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
13
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600
500
400
300
200
100
0
1000
800
600
400
200
0
VCC=VBS=15V
VCC=VBS=15V
Typ.
Min.
Typ.
Min.
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 26a. Output Source Current of HO vs Temperature
Figure 26b. Output Sink Current of HO vs Temperature
600
1000
VCC=VBS=15V
VCC=VBS=15V
500
Typ.
800
Typ.
400
Min.
600
Min.
300
400
200
0
200
100
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 27a. Output Source Current of LO vs Temperature
Figure 27b. Output Sink Current of LO vs Temperature
5
4
3
2.0
1.5
1.0
0.5
0.0
Max.
2
1
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature(oC)
Temperature (oC)
Figure 28. Logic 0 Input Current of SD/DT vs Temperature
Figure 29.Shutdown Threshold of vs Temperature
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
14
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1500
1200
900
150
120
90
60
30
0
VCC=VBS=15V, VDT=1.2V
VCC=VBS=15V, VDT=1.2V
Max.
Max.
Typ.
Typ.
600
300
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature(oC)
Temperature(oC)
Figure 30. Deadtime vs Temperature
Figure 31. Deadtime Matching Time vs Temperature
150
80
VCC=VBS=15V, VDT=1.2V
VCC=VBS=15V, VDT=1.2V
120
90
60
30
0
60
40
20
0
Max.
Max.
Typ.
Typ.
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature(oC)
Temperature(oC)
Figure 32. Turn-On Delay Matching vs Temperature
Figure 33. Turn_Off Delay Matching vs Temperature
500
450
400
350
300
250
200
-6
-7
-8
VCC=VBS=15V
-9
-10
-11
-12
-13
-14
-15
Typ.
Typ.
150
100
50
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature(oC)
Temp(oC)
Figure 34. Shutdown Propagation Delay vs Temperature
Figure35. Maximum VS Negtive Offset of vs Temperature
©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
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www.fairchildsemi.com
Package Dimensions
5.00
4.80
A
0.65
3.81
8
5
B
1.75
6.20
5.80
4.00
3.80
5.60
1
4
PIN ONE
INDICATOR
1.27
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
0.25
0.19
C
1.75 MAX
0.10
C
0.51
0.33
OPTION A - BEVEL EDGE
0.50
x 45°
GAGE PLANE
0.25
R0.10
R0.10
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0°
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
SEATING PLANE
0.90
(1.04)
0.406
DETAIL A
SCALE: 2:1
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©2012 Fairchild Semiconductor Corporation
FAN7080_GF085 Rev. 1.0.1
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www.fairchildsemi.com
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Definition of Terms
Datasheet
Product Status
Definition
Identification
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
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First Production
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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Full Production
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The datasheet is for reference information only.
Not In Production
Rev. I43
©2012 Fairchild Semiconductor Corporation
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www.fairchildsemi.com
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