FAN7382N [FAIRCHILD]
Half-Bridge Gate Driver; 半桥栅极驱动器型号: | FAN7382N |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Half-Bridge Gate Driver |
文件: | 总15页 (文件大小:403K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
January 2007
FAN7382
Half-Bridge Gate-Driver IC
Features
Description
Floating Channels Designed for Bootstrap Operation
The FAN7382, a monolithic half-bridge gate-driver IC,
can drive MOSFETs and IGBTs that operate up to
+600V. Fairchild’s high-voltage process and common-
mode noise canceling technique provides stable opera-
tion of the high-side driver under high-dv/dt noise circum-
stances. An advanced level-shift circuit allows high-side
gate driver operation up to VS=-9.8V (typical) for
VBS=15V. The input logic level is compatible with stan-
dard TTL-series logic gates. UVLO circuits for both chan-
nels prevent malfunction when VCC or VBS is lower than
the specified threshold voltage. Output drivers typically
source/sink 350mA/650mA, respectively, which is suit-
able for fluorescent lamp ballasts, PDP scan drivers,
motor controls, etc.
to +600V
Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
Common-Mode dv/dt Noise Canceling Circuit
Extended Allowable Negative VS Swing to -9V for
Signal Propagation at VCC=VBS=15V
VCC & VBS Supply Range from 10V to 20V
UVLO Functions for Both Channels
TTL Compatible Input Logic Threshold Levels
Matched Propagation Delay Below 50nsec
Output In-phase with Input
Applications
PDP Scan Driver
Fluorescent Lamp Ballast
SMPS
8-SOP
8-DIP
14-SOP
Motor Driver
Ordering Information
Part Number
FAN7382N
FAN7382M(1)
FAN7382MX(1)
FAN7382M1(1)
FAN7382M1X(1)
Package
Pb-Free
Operating Temperature Range Packing Method
8-DIP
Tube
Tube
8-SOP
Yes
-40°C ~ 125°C
Tape & Reel
Tube
14-SOP
Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
Typical Application Circuit
DB
Up to 600V
VB
VCC
8
CBS
1
VCC
2
7
HIN
HO
4
COM
6
5
VS
LOAD
3
LO
LIN
FAN7382 Rev.04
Figure 1. Application Circuit for Half-Bridge
Internal Block Diagram
HIGH-SIDE DRIVER
VB
LEVEL
SHIFTER
UVLO
HO
VS
R
S
R
NOISE
CANCELLER
Q
DELAY
HIN
PULSE
GENERATION
500kΩ
LOW-SIDE DRIVER
VCC
UVLO
i
DELAY
LO
LIN
DELAY
COM
500kΩ
FAN7382 Rev.03
Figure 2. Functional Block Diagram
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
2
Pin Assignments
FAN7382N
FAN7382M
FAN7382M1
VB
1
2
3
4
8
7
6
5
NC
VB
1
2
3
4
5
6
7
14
13
12
11
10
9
VCC
HIN
VCC
HIN
HO
VS
HO
VS
LIN
LIN
NC
NC
LO
COM
FAN7382 Rev.04
NC
NC
NC
COM
LO
8
FAN7382 Rev.00
Figure 3. Pin Configuration (Top View)
Pin Definitions
Name
Description
VCC
HIN
LIN
COM
LO
Low-Side Supply Voltage
Logic Input for High-Side Gate Driver Output
Logic Input for Low-Side Gate Driver Output
Logic Ground and Low-Side Driver Return
Low-Side Driver Output
VS
High-Voltage Floating Supply Return
High-Side Driver Output
HO
VB
High-Side Floating Supply
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Symbol
VS
Characteristics
High-side offset voltage
Min.
VB-25
-0.3
Max.
VB+0.3
625
Unit
VB
High-side floating supply voltage
High-side floating output voltage HO
Low-side and logic fixed supply voltage
Low-side output voltage LO
Logic input voltage (HIN, LIN)
Logic ground
VHO
VS-0.3
-0.3
VB+0.3
25
VCC
V
VLO
-0.3
VCC+0.3
VCC+0.3
VCC+0.3
50
VIN
-0.3
COM
dVS/dt
VCC-25
Allowable offset voltage slew rate
V/nsec
W
8-SOP
14-SOP
8-DIP
0.625
1.0
PD
Power dissipation
1.2
8-SOP
14-SOP
8-DIP
200
θJA
Thermal resistance, junction-to-ambient
110
°C/W
100
TJ
Junction temperature
Storage temperature
150
°C
°C
TSTG
150
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
4
Electrical Characteristics
VBIAS (VCC, VBS)=15.0V, TA = 25°C, unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and VS is applicable to HO and LO.
Symbol
Characteristics
Test Condition
Min. Typ. Max. Unit
VCCUV+ VCC and VBS supply under-voltage
VBSUV+ positive going threshold
8.2
7.6
9.2
8.7
0.6
10.0
9.6
VCCUV- VCC and VBS supply under-voltage
VBSUV- negative going threshold
V
VCCUVH VCC supply under-voltage lockout
VBSUVH hysteresis
ILK
IQBS
IQCC
IPBS
IPCC
VIH
Offset supply leakage current
Quiescent VBS supply current
Quiescent VCC supply current
Operating VBS supply current
Operating VCC supply current
Logic "1" input voltage
VB=VS=600V
50
VIN=0V or 5V
45
70
120
180
600
600
µA
µA
VIN=0V or 5V
fIN=20kHz,rms value
fIN=20kHz,rms value
2.9
VIL
Logic "0" input voltage
0.8
1.0
0.6
20
V
VOH
VOL
IIN+
IIN-
High-level output voltage, VBIAS-VO
Low-level output voltage, VO
Logic "1" input bias current
Logic "0" input bias current
Output high short-circuit pulsed current
IO=20mA
VIN=5V
VIN=0V
10
1.0
350
µA
2.0
IO+
VO=0V,VIN=5V with PW<10µs 250
mA
V
VO=15V=VB,VIN=0V with
PW<10µs
IO-
VS
Output low short-circuit pulsed current
500
650
-9.8
Allowable negative VS pin voltage for
HIN signal propagation to HO
-7.0
Dynamic Electrical Characteristics
VBIAS (VCC, VBS)=15.0V, VS=COM, CL=1000pF and, TA = 25°C, unless otherwise specified.
Symbol
Characteristics
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Test Condition
VS=0V
Min. Typ. Max. Unit
ton
toff
tr
100
100
20
170
200
60
300
300
140
80
VS=0V or 600V
nsec
tf
Turn-off fall time
30
MT
Delay matching, HS & LS turn-on/off
50
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
5
Typical Characteristics
300
275
250
225
200
175
150
125
100
75
300
VCC=VBS=15V
V=VBS
CC
COM=0V
COM=0V
CL=1nF
C =1nF
250
200
150
100
L
TA=25°C
High-Side
High-Side
Low-Side
Low-Side
50
-40
-20
0
20
40
60
80
100
120
10
12
14
16
18
20
Temperature[°C]
Supply Voltage [V]
Figure 4. Turn-On Propagation Delay vs.
Supply Voltage
Figure 5. Turn-On Propagation Delay vs. Temp.
300
280
260
240
220
200
180
160
140
120
100
300
VCC=V
BS
COM=0V
V
=V =15V
275
250
225
200
175
150
125
CCBS
COM=0V
CL=1nF
CL=1nF
TA=25°C
High-Side
High-Side
Low-Side
Low-Side
-40
-20
0
20
40
60
80
100
120
10
12
14
16
18
20
Supply Voltage [V]
Temperature [°C]
Figure 6. Turn-Off Propagation Delay vs.
Supply Voltage
Figure 7. Turn-Off Propagation Delay vs. Temp.
64
62
60
58
56
54
52
50
48
46
44
42
80
75
VCC=V
VCC=VBS=15V
COM=B0SV
70
COM=0V
65
CL=1nF
CL=1nF
60
TA=25°C
55
Low-Side
50
45
40
High-Side
Low-Side
35
30
25
20
15
10
5
High-Side
0
-40
-20
0
20
40
60
80
100
120
10
11
12
13
14
15
16
17
18
19
20
Supply Voltage [V]
Temperature [°C]
Figure 9. Turn-On Rising Time vs. Temp.
Figure 8. Turn-On Rising Time vs. Supply Voltage
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
6
Typical Characteristics (Continued)
50
45
40
35
30
25
20
15
10
34
VCC=V
COM=0V
VCC=VBS=15V
BS
32
30
28
26
24
22
20
18
16
COM=0V
CL=1nF
CL=1nF
TA=25°C
High-Side
High-Side
Low-Side
Low-Side
-40
-20
0
20
40
60
80
100
120
10
11
12
13
14
15
16
17
18
19
20
Temperature [°C]
Figure 11. Turn-Off Falling Time vs. Temp.
Supply Voltage [V]
Figure 10. Turn-Off Falling Time vs. Supply Voltage
600
440
420
400
380
360
340
320
300
280
V
=V =15V
BS
V
=V
CC
550
500
450
400
350
300
250
200
150
100
CC
BS
COM=0V
COM=0V
LO=HO=0V
LO=HO=0V
TA=25°C
High-Side
High-Side
Low-Side
Low-Side
-40
-20
0
20
40
60
80
100
120
10
12
14
16
18
20
Supply Voltage [V]
Temperature [°C]
Figure 12. Output Sourcing Current vs. Supply
Voltage
Figure 13. Output Sourcing Current vs. Temp
900
850
V
=V
V
=V =15V
BS
CC
BS
CC
800
750
700
650
600
550
500
COM=0V
800
700
600
500
400
300
COM=0V
LO=VCC, HO=VB
LO=V , HO=VB
CC
TA=25°C
Low-Side
High-Side
High-Side
Low-Side
-40
-20
0
20
40
60
80
100
120
10
12
14
16
18
20
Supply Voltage [V]
Temperature [°C]
Figure 15. Output Sinking Current vs. Temp.
Figure 14. Output Sinking Current vs. Supply Voltage
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
7
Typical Characteristics (Continued)
-9.0
-9.2
-4
VCC=VBS
V
=V =15V
CCBS
COM=0V
COM=0V
-6
-8
TA=25°C
-9.4
-9.6
-10
-12
-14
-16
-18
-9.8
-10.0
-10.2
-10.4
10
12
14
16
18
20
-40
-20
0
20
40
60
80
100
120
Supply Voltage [V]
Temperature [°C]
Figure 16. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Supply Voltage
Figure 17. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temp.
100
95
V
=15V
VCC=VBS=15V
90
85
80
75
70
65
60
55
50
45
BS
COM=0V
COM=0V
80
60
40
20
0
HIN=LIN=0V
HIN=LIN=0V
TA=25°C
-40
-20
0
20
40
60
80
100
120
0
5
10
15
20
Supply Voltage [V]
Temperature [°C]
Figure 18. IQCC vs. Supply Voltage
Figure 19. IQCC vs. Temp.
80
70
60
50
40
30
20
10
0
52
VCC=15V
V
=15V
CC
COM=0V
50
48
46
44
42
40
38
36
COM=0V
HIN=LIN=0V
HIN=LIN=0V
TA=25°C
0
5
10
15
20
-40
-20
0
20
40
60
80
100
120
Supply Voltage [V]
Temperature [°C]
Figure 21. IQBS vs. Temp.
Figure 20. IQBS vs. Supply Voltage
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
8
Typical Characteristics (Continued)
0.7
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
VCC=VBS=15V
VCC=V
BS
COM=0V
COM=0V
0.6
0.5
0.4
0.3
0.2
HIN=LIN=5V
HIN=LIN=5V
I =20mA
IL=20mA
L
TA=25°C
Low-Side
High-Side
High-Side
Low-Side
-40
-20
0
20
40
60
80
100
120
120
120
10
12
14
16
18
20
Supply Voltage [V]
Temperature [°C]
Figure 22. High-Level Output Voltage vs.
Supply Voltage
Figure 23. High-Level Output Voltage vs. Temp.
0.22
V
=V =15V
BS
0.18
CC
VCC=V
BS
COM=0V
COM=0V
0.20
0.18
0.16
0.14
0.12
0.10
HIN=LIN=0V
HIN=LIN=0V
0.17
IL=20mA
IL=20mA
0.16
0.15
0.14
0.13
0.12
High-Side
TA=25°C
Low-Side
High-Side
Low-Side
-40
-20
0
20
40
60
80
100
10
12
14
16
18
20
Temperature [°C]
Supply Voltage [V]
Figure 24. Low-Level Output Voltage vs.
Supply Voltage
Figure 25. Low-Level Output Voltage vs. Temp.
16
40
HIN=LIN=5V
VCC=VBS
35
30
25
20
15
10
5
14
COM=0V
IN=V or IN=0V
CC
12
TA=25°C
LIN
IN+
10
HIN
8
6
4
IN-
0
-40
-20
0
20
40
60
80
100
0
5
10
15
20
Temperature [°C]
Figure 27. Input Bias Current vs. Temp.
Supply Voltage [V]
Figure 26. Input Bias Current vs. Supply Voltage
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
9
Typical Characteristics (Continued)
10.0
9.8
10.0
9.8
9.6
9.4
9.2
9.0
8.8
8.6
8.4
8.2
8.0
9.6
VSBUV+
V
CCUV+
9.4
9.2
9.0
VSBUV-
VCCUV-
8.8
8.6
8.4
8.2
8.0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 28. VCC UVLO Threshold Voltage vs. Temp.
Figure 29. VBS UVLO Threshold Voltage vs. Temp.
5
3.4
V
=V =15V
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VB-to-COM=650V
CC
BS
COM=0V
VIH(LIN)
VIH(HIN)
4
3
2
1
0
VIL(LIN)
VIL(HIN)
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 31. Input Logic Threshold Voltage vs. Temp.
Figure 30. VB to COM Leakage Current vs. Temp.
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
10
Typical Characteristics (Continued)
10μF
100nF
100nF 10μF
1
8
15VDC
15VDC
VCC
VB
4
6
VS
COM
1nF
HIN
LIN
HO 7
LO 5
2
3
HIN
LIN
1nF
FAN7382
HO
LO
FAN7382 Rev.04
FAN7382 Rev.03
Figure 32. Switching Time Test Circuit
Figure 33. Input / Output Timing Diagram
ton : Turn-on Delay Time
toff : Turn-off Delay Time
tr : Turn-on Rise Time
tf : Turn-off Fall Time
50%
50%
HIN
LIN
50%
LO
50%
HIN
LIN
toff
ton
tr
tf
MT
HO
10%
ton-H
toff-H
toff-L
90%
ton-L
90%
90%
HO
LO
LO
HO
MT
10%
10%
FAN7382 Rev.03
FAN7382 Rev.03
Figure 34. Switching Time Waveform Definition
Figure 35. Delay Matching Waveform Definition
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
11
Mechanical Dimensions
8-SOP
Dimensions are in millimeters (inches) unless otherwise noted.
0.1~0.25
0.004~0.001
MIN
1.55 0.20
0.061 0.008
#8
#5
#1
#4
6.00 0.30
0.236 0.012
1.80
0.071
MAX
3.95 0.20
0.156 0.008
5.72
0.225
0.50 0.20
0.020 0.008
September 2001, Rev B1
sop8_dim.pdf
Figure 36. 8-Lead Small Outline Package
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
12
Mechanical Dimensions (Continued)
8-DIP
Dimensions are in millimeters (inches) unless otherwise noted.
6.40 0.20
0.252 0.008
#1
#4
#8
#5
3.30 0.30
0.130 0.012
5.08
0.200
MAX
7.62
0.300
3.40 0.20
0.134 0.008
0.33
0.013
MIN
September 1999, Rev B
8dip_dim.pdf
Figure 37. 8-Lead Dual Inline Package
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
13
Mechanical Dimensions (Continued)
14-SOP
Dimensions are in millimeters (inches) unless otherwise noted.
0.05
0.002
MIN
1.55 0.10
0.061 0.004
#14
#1
#8
#7
6.00 0.30
0.236 0.012
1.80
MAX
0.071
3.95 0.20
0.156 0.008
5.72
0.225
0.60 0.20
0.024 0.008
January 2001, Rev. A
14sop225b_dim.pdf
Figure 38. 14-Lead Small Outline Package
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
14
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Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to
improve design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild semiconductor. The datasheet is printed for
reference information only.
Rev. I22
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.7
www.fairchildsemi.com
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