FAN7585 [FAIRCHILD]
Intelligent Voltage Mode PWM IC; 智能型电压模式PWM IC
| 型号： | FAN7585 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Intelligent Voltage Mode PWM IC |
| 文件： | 总16页 (文件大小：438K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN7585
Intelligent Voltage Mode PWM IC
Features
Description
• Complete PWM Control and House Keeping Circuitry
• Few External Components
The FAN7585 is a fixed frequency improved performance
pulse width modulation control circuit with complete house-
keeping circuitry for use in the secondary side of SMPS
(Switched Mode Power Supply). It contains various func-
tions, which are overvoltage protection, undervoltage protec-
tion, over current protection, remote on/off control, power
good signal generator, etc.
• Precision Voltage Reference Trimmed to 2%
• Dual Output for Push-Pull Operation
• Each Output TR for 200mA Sink Current
• Variable Duty Cycle by Dead Time Control
• Soft Start Capability by Using Dead Time Control
• Double Pulse Suppression Logic
OVP (Over Voltage Protection) Section
• Over Voltage Protection for 3.3V/5V/12V
• Under Voltage Protection for 3.3V/5V/12V
• Over Current Protection for 3.3V/5V/12V
• One More External Input for Various Protection (PT)
• Remote On/Off Control Function (PS-ON)
• Latch Function Controlled by Remote and Protection
Input
It has OVP functions for +3.3V,+5V,+12V outputs and PT.
The circuit is made up of a comparator with four detecting
inputs and without hysteresis voltage. Especially, PT (Pin19)
is prepared for an extra OVP input or another protection
signal.
• Power Good Signal Generator with Hysteresis
UVP (Under Voltage Protection) Section
It also has UVP functions for +3.3V, +5V, +12V outputs. The
block is made up of a comparator with three detecting inputs
and without hysteresis voltage.
Typical Application
OCP (Over Current Protection) Section
• PC Power Supply
It has precision OCP functions for +3.3V, +5V, +12V out-
puts. The block is made up of three comparators with current
source setting function. Two inputs of each OCP comparator
are connected to both sides of current sensing inductor that is
located in the secondary output of SMPS.
Remote On/Off Section
The remote on/off section is used to control SMPS exter-
nally. If a high signal or open state is supplied to the remote
on/off input, PWM signal becomes a high state and all sec-
ondary outputs are grounded. The remote on/off signal is
transferred with some on-delay and off-delay time of 8ms,
24ms respectively.
24-SDIP
Precision Reference Section
The reference voltage is trimmed to ±2%.
(4.9V ≤ Vref ≤ 5.1V)
1
PG (Power Good Signal Generator) Section
The power good signal generator is to monitor the voltage
level of power supply for safe operation of a microprocessor
having some delay time at turn-on. The power good output
should be low state before the output voltatge is out of regu-
lation at turn-off.
Rev. 1.0.0
©2003 Fairchild Semiconductor Corporation
FAN7585
Internal Block Diagram
24
22
C1
C2
Q
Q
D
7
2
OSCILLATOR
RT/CT
PWM
CONTROL
CK
COMP
Delay
L
L
5
6
R
S
TREM
DEAD TIME
Controller
3
4
E/A(-)
E/A(+)
CONTROLER
Q
REM
L
0.1V
(PS-ON)
1.25V
1.4V
OVP COMP
L
21
12
19
18
DTC
Vref
PT
INTERNAL
BIAS
V12
Vref
16
14
V5
Vref
L
Start
Up
V33
1.25V
L
1
8
Vcc
RI
Vref
UVP COMP
H
Iref1=Vref/RI
Ichag
1.8V!"0.6V
V5
Vref
1.25V
PG
GENERATOR
H
H
H
OCP
L
L
L
13 IS33
V5
L
L
L
COMP3
H
L
L
1.8V!"0.6V
15
IS5
L
9
DET
17
IS12
COMP2
Iref1*5
10
11
20
23
TPG
PG TUVP
GND
2
FAN7585
Pin Definition
C1 GND C2 DTC TUVP PT V12 IS12 V5
24 23 22 21 20 19 18 17 16
IS5 V33 IS33
15 14 13
FAN7585
1
2
3
4
5
6
7
8
9
10
11
12
Vcc COMPE/A(-) E/A(+) TREM REM RT/CT RI DET TPG
PG Vref
Pin Description
Pin
Pin
Pin
Pin
I/O
Pin Function Description
I/O Pin Function Description
Number Name
Number Name
1
2
3
4
5
6
7
8
9
V
I
O
I
I
-
I
-
-
I
Supply Voltage
E/A Output
E/A (-) Input
E/A (+) Input
Remote On/Off Delay
Remote On/Off Input
Oscillation Freq. Setting R,C
OCP Current Setting R
Detect Input
PG Delay
Power Good Signal Output
Precision Reference Voltage
13
14
15
16
17
18
19
20
21
22
23
24
IS33
V33
IS5
I
I
I
I
I
I
I
-
I
OCP Input for +3.3V
OVP, UVP Input for +3.3V
OCP Input for +5V
OVP, UVP Input for 5V
OCP Input for +12V
OVP, UVP Input for +12V
Extra Protection Input
UVP Delay
CC
COMP
E/A(-)
E/A(+)
T
REM
REM
R /C
T
RI
DET
V5
IS12
V12
PT
T
T
UVP
DTC
C2
Deadtime Control Input
Output 2
Ground
10
11
12
T
-
O
O
O
-
O
PG
PG
Vref
GND
C1
Output 1
3
FAN7585
Pin Function
Pin Number Pin Name
Pin Function Description
1
2
3
4
V
Supply voltage. Operating range is 15V~30V. Test condition : V =20V, Ta=25°C.
Error amplifier output. It is connected to non-inverting input of pulse width modulator
comparator.
Error amplifier inverting input. Its reference voltage is always 1.25V.
Error amplifier non-inverting input feedback voltage. This pin may be used to sense
power supply output voltages.
CC
CC
COMP
E/A(-)
E/A(+)
Remote On/Off delay. Ton/Toff=8ms/24ms (Typ.) with C=0.1uF. Its High/Low threshold
voltages are 1.8V/0.6V.
Remote On/Off input. It is TTL operation and its threshold voltage is 1.4V. Voltage at
this pin can reach normal 4.6V, with absolute maximum voltage, 5.25V.
If REM = “Low”, PWM = “Low”, that means the main SMPS is operational.
when REM = “High”, then PWM = “High” and the main SMPS is turned-off.
5
6
T
REM
REM
7
8
R /C
T
Oscillation frequency setting R, C.(Test condition RT =10kΩ)
OCP current setting pin. You can fix the OCP reference current (Iref1) by using RI
resistor.
T
RI
9
DET
AC input under voltage detection pin. Its threshold voltage is 1.25V Typ.
PG delay. Td =260ms (Typ.) with CTPG = 2.2uF. The High/Low threshold voltages are
1.8V/0.6V and the voltage of Pin10 is clamped to 2.9V for noise margin.
10
T
PG
Power Good output signal. PG = “High” means that the power is “Good” for operation
and PG = “Low” means “Power fail”.
Precision voltage reference is trimmed to ±2% (Typical Value = 5V).
11
12
PG
Vref
Current sense input for +3.3V output. This pin is connected to the current sensing
resistor or inductor. You can define OCP offset voltage for +3.3V by using RI resistor
externally. If you connect 62kΩ at pin 8 to ground, the reference current(Iref1) should be
13
IS33
20uA. After that , you can make a constant OCP offset voltage(V
=R
*5*20uA).
offset offset
In case the voltage drop(I
*Rs) of the sense resistor or inductor is larger than offset
O.33
voltage, after OCP delay time the main SMPS is turned off. So the over current level is
determined by the following equation. I =V /Rs.
O.33 offset
14
15
16
17
18
19
V33
IS5
V5
OVP, UVP input for +3.3V output (Typical Value = 4.1V/2.3V).
Current sense input for +5V output. You can make +5V OCP function as the previous
method in IS5(pin15).
OVP, UVP input for +5V output (Typical Value = 6.4V/4.0V).
Current sense input for +12V output. You can make +12V OCP function as the previous
method in IS12(pin17).
OVP, UVP input for 12V output (Typical Value = 14.2V/10V).
This is prepared for an extra OVP input or another protection signal (Typical Value =
1.25V).
IS12
V12
PT
Timing delay pin for under voltage protection and over current protection. Its threshold
voltage is 1.8V and clamped to 2.9V after full charging. Target of delay time is 38ms and
20
21
T
UVP
it is realized through external capacitor (C
= 0.47uF).
TUVP
Deadtime control input. The deadtime control comparator has an effective 120mV input
offset which limits the minimum output dead time. Dead time may be imposed on the
output by setting the dead time control input to a fixed voltage, ranging from 0V to 3.3V.
DTC
22
23
24
C2
GND
C1
Output drive pin for push-pull operation.
Ground.
Output drive pin for push-pull operation.
4
FAN7585
Absolute Maximum Ratings
Characteristics
Supply Voltage
Symbol
Value
40
40
200
1.5
Unit
V
V
mA
W
°C
°C
V
CC
Collector Output Voltage
Collector Output Current
Power Dissipation (FAN7585)
Operating Temperature Range
Storage Temperature Range
V
I
,V
C1 C2
,I
C1 C2
P
D
T
OPR
-25 to 85
-65 to 150
T
STG
Temperature Characteristics
Characteristics
Temperature Coefficient of Vref (-25°C ≤ Ta ≤ 85°C)
Symbol
∆Vref/∆T
Min.
-
Typ.
0.01
Max.
-
Unit
%/°C
5
FAN7585
Electrical Characteristics
(V =20V, T =25°C, unless otherwise specified)
cc
a
Parameter
Symbol
Condition
Min. Typ. Max. Unit
REFERENCE SECTION
Reference Output Voltage
Line Regulation
Vref
Iref=1mA
15V ≤ V
1mA ≤ Iref ≤ 10mA
-25°C ≤ Ta ≤ 85°C
Vref = 0
4.9
-
-
-
15
5
5.1
25
15
-
V
mV
mV
%/°C
mA
∆Vref.
≤ 30V
CC
2.0
1.0
0.01
35
LINE
Load Regulation
∆Vref.
LOAD
Temperature Coefficient of Vref (1)
Short Circuit Output Current
OSCILLATOR SECTION
Oscillation Frequency
∆Vref/∆T
I
75
SC
fosc
fosc/T
C =0.01uF, R =12k
-
-
9.4
2
-
-
kHz
%
T
T
Frequency Change with Temperature (1)
DEAD TIME CONTROL SECTION
Input Bias Current
C =0.01uF, R =12k
T T
I
-
-
45
-
-2.0
48
3.0
-
-10
50
3.3
-
uA
%
B(DT)
Maximum Duty Voltage
DC
Pin21 (DTC)=0V
Zero Duty Cycle
Max. Duty Cycle
MAX
Input Threshold Voltage
V
V
TH(DT)
0
ERROR AMP SECTION
Inverting Reference Voltage
Input Bias Current
Vref(EA)
-
1.20 1.25 1.30
V
uA
dB
kHz
mA
mA
I
V
=2.5V
-
70
-
-0.1 -1.0
B(EA)
COMP
Open-Loop Voltage Gain (1)
Unit-Gain Bandwidth (1)
Output Sink Current
G
0.5V ≤ V
≤ 3.5V
95
650
0.9
-
-
-
-
VO
COMP
-
= 0.7V
= 3.5V
BW
I
V
V
0.3
-2.0 -4.0
SINK
COMP
Output Source Current
PWM COMPARATOR SECTION
Input Threshold Voltage
OUTPUT SECTION
I
SOURCE
COMP
V
Zero Duty Cycle
= 200mA
-
4
4.5
V
TH(PWM)
Output Saturation Voltage
Collector Off-State Current
Rising Time(1)
V
I
C
-
-
-
-
1.1
2
100
50
1.3
100
200
200
V
CE(SAT)
I
V
CC
=V =30V, V =0V
uA
ns
ns
C(off)
C
E
T
R
T
F
-
-
Falling Time(1)
6
FAN7585
Electrical Characteristics (Continued)
(V =20V, T =25°C, unless otherwise specified)
cc
a
Parameter
Symbol
Condition
Min. Typ. Max. Unit
PROTECTION SECTION
Over Voltage Protection for +3.3V
Over Voltage Protection for +5V
Over Voltage Protection for +12V
Input Threshold Voltage for PT
Under Voltage Protection for +3.3V
Under Voltage Protection for +5V
Under Voltage Protection for +12V
Voltage for Current Reference
Current Reference(1)
Charging Current for UVP, OCP Delay
UVP, OCP Delay Time
Offset Voltage of OCP Comparator
REMOTE ON/OFF SECTION
REM On Input Voltage
V
V
V
V
V
-
-
-
-
-
-
-
3.8
6.0
13.5
1.20
2.1
3.7
9.2
1.21
10
4.1
6.4
14.2
1.25
2.3
4.0
10
1.25
-
-21
38
4.3
6.8
15.0
1.30
2.5
4.3
10.8
1.29
65
V
V
V
V
V
V
V
V
uA
uA
ms
mV
OVP1
OVP2
OVP3
PT
UVP1
UVP2
UVP3
V
V
V
RI
Iref1
I
C=0.47uF
C=0.47uF, V =1.8V
-16
24
-5
-28
57
5
CHG.UVP
T
D.UVP
TH
V
-
OFFSET
V
REMH
I
= -200uA
-
= 0.4V
-
2.0
-
-
2.0
4
16
-
-
-
-
8
24
-
V
V
mA
V
ms
ms
REM
REM Off Input Voltage
REM Off Input Bias Current
REM On Open Voltage
V
0.8
-1.6
5.25
14
REML
REML
I
V
REM
V
REM(OPEN)
Ton
REM On Delay Time
REM Off Delay Time
C=0.1uF
C=0.1uF
Toff
34
REMOTE ON/OFF SECTION (2)
Detecting Input Voltage
V
-
-
1.20
4.1
10
0.6
0.5
-10
100
-
1.25
4.3
40
1.2
1
-15
260
0.2
1.30
4.5
80
-
2
-23
500
0.4
V
V
mV
V
kΩ
uA
ms
V
IN(DET)
Detecting V5 Voltage
Hysteresis Voltage 1
Hysteresis Voltage 2
PG Output Load Resistor
Charging Current for PG Delay
PG Delay Time
PG Output Saturation Voltage
TOTAL DEVICE
V5
(DET)
HY1
HY2
COMP1, 2
COMP3
R
-
PG
CHG.PG
I
C=2.2uF
T
C=2.2uF, V =1.8V
TH
D.PG
V
I
=10mA
SAT(PG)
PG
Standby Supply Current
I
-
-
10
20
mA
CC
Note:
1. These parameters, although guaranteed over their recommended operating conditions are not 100% tested in production.
2. REM on delay time (Pin6 REM: “L” → “H”),
REM off delay time (Pin6 REM: “H” → “L”)
7
FAN7585
Application Informations
Timing Resistance vs Frequency
CT=1nF
100
10
1
CT=2.2nF
CT=4.7nF
CT=10nF
CT=20nF
CT=50nF
CT=100nF
0.2
2
3
4
5
6
7
8
9
20
30
40 50
10
RT(Kohm)
Fig 1. Timing Resistance vs Frequency
Rt/Ct
Feedback
Dead-time
control
Ck
Q
Q
Output Q1
Output Q2
Fig 2. Operating Waveform
8
FAN7585
1. OVP Block
Vo
3.3V 5V 12V
14 18
16
R1
R101
R3
R5
PT
Vref=5V
D
19
A
SET of
B
R/S Latch
C
R102
OVP COMP
R2
R4
R6
1.25V
R102, R102
: External Components
The OVP function is simply realized by connecting Pin14, Pin16, Pin18 to each secondary outputs. R1, R2, R3, R4, R5, R6 are
internal resistors of the IC. Each OVP level is determined by resistor ratio and the typical values are 4.1V/6.4V/14.2V respec-
tively.
• OVP detecting voltage for +3.3V
R
+ R
R + R
1
2
1
2
---------------------
---------------------
V
(+3.3V) =
× V
=
× Vref = 4.1V
OVP1
A
R
2
R
2
• OVP detecting voltage for +5V
R
+ R
R + R
3
4
3
4
---------------------
---------------------
V
(+5V) =
× V
=
× Vref = 6.4V
OVP2
B
R
4
R
4
• OVP detecting voltage for +12V
R
+ R
R + R
5
6
5
6
---------------------
---------------------
V
(+12V) =
× V
=
× Vref = 14.2V
OVP3
C
R
R
6
6
Especially, Pin19(PT) is prepared for extra OVP input or another protection signal. That is, if you want over voltage protection
of extra output voltage, then you can make a function with two external resistors.
• OVP detecting voltage for PT
R
+ R
R
+ R
101
102
101
102
----------------------------------
PT =
× V = ---------------------------------- × Vref
D
R
R
102
102
In the case of OVP, a system designer should know a fact that the main power can be dropped after a little time because of
system delay, even if PWM is triggered by OVP. So when the OVP level is tested with a set, you should check the secondary
outputs(+3.3V/+5V/+12V) and PG(Pin11) simultaneously. Then you can know the each OVP level as checking each output
voltage in just time that PG(Pin11) is triggered from high to low.
9
FAN7585
2. UVP Block
3.3V 5V 12V
14 16 18
R1
R3
R5
Vref=5V
A
SET of
B
R/S Latch
UVP COMP
C
R2
R4
R6
1.25V
The block is made up of a comparator with three detecting inputs and without hysteresis voltage. Each UVP level is
determined by resistor ratio and the typical values are 2.3V/4.0V/10V respectively.
• UVP detecting voltage for +3.3V
R
+ R
R
+ R
1
2
1
2
---------------------
V
(+3.3V) =
× V = --------------------- × Vref = 2.3V
UVP1
A
R
2
R
2
• UVP detecting voltage for +5V
R
+ R
R
+ R
3
4
3
4
---------------------
V
(+5V) =
× V = --------------------- × Vref = 4V
UVP2
B
R
4
R
4
• UVP detecting voltage for +12V
R
+ R
R
+ R
5
6
5
6
---------------------
V
(+12V) =
× V = --------------------- × Vref = 10V
UVP3
C
R
R
6
6
In the case of UVP, a system designer should know a fact that the main power can be dropped after some delay. (38msec@
=0.47uF)
C
TUVP
So when the UVP level is tested with a set, you should remove protection delay capacitor(Pin20) and check PG(Pin11). You
can know the each UVP level as checking each output voltage in just time that PG(Pin11) is triggered from high to low.
10
FAN7585
3. OCP Block
OVP Output
Sense Inductor
VS12
18
Equivalent Resistor(Rs) ≅ 5mΩ
Io
17
TPROT
COMP1
Roffset
IS12
Iref1 × 5
(Offset Voltage Resistor)
(100uA)
VS5
16
15
IS5
COMP2
Iref1× 5
(100uA)
14
VS33
13
IS33
COMP3
(100uA)
Iref1× 5
Iref1=20µA at RI=62kΩ
It also has OCP function for +3.3V,+5V,+12V outputs. The block is made up of three comparators. Pin17(IS12), pin15(IS5)
and pin13(IS33) are current sense inputs for +12V, +5V and +3.3V outputs respectively. These pins are connected to the cur-
rent sensing resistor or inductor.
Each OCP level is determined by RI resistor , so you can define over current protection level by changing RI resistor. Pin8(RI)
voltage is always 1.25V, so if you connect 62kΩ resistor, the reference current is 20uA(Iref1).
If the voltage drop of the sense resistor or inductor is larger than offset voltage (V
= R × 5 × Iref1), the DTC becomes
offset
offset
"High" after some delay(38ms at C
=0.47uF)and the main SMPS is turned off. That means the output voltage(+3.3V,
TUVP
+5V, +12V) will be ground level.
After main power is turned off at OCP and initialized by REM, if REM signal is changed from "High" to "Low", main power
becomes operational.
For example, if you want to define 5V output OCP level at 10A in the condition of equivalent resistor(Rs)= 5mΩ, you can
determine the offset voltage resistor(R
) as following method.
offset
- Iref1 = 1.25V / 62kΩ = 20uA
- V
offset
= R × 5 × Iref1 = 5mΩ × 10A = 50mV
S
- Therefore, R
= 50mV / (5 × Iref1) = 500Ω
offset
By the way, OCP output signal can be delayed by protection delay capacitor(C
) and its delay time is decided by the value
TUVP
of C
.
TUVP
C
TUVP*∆V
Tuvp ≈ ---------------------------- = ---------------------------------- = 38msec
∆I 21uA
0.47uF*1.7V
If you use too small (or large) capacitor, the charging time would decrease (or increase) very much and it can cause
malfunction at the transient time. So you have to choose the reasonable delay time for system optimization by changing the
external capacitor value.
11
FAN7585
4. Remote On/Off & Delay Block
Vref
12
Ton
Toff
5V
PWM
REM
Ion
Trem
5
Rpull
C
B
A
COMP
Irem
Ion+Ioff
COMP6
0.6V↔1.8V
1.25V
2.2V
Trem
0.1uF
PG
Block
REM
Remote On/Off
6
Q1
Q2
Ioff = Irem - Ion
∆Von=2V, ∆Voff=2.1V
Remote On/Off section is controlled by a microprocessor. If a high signal is supplied to the Remote On/Off input(Pin6), the
output of COMP6 becomes high status. The output signal is transferred to ON/OFF delay block and PG block.
If no signal is supplied to Pin6, Pin6 maintains high status(=5V) for pull-up resistor, Rpull.
When Remote On/Off is high, it produces PWM(Pin6) "High" signal after ON delay time (about 8ms with C
=0.1uF) for
TREM
stabilizing system. Then, all outputs (+3.3V, +5V, +12V) are grounded.
When Remote On/Off is changed to "Low", it produces PWM "Low" signal after Off delay time (about 24ms with
C
=0.1uF) for stabilizing the system. If REM is low, then PWM is low. That means the main SMPS is operational. When
TREM
REM is high, PWM is high and the main SMPS is turned off.
Remote On/Off delay time can be calculated by following equation.
C
TREM × ∆Von
0.1uF × 2V
---------------------------------------
-----------------------------
Ton = K
Toff = K
×
≈ 0.95 ×
= 8msec
1
Ion
23uA
C
TREM × ∆Voff
0.1uF × 2.1V
----------------------------------------
----------------------------------
×
≈ 0.8 ×
= 24msec
2
Ioff
7uA
k1, k2: constant value gotten by test
In above equation, a typical capacitor value is 0.1uF. If the capacitor is changed to larger value, it can cause malfunction in
case of AC power on at "REM=High". Because PWM maintains Low status and main power turns on for on delay time. So
you should use 0.1uF or smaller capacitor.
12
FAN7585
5. Power Good Signal Generator
Vref +5V
12
16
Vcc
R15
1kΩ
Ichg
R13
11
PG
Vref
COMP1
PG COMP
R11
Q3
60kΩ
COMP3
0.6V
Vref
Q2
DET
1.8V
9
TPG
10
COMP2
R12
Remote
ON/OFF
R14
4.7kΩ
CPG
1.25V
2.2 uF
Power Good Signal Generator circuit generates "ON or OFF" signal depending on the status of output voltage to prevent the
malfunctions of following systems like microprocessor, etc. caused by the output instability at power on or off .
At power on, it produces PG "High" signal after some delay time(about 260ms with C
=2.2uF) for stabilizing output volt-
TPG
age. At power off, it produces PG "Low" signal without delay time by sensing the status of power source for protecting follow-
ing systems. Vcc detection point(Pin9) can be calculated by following equation. Recommended values of R11, R12 are
determined by the following equation.
R11
DET = 1.25V × 1 + ---------- = 17.2V
R12
The COMP3 creates PG "Low" without delay when +5V output falls to less than 4.0V to prevent some malfunction at transient
status, thus it improves system stability.
When Remote On/Off signal is high, it generates PG "Low" signal without delay. It means that PG becomes "Low" before
main power is grounded.
PG delay time(T ) is determined by capacitor value(C
), threshold voltage of COMP3 and the charging current and its
TPG
PG
euqation is as following.
C
TPG × Vth
Ichg
C
TPG × ∆V
Ichg
2.2uF × 1.8V
------------------------------
TPG = ---------------------------- ≈
= ---------------------------------- ≈ 260msec
15uA
Considering the lightning surge and noise, there are two types of protections. One is a few time delay between TPG and PG for
safe operation and another is some noise margin of Pin10.
Noise_Margin_of_T = V
PG Pin10
(max)- Vth(L) = 2.9V - 0.6V = 2.3V
13
FAN7585
Typical Application Circuit
4
1
3
2
FB Vcc
GND D
T3
3
-
+
4
2
FAN7585
1
2
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
C1
COMP GND
3
EA(-)
EA(+)
Trem
C2
DTC
Tu vp
C22
C21
4
R41
C14
C15
5
6
PSON
REM(PSON)PT
C20
R47
R42
7
+12V
IS12
+5V
Rt/Ct
RI
V12
IS12
V5
R43
8
9
DET
Tpg
PG
C16
C17
R44
C19
C18
10
11
12
IS5
IS5
PG
+3.3V
IS33
V33
IS33
Vref
R46
R45
LM1
14
FAN7585
Mechanical Dimensions
Package
Dimensions in millimeters
24-SDIP
15
FAN7585
Ordering Information
Product Number
Package
Operating Temperature
FAN7585
24-SDIP
-25°C ~ 85°C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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5/13/03 0.0m 001
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2003 Fairchild Semiconductor Corporation
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